Some pin control fixes for v6.0:
- Fix IRQ wakeup and pins for UFS and SDC2 issues on the Qualcomm SC8180x - Fix the Rockchip driver to support interrupt on both rising and falling edges. - Name the Allwinner A100 R_PIO properly - Fix several issues with the Ocelot interrupts. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmMkaAgACgkQQRCzN7AZ XXN5Hg/+Ktv4bK5aN8ldE8csIDHFQ6VCTMk70dqpLVSpbKwuoY5ag1+bmTzcqmUB zP+ToL9a2CH1rDuDhM+hPHgzjYs/qD+wdm9q1qPSpbtbNEKCvQpWxEtFsBKvcdRy JfEsK0fyld7MCJBZp9Y1qSpmcKMWaaxXaffcaE2k2fG7/BcrXpnyfa2vHdji64YE 5JXhpA6CtTmEjclVKcRw595Z8o0ml1UBjgRqWX14YQwtL5rj2bf+pWbjkN8w6DRw WyuFHxY55ww95dkTPcI5VkF5dVdrIiqilxxpiSyyDJxm2s1HUsWOPuAfo3NKyH7y s9qO5LRblvB3kS8Yuh94gzO/sgXC6D3gKDQp5Hkf6zn2X4tO1M5IH+5mZyeTPbDb LoGg4AF+E4buK3ztA0oSTe2Ok3aVwtdd4HUaWffHK7dVhET/eVEIup33hq2eY+z+ jHaC26MvP6qL7EDKNg2OY70ok1qGVupuIHz/Km/asBymzgRzotdWNCr1rxl4E3LF VY7eecXYEyCZQ9C3llaDZvbIuIQPuM0yTsI36i2fdv4aqBtgteW+gSOnPpVpoFSg j9jo8F57FKcZM28qpXSorPY0TFq2/U/rLwR5Zg8jtguudEtm2izUjiNDY/yiN7Hr 5hWn2CKVi8du7JZKJImOhQ3v/cYWqke4uv2rnwJ/D3jzPGxpFx8= =i8Nw -----END PGP SIGNATURE----- Merge tag 'pinctrl-v6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Nothing special, just driver fixes: - Fix IRQ wakeup and pins for UFS and SDC2 issues on the Qualcomm SC8180x - Fix the Rockchip driver to support interrupt on both rising and falling edges. - Name the Allwinner A100 R_PIO properly - Fix several issues with the Ocelot interrupts" * tag 'pinctrl-v6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: ocelot: Fix interrupt controller pinctrl: sunxi: Fix name for A100 R_PIO pinctrl: rockchip: Enhance support for IRQ_TYPE_EDGE_BOTH pinctrl: qcom: sc8180x: Fix wrong pin numbers pinctrl: qcom: sc8180x: Fix gpio_wakeirq_map
This commit is contained in:
Коммит
6879c2d3b9
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@ -419,11 +419,11 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
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goto out;
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} else {
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bank->toggle_edge_mode |= mask;
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level |= mask;
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level &= ~mask;
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/*
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* Determine gpio state. If 1 next interrupt should be
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* falling otherwise rising.
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* low otherwise high.
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*/
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data = readl(bank->reg_base + bank->gpio_regs->ext_port);
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if (data & mask)
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@ -331,6 +331,7 @@ struct ocelot_pinctrl {
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const struct ocelot_pincfg_data *pincfg_data;
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struct ocelot_pmx_func func[FUNC_MAX];
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u8 stride;
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struct workqueue_struct *wq;
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};
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struct ocelot_match_data {
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@ -338,6 +339,11 @@ struct ocelot_match_data {
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struct ocelot_pincfg_data pincfg_data;
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};
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struct ocelot_irq_work {
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struct work_struct irq_work;
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struct irq_desc *irq_desc;
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};
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#define LUTON_P(p, f0, f1) \
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static struct ocelot_pin_caps luton_pin_##p = { \
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.pin = p, \
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@ -1813,6 +1819,75 @@ static void ocelot_irq_mask(struct irq_data *data)
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gpiochip_disable_irq(chip, gpio);
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}
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static void ocelot_irq_work(struct work_struct *work)
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{
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struct ocelot_irq_work *w = container_of(work, struct ocelot_irq_work, irq_work);
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struct irq_chip *parent_chip = irq_desc_get_chip(w->irq_desc);
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struct gpio_chip *chip = irq_desc_get_chip_data(w->irq_desc);
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struct irq_data *data = irq_desc_get_irq_data(w->irq_desc);
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unsigned int gpio = irqd_to_hwirq(data);
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local_irq_disable();
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chained_irq_enter(parent_chip, w->irq_desc);
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generic_handle_domain_irq(chip->irq.domain, gpio);
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chained_irq_exit(parent_chip, w->irq_desc);
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local_irq_enable();
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kfree(w);
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}
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static void ocelot_irq_unmask_level(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct ocelot_pinctrl *info = gpiochip_get_data(chip);
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struct irq_desc *desc = irq_data_to_desc(data);
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unsigned int gpio = irqd_to_hwirq(data);
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unsigned int bit = BIT(gpio % 32);
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bool ack = false, active = false;
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u8 trigger_level;
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int val;
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trigger_level = irqd_get_trigger_type(data);
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/* Check if the interrupt line is still active. */
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regmap_read(info->map, REG(OCELOT_GPIO_IN, info, gpio), &val);
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if ((!(val & bit) && trigger_level == IRQ_TYPE_LEVEL_LOW) ||
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(val & bit && trigger_level == IRQ_TYPE_LEVEL_HIGH))
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active = true;
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/*
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* Check if the interrupt controller has seen any changes in the
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* interrupt line.
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*/
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regmap_read(info->map, REG(OCELOT_GPIO_INTR, info, gpio), &val);
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if (val & bit)
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ack = true;
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/* Enable the interrupt now */
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gpiochip_enable_irq(chip, gpio);
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regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio),
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bit, bit);
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/*
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* In case the interrupt line is still active and the interrupt
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* controller has not seen any changes in the interrupt line, then it
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* means that there happen another interrupt while the line was active.
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* So we missed that one, so we need to kick the interrupt again
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* handler.
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*/
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if (active && !ack) {
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struct ocelot_irq_work *work;
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work = kmalloc(sizeof(*work), GFP_ATOMIC);
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if (!work)
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return;
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work->irq_desc = desc;
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INIT_WORK(&work->irq_work, ocelot_irq_work);
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queue_work(info->wq, &work->irq_work);
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}
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}
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static void ocelot_irq_unmask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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@ -1836,13 +1911,12 @@ static void ocelot_irq_ack(struct irq_data *data)
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static int ocelot_irq_set_type(struct irq_data *data, unsigned int type);
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static struct irq_chip ocelot_eoi_irqchip = {
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static struct irq_chip ocelot_level_irqchip = {
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.name = "gpio",
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.irq_mask = ocelot_irq_mask,
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.irq_eoi = ocelot_irq_ack,
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.irq_unmask = ocelot_irq_unmask,
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.flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED |
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IRQCHIP_IMMUTABLE,
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.irq_ack = ocelot_irq_ack,
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.irq_unmask = ocelot_irq_unmask_level,
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.flags = IRQCHIP_IMMUTABLE,
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.irq_set_type = ocelot_irq_set_type,
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GPIOCHIP_IRQ_RESOURCE_HELPERS
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};
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@ -1859,14 +1933,9 @@ static struct irq_chip ocelot_irqchip = {
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static int ocelot_irq_set_type(struct irq_data *data, unsigned int type)
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{
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type &= IRQ_TYPE_SENSE_MASK;
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if (!(type & (IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_LEVEL_HIGH)))
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return -EINVAL;
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if (type & IRQ_TYPE_LEVEL_HIGH)
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irq_set_chip_handler_name_locked(data, &ocelot_eoi_irqchip,
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handle_fasteoi_irq, NULL);
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if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
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irq_set_chip_handler_name_locked(data, &ocelot_level_irqchip,
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handle_level_irq, NULL);
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if (type & IRQ_TYPE_EDGE_BOTH)
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irq_set_chip_handler_name_locked(data, &ocelot_irqchip,
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handle_edge_irq, NULL);
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@ -1996,6 +2065,10 @@ static int ocelot_pinctrl_probe(struct platform_device *pdev)
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if (!info->desc)
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return -ENOMEM;
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info->wq = alloc_ordered_workqueue("ocelot_ordered", 0);
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if (!info->wq)
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return -ENOMEM;
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info->pincfg_data = &data->pincfg_data;
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reset = devm_reset_control_get_optional_shared(dev, "switch");
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@ -2018,7 +2091,7 @@ static int ocelot_pinctrl_probe(struct platform_device *pdev)
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dev_err(dev, "Failed to create regmap\n");
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return PTR_ERR(info->map);
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}
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dev_set_drvdata(dev, info->map);
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dev_set_drvdata(dev, info);
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info->dev = dev;
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/* Pinconf registers */
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@ -2043,6 +2116,15 @@ static int ocelot_pinctrl_probe(struct platform_device *pdev)
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return 0;
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}
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static int ocelot_pinctrl_remove(struct platform_device *pdev)
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{
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struct ocelot_pinctrl *info = platform_get_drvdata(pdev);
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destroy_workqueue(info->wq);
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return 0;
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}
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static struct platform_driver ocelot_pinctrl_driver = {
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.driver = {
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.name = "pinctrl-ocelot",
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@ -2050,6 +2132,7 @@ static struct platform_driver ocelot_pinctrl_driver = {
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.suppress_bind_attrs = true,
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},
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.probe = ocelot_pinctrl_probe,
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.remove = ocelot_pinctrl_remove,
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};
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module_platform_driver(ocelot_pinctrl_driver);
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MODULE_LICENSE("Dual MIT/GPL");
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@ -530,10 +530,10 @@ DECLARE_MSM_GPIO_PINS(187);
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DECLARE_MSM_GPIO_PINS(188);
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DECLARE_MSM_GPIO_PINS(189);
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static const unsigned int sdc2_clk_pins[] = { 190 };
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static const unsigned int sdc2_cmd_pins[] = { 191 };
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static const unsigned int sdc2_data_pins[] = { 192 };
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static const unsigned int ufs_reset_pins[] = { 193 };
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static const unsigned int ufs_reset_pins[] = { 190 };
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static const unsigned int sdc2_clk_pins[] = { 191 };
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static const unsigned int sdc2_cmd_pins[] = { 192 };
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static const unsigned int sdc2_data_pins[] = { 193 };
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enum sc8180x_functions {
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msm_mux_adsp_ext,
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@ -1582,7 +1582,7 @@ static const int sc8180x_acpi_reserved_gpios[] = {
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static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = {
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{ 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 },
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{ 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 },
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{ 37, 43 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 },
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{ 37, 44 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 },
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{ 42, 48 }, { 46, 50 }, { 47, 49 }, { 48, 51 }, { 49, 53 }, { 50, 52 },
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{ 51, 116 }, { 51, 123 }, { 53, 54 }, { 54, 55 }, { 55, 56 },
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{ 56, 57 }, { 58, 58 }, { 60, 60 }, { 68, 62 }, { 70, 63 }, { 76, 86 },
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@ -99,7 +99,7 @@ MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
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static struct platform_driver a100_r_pinctrl_driver = {
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.probe = a100_r_pinctrl_probe,
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.driver = {
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.name = "sun50iw10p1-r-pinctrl",
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.name = "sun50i-a100-r-pinctrl",
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.of_match_table = a100_r_pinctrl_match,
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},
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};
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