ARM: shmobile: r8a7791 SMP support
Tie in the APMU SMP code on r8a7791. When used together with the secondary CPU device node and smp_ops in the board specific code then this will allow use of the two Cortex-A15 cores in the r8a7791 SoC. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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687c27b070
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@ -40,6 +40,7 @@ smp-y := platsmp.o headsmp.o
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smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
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smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
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smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o
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smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o platsmp-apmu.o
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smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
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# IRQ objects
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@ -5,5 +5,6 @@ void r8a7791_add_standard_devices(void);
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void r8a7791_add_dt_devices(void);
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void r8a7791_clock_init(void);
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void r8a7791_init_early(void);
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extern struct smp_operations r8a7791_smp_ops;
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#endif /* __ASM_R8A7791_H__ */
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@ -176,6 +176,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
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};
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DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
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.smp = smp_ops(r8a7791_smp_ops),
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.init_early = r8a7791_init_early,
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.init_time = rcar_gen2_timer_init,
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.dt_compat = r8a7791_boards_compat_dt,
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@ -0,0 +1,62 @@
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/*
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* SMP support for r8a7791
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/smp_plat.h>
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#include <mach/common.h>
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#include <mach/r8a7791.h>
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA15RESCNT 0x0040
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#define RAM 0xe6300000
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static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *p;
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u32 bar;
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/* let APMU code install data related to shmobile_boot_vector */
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shmobile_smp_apmu_prepare_cpus(max_cpus);
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/* RAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(RAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (RAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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/* enable clocks to all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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iounmap(p);
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}
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struct smp_operations r8a7791_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
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.smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = shmobile_smp_cpu_disable,
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.cpu_die = shmobile_smp_apmu_cpu_die,
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.cpu_kill = shmobile_smp_apmu_cpu_kill,
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#endif
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};
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