sl82c105: DMA support code cleanup (take 4)
Fold the now equivalent code in the ide_dma_check() method into a mere call to ide_use_dma(). Make config_for_dma() return non-zero if DMA mode has been set and call it from the ide_dma_check() method instead of ide_dma_on(). Defer writing the DMA timings to the chip registers until DMA is really turned on (and do not enable IORDY for DMA). Remove unneeded code from the init_hwif() method, improve its overall looks. Rename the dma_start(), ide_dma_check(), and ide_dma_lostirq() methods, and also use more proper hwif->dma_command, fix printk() and comment in the latter one as well. While at it, cleanup style in several places. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -100,59 +100,28 @@ static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio)
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}
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/*
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* Configure the drive and the chipset for DMA
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* Configure the drive for DMA.
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* We'll program the chipset only when DMA is actually turned on.
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*/
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static int config_for_dma (ide_drive_t *drive)
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static int config_for_dma(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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unsigned int reg;
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DBG(("config_for_dma(drive:%s)\n", drive->name));
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reg = (hwif->channel ? 0x4c : 0x44) + (drive->select.b.unit ? 4 : 0);
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if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0)
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return 1;
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return 0;
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pci_write_config_word(dev, reg, 0x0240);
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return 0;
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return ide_dma_enable(drive);
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}
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/*
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* Check to see if the drive and
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* chipset is capable of DMA mode
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* Check to see if the drive and chipset are capable of DMA mode.
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*/
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static int sl82c105_check_drive (ide_drive_t *drive)
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static int sl82c105_ide_dma_check(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name));
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DBG(("sl82c105_check_drive(drive:%s)\n", drive->name));
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do {
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struct hd_driveid *id = drive->id;
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if (!drive->autodma)
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break;
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if (!id || !(id->capability & 1))
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break;
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/* Consult the list of known "bad" drives */
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if (__ide_dma_bad_drive(drive))
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break;
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if (id->field_valid & 2) {
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if ((id->dma_mword & hwif->mwdma_mask) ||
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(id->dma_1word & hwif->swdma_mask))
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return 0;
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}
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if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
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return 0;
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} while (0);
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if (ide_use_dma(drive) && config_for_dma(drive))
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return 0;
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return -1;
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}
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@ -181,14 +150,14 @@ static inline void sl82c105_reset_host(struct pci_dev *dev)
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* This function is called when the IDE timer expires, the drive
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* indicates that it is READY, and we were waiting for DMA to complete.
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*/
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static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
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static int sl82c105_ide_dma_lostirq(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
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unsigned long dma_base = hwif->dma_base;
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
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u8 dma_cmd;
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printk("sl82c105: lost IRQ: resetting host\n");
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printk("sl82c105: lost IRQ, resetting host\n");
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/*
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* Check the raw interrupt from the drive.
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@ -201,15 +170,15 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
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* Was DMA enabled? If so, disable it - we're resetting the
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* host. The IDE layer will be handling the drive for us.
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*/
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val = inb(dma_base);
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if (val & 1) {
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outb(val & ~1, dma_base);
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dma_cmd = inb(hwif->dma_command);
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if (dma_cmd & 1) {
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outb(dma_cmd & ~1, hwif->dma_command);
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printk("sl82c105: DMA was enabled\n");
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}
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sl82c105_reset_host(dev);
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/* ide_dmaproc would return 1, so we do as well */
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/* __ide_dma_lostirq would return 1, so we do as well */
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return 1;
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}
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@ -221,10 +190,10 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
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* The generic IDE core will have disabled the BMEN bit before this
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* function is called.
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*/
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static void sl82c105_ide_dma_start(ide_drive_t *drive)
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static void sl82c105_dma_start(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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sl82c105_reset_host(dev);
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ide_dma_start(drive);
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@ -232,8 +201,8 @@ static void sl82c105_ide_dma_start(ide_drive_t *drive)
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static int sl82c105_ide_dma_timeout(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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DBG(("sl82c105_ide_dma_timeout(drive:%s)\n", drive->name));
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@ -241,14 +210,20 @@ static int sl82c105_ide_dma_timeout(ide_drive_t *drive)
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return __ide_dma_timeout(drive);
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}
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static int sl82c105_ide_dma_on (ide_drive_t *drive)
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static int sl82c105_ide_dma_on(ide_drive_t *drive)
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{
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struct pci_dev *dev = HWIF(drive)->pci_dev;
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int rc, reg = 0x44 + drive->dn * 4;
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DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
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if (config_for_dma(drive))
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return 1;
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printk(KERN_INFO "%s: DMA enabled\n", drive->name);
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return __ide_dma_on(drive);
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rc = __ide_dma_on(drive);
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if (rc == 0) {
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pci_write_config_word(dev, reg, 0x0200);
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printk(KERN_INFO "%s: DMA enabled\n", drive->name);
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}
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return rc;
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}
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static void sl82c105_dma_off_quietly(ide_drive_t *drive)
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@ -272,8 +247,8 @@ static void sl82c105_dma_off_quietly(ide_drive_t *drive)
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*/
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static void sl82c105_selectproc(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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u32 val, old, mask;
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//DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
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@ -373,7 +348,7 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
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}
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/*
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* Initialise the chip
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* Initialise IDE channel
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*/
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static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
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{
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@ -398,11 +373,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
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*/
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hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
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hwif->atapi_dma = 0;
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hwif->mwdma_mask = 0;
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hwif->swdma_mask = 0;
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hwif->autodma = 0;
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if (!hwif->dma_base)
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return;
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@ -412,27 +382,27 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
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* Never ever EVER under any circumstances enable
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* DMA when the bridge is this old.
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*/
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printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
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hwif->name, rev);
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} else {
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hwif->atapi_dma = 1;
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hwif->mwdma_mask = 0x04;
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hwif->ide_dma_check = &sl82c105_check_drive;
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hwif->ide_dma_on = &sl82c105_ide_dma_on;
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hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
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hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
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hwif->dma_start = &sl82c105_ide_dma_start;
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hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->autodma;
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hwif->drives[1].autodma = hwif->autodma;
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if (hwif->mate)
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hwif->serialized = hwif->mate->serialized = 1;
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printk(" %s: Winbond W83C553 bridge revision %d, "
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"BM-DMA disabled\n", hwif->name, rev);
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return;
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}
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hwif->atapi_dma = 1;
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hwif->mwdma_mask = 0x04;
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hwif->ide_dma_check = &sl82c105_ide_dma_check;
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hwif->ide_dma_on = &sl82c105_ide_dma_on;
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hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
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hwif->ide_dma_lostirq = &sl82c105_ide_dma_lostirq;
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hwif->dma_start = &sl82c105_dma_start;
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hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
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if (hwif->mate)
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hwif->serialized = hwif->mate->serialized = 1;
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}
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static ide_pci_device_t sl82c105_chipset __devinitdata = {
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