net: ftgmac100: move phy connect out from ftgmac100_setup_mdio
Split MDIO registration and PHY connect into ftgmac100_setup_mdio and ftgmac100_mii_probe. Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Ivan Mikhaylov
Jakub Kicinski
Родитель
338b5da31d
Коммит
68ed78b523
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@ -1044,10 +1044,39 @@ static void ftgmac100_adjust_link(struct net_device *netdev)
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schedule_work(&priv->reset_task);
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}
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static int ftgmac100_mii_probe(struct ftgmac100 *priv, phy_interface_t intf)
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static int ftgmac100_mii_probe(struct net_device *netdev)
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{
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struct net_device *netdev = priv->netdev;
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struct ftgmac100 *priv = netdev_priv(netdev);
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struct platform_device *pdev = to_platform_device(priv->dev);
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struct device_node *np = pdev->dev.of_node;
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struct phy_device *phydev;
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phy_interface_t phy_intf;
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int err;
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/* Default to RGMII. It's a gigabit part after all */
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err = of_get_phy_mode(np, &phy_intf);
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if (err)
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phy_intf = PHY_INTERFACE_MODE_RGMII;
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/* Aspeed only supports these. I don't know about other IP
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* block vendors so I'm going to just let them through for
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* now. Note that this is only a warning if for some obscure
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* reason the DT really means to lie about it or it's a newer
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* part we don't know about.
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*
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* On the Aspeed SoC there are additionally straps and SCU
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* control bits that could tell us what the interface is
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* (or allow us to configure it while the IP block is held
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* in reset). For now I chose to keep this driver away from
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* those SoC specific bits and assume the device-tree is
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* right and the SCU has been configured properly by pinmux
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* or the firmware.
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*/
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if (priv->is_aspeed && !(phy_interface_mode_is_rgmii(phy_intf))) {
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netdev_warn(netdev,
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"Unsupported PHY mode %s !\n",
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phy_modes(phy_intf));
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}
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phydev = phy_find_first(priv->mii_bus);
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if (!phydev) {
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@ -1056,7 +1085,7 @@ static int ftgmac100_mii_probe(struct ftgmac100 *priv, phy_interface_t intf)
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}
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phydev = phy_connect(netdev, phydev_name(phydev),
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&ftgmac100_adjust_link, intf);
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&ftgmac100_adjust_link, phy_intf);
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if (IS_ERR(phydev)) {
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netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
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@ -1601,7 +1630,6 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
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{
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struct ftgmac100 *priv = netdev_priv(netdev);
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struct platform_device *pdev = to_platform_device(priv->dev);
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phy_interface_t phy_intf = PHY_INTERFACE_MODE_RGMII;
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struct device_node *np = pdev->dev.of_node;
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int i, err = 0;
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u32 reg;
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@ -1623,39 +1651,6 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
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iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
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}
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/* Get PHY mode from device-tree */
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if (np) {
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/* Default to RGMII. It's a gigabit part after all */
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err = of_get_phy_mode(np, &phy_intf);
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if (err)
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phy_intf = PHY_INTERFACE_MODE_RGMII;
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/* Aspeed only supports these. I don't know about other IP
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* block vendors so I'm going to just let them through for
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* now. Note that this is only a warning if for some obscure
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* reason the DT really means to lie about it or it's a newer
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* part we don't know about.
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*
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* On the Aspeed SoC there are additionally straps and SCU
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* control bits that could tell us what the interface is
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* (or allow us to configure it while the IP block is held
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* in reset). For now I chose to keep this driver away from
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* those SoC specific bits and assume the device-tree is
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* right and the SCU has been configured properly by pinmux
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* or the firmware.
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*/
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if (priv->is_aspeed &&
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phy_intf != PHY_INTERFACE_MODE_RMII &&
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phy_intf != PHY_INTERFACE_MODE_RGMII &&
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phy_intf != PHY_INTERFACE_MODE_RGMII_ID &&
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phy_intf != PHY_INTERFACE_MODE_RGMII_RXID &&
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phy_intf != PHY_INTERFACE_MODE_RGMII_TXID) {
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netdev_warn(netdev,
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"Unsupported PHY mode %s !\n",
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phy_modes(phy_intf));
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}
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}
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priv->mii_bus->name = "ftgmac100_mdio";
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snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
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pdev->name, pdev->id);
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@ -1673,29 +1668,28 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
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goto err_register_mdiobus;
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}
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err = ftgmac100_mii_probe(priv, phy_intf);
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if (err) {
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dev_err(priv->dev, "MII Probe failed!\n");
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goto err_mii_probe;
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}
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return 0;
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err_mii_probe:
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mdiobus_unregister(priv->mii_bus);
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err_register_mdiobus:
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mdiobus_free(priv->mii_bus);
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return err;
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}
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static void ftgmac100_phy_disconnect(struct net_device *netdev)
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{
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if (!netdev->phydev)
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return;
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phy_disconnect(netdev->phydev);
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}
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static void ftgmac100_destroy_mdio(struct net_device *netdev)
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{
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struct ftgmac100 *priv = netdev_priv(netdev);
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if (!netdev->phydev)
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if (!priv->mii_bus)
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return;
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phy_disconnect(netdev->phydev);
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mdiobus_unregister(priv->mii_bus);
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mdiobus_free(priv->mii_bus);
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}
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@ -1830,14 +1824,14 @@ static int ftgmac100_probe(struct platform_device *pdev)
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if (np && of_get_property(np, "use-ncsi", NULL)) {
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if (!IS_ENABLED(CONFIG_NET_NCSI)) {
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dev_err(&pdev->dev, "NCSI stack not enabled\n");
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goto err_ncsi_dev;
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goto err_phy_connect;
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}
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dev_info(&pdev->dev, "Using NCSI interface\n");
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priv->use_ncsi = true;
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priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler);
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if (!priv->ndev)
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goto err_ncsi_dev;
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goto err_phy_connect;
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} else if (np && of_get_property(np, "phy-handle", NULL)) {
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struct phy_device *phy;
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@ -1865,12 +1859,19 @@ static int ftgmac100_probe(struct platform_device *pdev)
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err = ftgmac100_setup_mdio(netdev);
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if (err)
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goto err_setup_mdio;
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err = ftgmac100_mii_probe(netdev);
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if (err) {
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dev_err(priv->dev, "MII probe failed!\n");
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goto err_ncsi_dev;
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}
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}
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if (priv->is_aspeed) {
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err = ftgmac100_setup_clk(priv);
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if (err)
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goto err_ncsi_dev;
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goto err_phy_connect;
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}
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/* Default ring sizes */
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@ -1906,6 +1907,8 @@ static int ftgmac100_probe(struct platform_device *pdev)
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err_register_netdev:
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clk_disable_unprepare(priv->rclk);
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clk_disable_unprepare(priv->clk);
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err_phy_connect:
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ftgmac100_phy_disconnect(netdev);
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err_ncsi_dev:
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ftgmac100_destroy_mdio(netdev);
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err_setup_mdio:
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@ -1936,6 +1939,7 @@ static int ftgmac100_remove(struct platform_device *pdev)
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*/
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cancel_work_sync(&priv->reset_task);
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ftgmac100_phy_disconnect(netdev);
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ftgmac100_destroy_mdio(netdev);
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iounmap(priv->base);
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