drm/i915/dp: Tweak auxch clock divider for PCH
Matches the advice in the Sandybridge documentation. Signed-off-by: Adam Jackson <ajax@redhat.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -378,7 +378,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
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else
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aux_clock_divider = 225; /* eDP input clock at 450Mhz */
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} else if (HAS_PCH_SPLIT(dev))
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aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
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aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */
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else
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aux_clock_divider = intel_hrawclk(dev) / 2;
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