ALSA: hdspm - Added some comments and control register documentation
Signed-off-by: Martin Dausel <martin.dausel@iosono-sound.com> Signed-off-by: Adrian Knoth <adi@drcomp.erfurt.thur.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -38,6 +38,97 @@
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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/* ************* Register Documentation *******************************************************
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*
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* Work in progress! Documentation is based on the code in this file.
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*
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* --------- HDSPM_controlRegister ---------
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* :7654.3210:7654.3210:7654.3210:7654.3210: bit number per byte
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* :||||.||||:||||.||||:||||.||||:||||.||||:
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* :3322.2222:2222.1111:1111.1100:0000.0000: bit number
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* :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
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* :||||.||||:||||.||||:||||.||||:||||.||||:
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* :8421.8421:8421.8421:8421.8421:8421.8421: hex digit
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* : . : . : . : x . : HDSPM_AudioInterruptEnable \_ setting both bits
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* : . : . : . : . x: HDSPM_Start / enables audio IO
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* : . : . : . : x. : HDSPM_ClockModeMaster - 1: Master, 0: Slave
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* : . : . : . : .210 : HDSPM_LatencyMask - 3 Bit value for latency
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* : . : . : . : . : 0:64, 1:128, 2:256, 3:512,
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* : . : . : . : . : 4:1024, 5:2048, 6:4096, 7:8192
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* :x . : . : . x:xx . : HDSPM_FrequencyMask
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* : . : . : . :10 . : HDSPM_Frequency1|HDSPM_Frequency0: 1=32K,2=44.1K,3=48K,0=??
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* : . : . : . x: . : <MADI> HDSPM_DoubleSpeed
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* :x . : . : . : . : <MADI> HDSPM_QuadSpeed
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* : . 3 : . 10: 2 . : . : HDSPM_SyncRefMask :
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* : . : . x: . : . : HDSPM_SyncRef0
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* : . : . x : . : . : HDSPM_SyncRef1
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* : . : . : x . : . : <AES32> HDSPM_SyncRef2
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* : . x : . : . : . : <AES32> HDSPM_SyncRef3
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* : . : . 10: . : . : <MADI> sync ref: 0:WC, 1:Madi, 2:TCO, 3:SyncIn
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* : . 3 : . 10: 2 . : . : <AES32> 0:WC, 1:AES1 ... 8:AES8, 9: TCO, 10:SyncIn?
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* : . x : . : . : . : <MADIe> HDSPe_FLOAT_FORMAT
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* : . : . : x . : . : <MADI> HDSPM_InputSelect0 : 0=optical,1=coax
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* : . : . :x . : . : <MADI> HDSPM_InputSelect1
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* : . : .x : . : . : <MADI> HDSPM_clr_tms
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* : . : . : . x : . : <MADI> HDSPM_TX_64ch
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* : . : . : . x : . : <AES32> HDSPM_Emphasis
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* : . : . : .x : . : <MADI> HDSPM_AutoInp
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* : . : . x : . : . : <MADI> HDSPM_SMUX
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* : . : .x : . : . : <MADI> HDSPM_clr_tms
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* : . : x. : . : . : <MADI> HDSPM_taxi_reset
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* : . x: . : . : . : <MADI> HDSPM_LineOut
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* : . x: . : . : . : <AES32> ??????????????????
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* : . : x. : . : . : <AES32> HDSPM_WCK48
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* : . : . : .x : . : <AES32> HDSPM_Dolby
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* : . : x . : . : . : HDSPM_Midi0InterruptEnable
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* : . :x . : . : . : HDSPM_Midi1InterruptEnable
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* : . : x . : . : . : HDSPM_Midi2InterruptEnable
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* : . x : . : . : . : <MADI> HDSPM_Midi3InterruptEnable
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* : . x : . : . : . : <AES32> HDSPM_DS_DoubleWire
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* : .x : . : . : . : <AES32> HDSPM_QS_DoubleWire
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* : x. : . : . : . : <AES32> HDSPM_QS_QuadWire
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* : . : . : . x : . : <AES32> HDSPM_Professional
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* : x . : . : . : . : HDSPM_wclk_sel
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* : . : . : . : . :
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* :7654.3210:7654.3210:7654.3210:7654.3210: bit number per byte
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* :||||.||||:||||.||||:||||.||||:||||.||||:
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* :3322.2222:2222.1111:1111.1100:0000.0000: bit number
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* :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
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* :||||.||||:||||.||||:||||.||||:||||.||||:
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* :8421.8421:8421.8421:8421.8421:8421.8421:hex digit
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*
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*
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*
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* AIO / RayDAT only
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*
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* ------------ HDSPM_WR_SETTINGS ----------
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* :3322.2222:2222.1111:1111.1100:0000.0000: bit number per byte
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* :1098.7654:3210.9876:5432.1098:7654.3210:
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* :||||.||||:||||.||||:||||.||||:||||.||||: bit number
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* :7654.3210:7654.3210:7654.3210:7654.3210: 0..31
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* :||||.||||:||||.||||:||||.||||:||||.||||:
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* :8421.8421:8421.8421:8421.8421:8421.8421: hex digit
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* : . : . : . : . x: HDSPM_c0Master 1: Master, 0: Slave
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* : . : . : . : . x : HDSPM_c0_SyncRef0
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* : . : . : . : . x : HDSPM_c0_SyncRef1
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* : . : . : . : .x : HDSPM_c0_SyncRef2
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* : . : . : . : x. : HDSPM_c0_SyncRef3
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* : . : . : . : 3.210 : HDSPM_c0_SyncRefMask:
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* : . : . : . : . : RayDat: 0:WC, 1:AES, 2:SPDIF, 3..6: ADAT1..4,
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* : . : . : . : . : 9:TCO, 10:SyncIn
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* : . : . : . : . : AIO: 0:WC, 1:AES, 2: SPDIF, 3: ATAT,
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* : . : . : . : . : 9:TCO, 10:SyncIn
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* : . : . : . : . :
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* : . : . : . : . :
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* :3322.2222:2222.1111:1111.1100:0000.0000: bit number per byte
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* :1098.7654:3210.9876:5432.1098:7654.3210:
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* :||||.||||:||||.||||:||||.||||:||||.||||: bit number
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* :7654.3210:7654.3210:7654.3210:7654.3210: 0..31
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* :||||.||||:||||.||||:||||.||||:||||.||||:
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* :8421.8421:8421.8421:8421.8421:8421.8421: hex digit
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*
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*/
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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@ -95,7 +186,7 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
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#define HDSPM_controlRegister 64
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#define HDSPM_interruptConfirmation 96
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#define HDSPM_control2Reg 256 /* not in specs ???????? */
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#define HDSPM_freqReg 256 /* for AES32 */
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#define HDSPM_freqReg 256 /* for setting arbitrary clock values (DDS feature) */
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#define HDSPM_midiDataOut0 352 /* just believe in old code */
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#define HDSPM_midiDataOut1 356
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#define HDSPM_eeprom_wr 384 /* for AES32 */
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@ -890,11 +981,11 @@ struct hdspm_midi {
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};
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struct hdspm_tco {
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int input;
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int framerate;
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int wordclock;
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int samplerate;
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int pull;
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int input; /* 0: LTC, 1:Video, 2: WC*/
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int framerate; /* 0=24, 1=25, 2=29.97, 3=29.97d, 4=30, 5=30d */
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int wordclock; /* 0=1:1, 1=44.1->48, 2=48->44.1 */
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int samplerate; /* 0=44.1, 1=48, 2= freq from app */
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int pull; /* 0=0, 1=+0.1%, 2=-0.1%, 3=+4%, 4=-4%*/
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int term; /* 0 = off, 1 = on */
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};
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@ -913,7 +1004,7 @@ struct hdspm {
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u32 control_register; /* cached value */
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u32 control2_register; /* cached value */
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u32 settings_register;
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u32 settings_register; /* cached value for AIO / RayDat (sync reference, master/slave) */
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struct hdspm_midi midi[4];
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struct tasklet_struct midi_tasklet;
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@ -4137,6 +4228,7 @@ static void hdspm_tco_write(struct hdspm *hdspm)
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static int snd_hdspm_info_tco_sample_rate(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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/* TODO freq from app could be supported here, see tco->samplerate */
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static const char *const texts[] = { "44.1 kHz", "48 kHz" };
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ENUMERATED_CTL_INFO(uinfo, texts);
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return 0;
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