Merge commit 'v2.6.39' into for-2.6.40/core
Since for-2.6.40/core was forked off the 2.6.39 devel tree, we've had churn in the core area that makes it difficult to handle patches for eg cfq or blk-throttle. Instead of requiring that they be based in older versions with bugs that have been fixed later in the rc cycle, merge in 2.6.39 final. Also fixes up conflicts in the below files. Conflicts: drivers/block/paride/pcd.c drivers/cdrom/viocd.c drivers/ide/ide-cd.c Signed-off-by: Jens Axboe <jaxboe@fusionio.com>
This commit is contained in:
Jens Axboe
Коммит
698567f3fa
|
|
@ -294,6 +294,7 @@
|
|||
<!ENTITY sub-srggb10 SYSTEM "v4l/pixfmt-srggb10.xml">
|
||||
<!ENTITY sub-srggb8 SYSTEM "v4l/pixfmt-srggb8.xml">
|
||||
<!ENTITY sub-y10 SYSTEM "v4l/pixfmt-y10.xml">
|
||||
<!ENTITY sub-y12 SYSTEM "v4l/pixfmt-y12.xml">
|
||||
<!ENTITY sub-pixfmt SYSTEM "v4l/pixfmt.xml">
|
||||
<!ENTITY sub-cropcap SYSTEM "v4l/vidioc-cropcap.xml">
|
||||
<!ENTITY sub-dbg-g-register SYSTEM "v4l/vidioc-dbg-g-register.xml">
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
<varlistentry>
|
||||
<term><parameter>request</parameter></term>
|
||||
<listitem>
|
||||
<para>MEDIA_IOC_ENUM_LINKS</para>
|
||||
<para>MEDIA_IOC_SETUP_LINK</para>
|
||||
</listitem>
|
||||
</varlistentry>
|
||||
<varlistentry>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,79 @@
|
|||
<refentry id="V4L2-PIX-FMT-Y12">
|
||||
<refmeta>
|
||||
<refentrytitle>V4L2_PIX_FMT_Y12 ('Y12 ')</refentrytitle>
|
||||
&manvol;
|
||||
</refmeta>
|
||||
<refnamediv>
|
||||
<refname><constant>V4L2_PIX_FMT_Y12</constant></refname>
|
||||
<refpurpose>Grey-scale image</refpurpose>
|
||||
</refnamediv>
|
||||
<refsect1>
|
||||
<title>Description</title>
|
||||
|
||||
<para>This is a grey-scale image with a depth of 12 bits per pixel. Pixels
|
||||
are stored in 16-bit words with unused high bits padded with 0. The least
|
||||
significant byte is stored at lower memory addresses (little-endian).</para>
|
||||
|
||||
<example>
|
||||
<title><constant>V4L2_PIX_FMT_Y12</constant> 4 × 4
|
||||
pixel image</title>
|
||||
|
||||
<formalpara>
|
||||
<title>Byte Order.</title>
|
||||
<para>Each cell is one byte.
|
||||
<informaltable frame="none">
|
||||
<tgroup cols="9" align="center">
|
||||
<colspec align="left" colwidth="2*" />
|
||||
<tbody valign="top">
|
||||
<row>
|
||||
<entry>start + 0:</entry>
|
||||
<entry>Y'<subscript>00low</subscript></entry>
|
||||
<entry>Y'<subscript>00high</subscript></entry>
|
||||
<entry>Y'<subscript>01low</subscript></entry>
|
||||
<entry>Y'<subscript>01high</subscript></entry>
|
||||
<entry>Y'<subscript>02low</subscript></entry>
|
||||
<entry>Y'<subscript>02high</subscript></entry>
|
||||
<entry>Y'<subscript>03low</subscript></entry>
|
||||
<entry>Y'<subscript>03high</subscript></entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>start + 8:</entry>
|
||||
<entry>Y'<subscript>10low</subscript></entry>
|
||||
<entry>Y'<subscript>10high</subscript></entry>
|
||||
<entry>Y'<subscript>11low</subscript></entry>
|
||||
<entry>Y'<subscript>11high</subscript></entry>
|
||||
<entry>Y'<subscript>12low</subscript></entry>
|
||||
<entry>Y'<subscript>12high</subscript></entry>
|
||||
<entry>Y'<subscript>13low</subscript></entry>
|
||||
<entry>Y'<subscript>13high</subscript></entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>start + 16:</entry>
|
||||
<entry>Y'<subscript>20low</subscript></entry>
|
||||
<entry>Y'<subscript>20high</subscript></entry>
|
||||
<entry>Y'<subscript>21low</subscript></entry>
|
||||
<entry>Y'<subscript>21high</subscript></entry>
|
||||
<entry>Y'<subscript>22low</subscript></entry>
|
||||
<entry>Y'<subscript>22high</subscript></entry>
|
||||
<entry>Y'<subscript>23low</subscript></entry>
|
||||
<entry>Y'<subscript>23high</subscript></entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>start + 24:</entry>
|
||||
<entry>Y'<subscript>30low</subscript></entry>
|
||||
<entry>Y'<subscript>30high</subscript></entry>
|
||||
<entry>Y'<subscript>31low</subscript></entry>
|
||||
<entry>Y'<subscript>31high</subscript></entry>
|
||||
<entry>Y'<subscript>32low</subscript></entry>
|
||||
<entry>Y'<subscript>32high</subscript></entry>
|
||||
<entry>Y'<subscript>33low</subscript></entry>
|
||||
<entry>Y'<subscript>33high</subscript></entry>
|
||||
</row>
|
||||
</tbody>
|
||||
</tgroup>
|
||||
</informaltable>
|
||||
</para>
|
||||
</formalpara>
|
||||
</example>
|
||||
</refsect1>
|
||||
</refentry>
|
||||
|
|
@ -696,6 +696,7 @@ information.</para>
|
|||
&sub-packed-yuv;
|
||||
&sub-grey;
|
||||
&sub-y10;
|
||||
&sub-y12;
|
||||
&sub-y16;
|
||||
&sub-yuyv;
|
||||
&sub-uyvy;
|
||||
|
|
|
|||
|
|
@ -456,6 +456,23 @@
|
|||
<entry>b<subscript>1</subscript></entry>
|
||||
<entry>b<subscript>0</subscript></entry>
|
||||
</row>
|
||||
<row id="V4L2-MBUS-FMT-SGBRG8-1X8">
|
||||
<entry>V4L2_MBUS_FMT_SGBRG8_1X8</entry>
|
||||
<entry>0x3013</entry>
|
||||
<entry></entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>g<subscript>7</subscript></entry>
|
||||
<entry>g<subscript>6</subscript></entry>
|
||||
<entry>g<subscript>5</subscript></entry>
|
||||
<entry>g<subscript>4</subscript></entry>
|
||||
<entry>g<subscript>3</subscript></entry>
|
||||
<entry>g<subscript>2</subscript></entry>
|
||||
<entry>g<subscript>1</subscript></entry>
|
||||
<entry>g<subscript>0</subscript></entry>
|
||||
</row>
|
||||
<row id="V4L2-MBUS-FMT-SGRBG8-1X8">
|
||||
<entry>V4L2_MBUS_FMT_SGRBG8_1X8</entry>
|
||||
<entry>0x3002</entry>
|
||||
|
|
@ -473,6 +490,23 @@
|
|||
<entry>g<subscript>1</subscript></entry>
|
||||
<entry>g<subscript>0</subscript></entry>
|
||||
</row>
|
||||
<row id="V4L2-MBUS-FMT-SRGGB8-1X8">
|
||||
<entry>V4L2_MBUS_FMT_SRGGB8_1X8</entry>
|
||||
<entry>0x3014</entry>
|
||||
<entry></entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>r<subscript>7</subscript></entry>
|
||||
<entry>r<subscript>6</subscript></entry>
|
||||
<entry>r<subscript>5</subscript></entry>
|
||||
<entry>r<subscript>4</subscript></entry>
|
||||
<entry>r<subscript>3</subscript></entry>
|
||||
<entry>r<subscript>2</subscript></entry>
|
||||
<entry>r<subscript>1</subscript></entry>
|
||||
<entry>r<subscript>0</subscript></entry>
|
||||
</row>
|
||||
<row id="V4L2-MBUS-FMT-SBGGR10-DPCM8-1X8">
|
||||
<entry>V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8</entry>
|
||||
<entry>0x300b</entry>
|
||||
|
|
@ -2159,6 +2193,31 @@
|
|||
<entry>u<subscript>1</subscript></entry>
|
||||
<entry>u<subscript>0</subscript></entry>
|
||||
</row>
|
||||
<row id="V4L2-MBUS-FMT-Y12-1X12">
|
||||
<entry>V4L2_MBUS_FMT_Y12_1X12</entry>
|
||||
<entry>0x2013</entry>
|
||||
<entry></entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>-</entry>
|
||||
<entry>y<subscript>11</subscript></entry>
|
||||
<entry>y<subscript>10</subscript></entry>
|
||||
<entry>y<subscript>9</subscript></entry>
|
||||
<entry>y<subscript>8</subscript></entry>
|
||||
<entry>y<subscript>7</subscript></entry>
|
||||
<entry>y<subscript>6</subscript></entry>
|
||||
<entry>y<subscript>5</subscript></entry>
|
||||
<entry>y<subscript>4</subscript></entry>
|
||||
<entry>y<subscript>3</subscript></entry>
|
||||
<entry>y<subscript>2</subscript></entry>
|
||||
<entry>y<subscript>1</subscript></entry>
|
||||
<entry>y<subscript>0</subscript></entry>
|
||||
</row>
|
||||
<row id="V4L2-MBUS-FMT-UYVY8-1X16">
|
||||
<entry>V4L2_MBUS_FMT_UYVY8_1X16</entry>
|
||||
<entry>0x200f</entry>
|
||||
|
|
|
|||
|
|
@ -52,8 +52,10 @@ Brief summary of control files.
|
|||
tasks # attach a task(thread) and show list of threads
|
||||
cgroup.procs # show list of processes
|
||||
cgroup.event_control # an interface for event_fd()
|
||||
memory.usage_in_bytes # show current memory(RSS+Cache) usage.
|
||||
memory.memsw.usage_in_bytes # show current memory+Swap usage
|
||||
memory.usage_in_bytes # show current res_counter usage for memory
|
||||
(See 5.5 for details)
|
||||
memory.memsw.usage_in_bytes # show current res_counter usage for memory+Swap
|
||||
(See 5.5 for details)
|
||||
memory.limit_in_bytes # set/show limit of memory usage
|
||||
memory.memsw.limit_in_bytes # set/show limit of memory+Swap usage
|
||||
memory.failcnt # show the number of memory usage hits limits
|
||||
|
|
@ -453,6 +455,15 @@ memory under it will be reclaimed.
|
|||
You can reset failcnt by writing 0 to failcnt file.
|
||||
# echo 0 > .../memory.failcnt
|
||||
|
||||
5.5 usage_in_bytes
|
||||
|
||||
For efficiency, as other kernel components, memory cgroup uses some optimization
|
||||
to avoid unnecessary cacheline false sharing. usage_in_bytes is affected by the
|
||||
method and doesn't show 'exact' value of memory(and swap) usage, it's an fuzz
|
||||
value for efficient access. (Of course, when necessary, it's synchronized.)
|
||||
If you want to know more exact memory usage, you should use RSS+CACHE(+SWAP)
|
||||
value in memory.stat(see 5.2).
|
||||
|
||||
6. Hierarchy support
|
||||
|
||||
The memory controller supports a deep hierarchy and hierarchical accounting.
|
||||
|
|
|
|||
|
|
@ -66,10 +66,10 @@ trick is to ensure that any needed memory allocations are done before
|
|||
entering atomic context, using:
|
||||
|
||||
int flex_array_prealloc(struct flex_array *array, unsigned int start,
|
||||
unsigned int end, gfp_t flags);
|
||||
unsigned int nr_elements, gfp_t flags);
|
||||
|
||||
This function will ensure that memory for the elements indexed in the range
|
||||
defined by start and end has been allocated. Thereafter, a
|
||||
defined by start and nr_elements has been allocated. Thereafter, a
|
||||
flex_array_put() call on an element in that range is guaranteed not to
|
||||
block.
|
||||
|
||||
|
|
|
|||
|
|
@ -14,10 +14,6 @@ Supported chips:
|
|||
Prefix: 'gl523sm'
|
||||
Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
|
||||
Datasheet:
|
||||
* Intel Xeon Processor
|
||||
Prefix: - any other - may require 'force_adm1021' parameter
|
||||
Addresses scanned: none
|
||||
Datasheet: Publicly available at Intel website
|
||||
* Maxim MAX1617
|
||||
Prefix: 'max1617'
|
||||
Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
|
||||
|
|
@ -91,21 +87,27 @@ will do no harm, but will return 'old' values. It is possible to make
|
|||
ADM1021-clones do faster measurements, but there is really no good reason
|
||||
for that.
|
||||
|
||||
Xeon support
|
||||
------------
|
||||
|
||||
Some Xeon processors have real max1617, adm1021, or compatible chips
|
||||
within them, with two temperature sensors.
|
||||
Netburst-based Xeon support
|
||||
---------------------------
|
||||
|
||||
Other Xeons have chips with only one sensor.
|
||||
Some Xeon processors based on the Netburst (early Pentium 4, from 2001 to
|
||||
2003) microarchitecture had real MAX1617, ADM1021, or compatible chips
|
||||
within them, with two temperature sensors. Other Xeon processors of this
|
||||
era (with 400 MHz FSB) had chips with only one temperature sensor.
|
||||
|
||||
If you have a Xeon, and the adm1021 module loads, and both temperatures
|
||||
appear valid, then things are good.
|
||||
If you have such an old Xeon, and you get two valid temperatures when
|
||||
loading the adm1021 module, then things are good.
|
||||
|
||||
If the adm1021 module doesn't load, you should try this:
|
||||
modprobe adm1021 force_adm1021=BUS,ADDRESS
|
||||
ADDRESS can only be 0x18, 0x1a, 0x29, 0x2b, 0x4c, or 0x4e.
|
||||
If nothing happens when loading the adm1021 module, and you are certain
|
||||
that your specific Xeon processor model includes compatible sensors, you
|
||||
will have to explicitly instantiate the sensor chips from user-space. See
|
||||
method 4 in Documentation/i2c/instantiating-devices. Possible slave
|
||||
addresses are 0x18, 0x1a, 0x29, 0x2b, 0x4c, or 0x4e. It is likely that
|
||||
only temp2 will be correct and temp1 will have to be ignored.
|
||||
|
||||
If you have dual Xeons you may have appear to have two separate
|
||||
adm1021-compatible chips, or two single-temperature sensors, at distinct
|
||||
addresses.
|
||||
Previous generations of the Xeon processor (based on Pentium II/III)
|
||||
didn't have these sensors. Next generations of Xeon processors (533 MHz
|
||||
FSB and faster) lost them, until the Core-based generation which
|
||||
introduced integrated digital thermal sensors. These are supported by
|
||||
the coretemp driver.
|
||||
|
|
|
|||
|
|
@ -32,6 +32,16 @@ Supported chips:
|
|||
Addresses scanned: I2C 0x4c and 0x4d
|
||||
Datasheet: Publicly available at the ON Semiconductor website
|
||||
http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
|
||||
* Analog Devices ADT7461A
|
||||
Prefix: 'adt7461a'
|
||||
Addresses scanned: I2C 0x4c and 0x4d
|
||||
Datasheet: Publicly available at the ON Semiconductor website
|
||||
http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461A
|
||||
* ON Semiconductor NCT1008
|
||||
Prefix: 'nct1008'
|
||||
Addresses scanned: I2C 0x4c and 0x4d
|
||||
Datasheet: Publicly available at the ON Semiconductor website
|
||||
http://www.onsemi.com/PowerSolutions/product.do?id=NCT1008
|
||||
* Maxim MAX6646
|
||||
Prefix: 'max6646'
|
||||
Addresses scanned: I2C 0x4d
|
||||
|
|
@ -149,7 +159,7 @@ ADM1032:
|
|||
* ALERT is triggered by open remote sensor.
|
||||
* SMBus PEC support for Write Byte and Receive Byte transactions.
|
||||
|
||||
ADT7461:
|
||||
ADT7461, ADT7461A, NCT1008:
|
||||
* Extended temperature range (breaks compatibility)
|
||||
* Lower resolution for remote temperature
|
||||
|
||||
|
|
@ -195,9 +205,9 @@ are exported, one for each channel, but these values are of course linked.
|
|||
Only the local hysteresis can be set from user-space, and the same delta
|
||||
applies to the remote hysteresis.
|
||||
|
||||
The lm90 driver will not update its values more frequently than every
|
||||
other second; reading them more often will do no harm, but will return
|
||||
'old' values.
|
||||
The lm90 driver will not update its values more frequently than configured with
|
||||
the update_interval attribute; reading them more often will do no harm, but will
|
||||
return 'old' values.
|
||||
|
||||
SMBus Alert Support
|
||||
-------------------
|
||||
|
|
@ -205,11 +215,12 @@ SMBus Alert Support
|
|||
This driver has basic support for SMBus alert. When an alert is received,
|
||||
the status register is read and the faulty temperature channel is logged.
|
||||
|
||||
The Analog Devices chips (ADM1032 and ADT7461) do not implement the SMBus
|
||||
alert protocol properly so additional care is needed: the ALERT output is
|
||||
disabled when an alert is received, and is re-enabled only when the alarm
|
||||
is gone. Otherwise the chip would block alerts from other chips in the bus
|
||||
as long as the alarm is active.
|
||||
The Analog Devices chips (ADM1032, ADT7461 and ADT7461A) and ON
|
||||
Semiconductor chips (NCT1008) do not implement the SMBus alert protocol
|
||||
properly so additional care is needed: the ALERT output is disabled when
|
||||
an alert is received, and is re-enabled only when the alarm is gone.
|
||||
Otherwise the chip would block alerts from other chips in the bus as long
|
||||
as the alarm is active.
|
||||
|
||||
PEC Support
|
||||
-----------
|
||||
|
|
|
|||
|
|
@ -0,0 +1,62 @@
|
|||
Kernel driver max16064
|
||||
======================
|
||||
|
||||
Supported chips:
|
||||
* Maxim MAX16064
|
||||
Prefix: 'max16064'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX16064.pdf
|
||||
|
||||
Author: Guenter Roeck <guenter.roeck@ericsson.com>
|
||||
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
This driver supports hardware montoring for Maxim MAX16064 Quad Power-Supply
|
||||
Controller with Active-Voltage Output Control and PMBus Interface.
|
||||
|
||||
The driver is a client driver to the core PMBus driver.
|
||||
Please see Documentation/hwmon/pmbus for details on PMBus client drivers.
|
||||
|
||||
|
||||
Usage Notes
|
||||
-----------
|
||||
|
||||
This driver does not auto-detect devices. You will have to instantiate the
|
||||
devices explicitly. Please see Documentation/i2c/instantiating-devices for
|
||||
details.
|
||||
|
||||
|
||||
Platform data support
|
||||
---------------------
|
||||
|
||||
The driver supports standard PMBus driver platform data.
|
||||
|
||||
|
||||
Sysfs entries
|
||||
-------------
|
||||
|
||||
The following attributes are supported. Limits are read-write; all other
|
||||
attributes are read-only.
|
||||
|
||||
in[1-4]_label "vout[1-4]"
|
||||
in[1-4]_input Measured voltage. From READ_VOUT register.
|
||||
in[1-4]_min Minumum Voltage. From VOUT_UV_WARN_LIMIT register.
|
||||
in[1-4]_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
|
||||
in[1-4]_lcrit Critical minumum Voltage. VOUT_UV_FAULT_LIMIT register.
|
||||
in[1-4]_crit Critical maximum voltage. From VOUT_OV_FAULT_LIMIT register.
|
||||
in[1-4]_min_alarm Voltage low alarm. From VOLTAGE_UV_WARNING status.
|
||||
in[1-4]_max_alarm Voltage high alarm. From VOLTAGE_OV_WARNING status.
|
||||
in[1-4]_lcrit_alarm Voltage critical low alarm. From VOLTAGE_UV_FAULT status.
|
||||
in[1-4]_crit_alarm Voltage critical high alarm. From VOLTAGE_OV_FAULT status.
|
||||
|
||||
temp1_input Measured temperature. From READ_TEMPERATURE_1 register.
|
||||
temp1_max Maximum temperature. From OT_WARN_LIMIT register.
|
||||
temp1_crit Critical high temperature. From OT_FAULT_LIMIT register.
|
||||
temp1_max_alarm Chip temperature high alarm. Set by comparing
|
||||
READ_TEMPERATURE_1 with OT_WARN_LIMIT if TEMP_OT_WARNING
|
||||
status is set.
|
||||
temp1_crit_alarm Chip temperature critical high alarm. Set by comparing
|
||||
READ_TEMPERATURE_1 with OT_FAULT_LIMIT if TEMP_OT_FAULT
|
||||
status is set.
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
Kernel driver max34440
|
||||
======================
|
||||
|
||||
Supported chips:
|
||||
* Maxim MAX34440
|
||||
Prefixes: 'max34440'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX34440.pdf
|
||||
* Maxim MAX34441
|
||||
PMBus 5-Channel Power-Supply Manager and Intelligent Fan Controller
|
||||
Prefixes: 'max34441'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX34441.pdf
|
||||
|
||||
Author: Guenter Roeck <guenter.roeck@ericsson.com>
|
||||
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
This driver supports hardware montoring for Maxim MAX34440 PMBus 6-Channel
|
||||
Power-Supply Manager and MAX34441 PMBus 5-Channel Power-Supply Manager
|
||||
and Intelligent Fan Controller.
|
||||
|
||||
The driver is a client driver to the core PMBus driver. Please see
|
||||
Documentation/hwmon/pmbus for details on PMBus client drivers.
|
||||
|
||||
|
||||
Usage Notes
|
||||
-----------
|
||||
|
||||
This driver does not auto-detect devices. You will have to instantiate the
|
||||
devices explicitly. Please see Documentation/i2c/instantiating-devices for
|
||||
details.
|
||||
|
||||
|
||||
Platform data support
|
||||
---------------------
|
||||
|
||||
The driver supports standard PMBus driver platform data.
|
||||
|
||||
|
||||
Sysfs entries
|
||||
-------------
|
||||
|
||||
The following attributes are supported. Limits are read-write; all other
|
||||
attributes are read-only.
|
||||
|
||||
in[1-6]_label "vout[1-6]".
|
||||
in[1-6]_input Measured voltage. From READ_VOUT register.
|
||||
in[1-6]_min Minumum Voltage. From VOUT_UV_WARN_LIMIT register.
|
||||
in[1-6]_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
|
||||
in[1-6]_lcrit Critical minumum Voltage. VOUT_UV_FAULT_LIMIT register.
|
||||
in[1-6]_crit Critical maximum voltage. From VOUT_OV_FAULT_LIMIT register.
|
||||
in[1-6]_min_alarm Voltage low alarm. From VOLTAGE_UV_WARNING status.
|
||||
in[1-6]_max_alarm Voltage high alarm. From VOLTAGE_OV_WARNING status.
|
||||
in[1-6]_lcrit_alarm Voltage critical low alarm. From VOLTAGE_UV_FAULT status.
|
||||
in[1-6]_crit_alarm Voltage critical high alarm. From VOLTAGE_OV_FAULT status.
|
||||
|
||||
curr[1-6]_label "iout[1-6]".
|
||||
curr[1-6]_input Measured current. From READ_IOUT register.
|
||||
curr[1-6]_max Maximum current. From IOUT_OC_WARN_LIMIT register.
|
||||
curr[1-6]_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT register.
|
||||
curr[1-6]_max_alarm Current high alarm. From IOUT_OC_WARNING status.
|
||||
curr[1-6]_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status.
|
||||
|
||||
in6 and curr6 attributes only exist for MAX34440.
|
||||
|
||||
temp[1-8]_input Measured temperatures. From READ_TEMPERATURE_1 register.
|
||||
temp1 is the chip's internal temperature. temp2..temp5
|
||||
are remote I2C temperature sensors. For MAX34441, temp6
|
||||
is a remote thermal-diode sensor. For MAX34440, temp6..8
|
||||
are remote I2C temperature sensors.
|
||||
temp[1-8]_max Maximum temperature. From OT_WARN_LIMIT register.
|
||||
temp[1-8]_crit Critical high temperature. From OT_FAULT_LIMIT register.
|
||||
temp[1-8]_max_alarm Temperature high alarm.
|
||||
temp[1-8]_crit_alarm Temperature critical high alarm.
|
||||
|
||||
temp7 and temp8 attributes only exist for MAX34440.
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
Kernel driver max8688
|
||||
=====================
|
||||
|
||||
Supported chips:
|
||||
* Maxim MAX8688
|
||||
Prefix: 'max8688'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8688.pdf
|
||||
|
||||
Author: Guenter Roeck <guenter.roeck@ericsson.com>
|
||||
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
This driver supports hardware montoring for Maxim MAX8688 Digital Power-Supply
|
||||
Controller/Monitor with PMBus Interface.
|
||||
|
||||
The driver is a client driver to the core PMBus driver. Please see
|
||||
Documentation/hwmon/pmbus for details on PMBus client drivers.
|
||||
|
||||
|
||||
Usage Notes
|
||||
-----------
|
||||
|
||||
This driver does not auto-detect devices. You will have to instantiate the
|
||||
devices explicitly. Please see Documentation/i2c/instantiating-devices for
|
||||
details.
|
||||
|
||||
|
||||
Platform data support
|
||||
---------------------
|
||||
|
||||
The driver supports standard PMBus driver platform data.
|
||||
|
||||
|
||||
Sysfs entries
|
||||
-------------
|
||||
|
||||
The following attributes are supported. Limits are read-write; all other
|
||||
attributes are read-only.
|
||||
|
||||
in1_label "vout1"
|
||||
in1_input Measured voltage. From READ_VOUT register.
|
||||
in1_min Minumum Voltage. From VOUT_UV_WARN_LIMIT register.
|
||||
in1_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
|
||||
in1_lcrit Critical minumum Voltage. VOUT_UV_FAULT_LIMIT register.
|
||||
in1_crit Critical maximum voltage. From VOUT_OV_FAULT_LIMIT register.
|
||||
in1_min_alarm Voltage low alarm. From VOLTAGE_UV_WARNING status.
|
||||
in1_max_alarm Voltage high alarm. From VOLTAGE_OV_WARNING status.
|
||||
in1_lcrit_alarm Voltage critical low alarm. From VOLTAGE_UV_FAULT status.
|
||||
in1_crit_alarm Voltage critical high alarm. From VOLTAGE_OV_FAULT status.
|
||||
|
||||
curr1_label "iout1"
|
||||
curr1_input Measured current. From READ_IOUT register.
|
||||
curr1_max Maximum current. From IOUT_OC_WARN_LIMIT register.
|
||||
curr1_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT register.
|
||||
curr1_max_alarm Current high alarm. From IOUT_OC_WARN_LIMIT register.
|
||||
curr1_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status.
|
||||
|
||||
temp1_input Measured temperature. From READ_TEMPERATURE_1 register.
|
||||
temp1_max Maximum temperature. From OT_WARN_LIMIT register.
|
||||
temp1_crit Critical high temperature. From OT_FAULT_LIMIT register.
|
||||
temp1_max_alarm Chip temperature high alarm. Set by comparing
|
||||
READ_TEMPERATURE_1 with OT_WARN_LIMIT if TEMP_OT_WARNING
|
||||
status is set.
|
||||
temp1_crit_alarm Chip temperature critical high alarm. Set by comparing
|
||||
READ_TEMPERATURE_1 with OT_FAULT_LIMIT if TEMP_OT_FAULT
|
||||
status is set.
|
||||
|
|
@ -13,26 +13,6 @@ Supported chips:
|
|||
Prefix: 'ltc2978'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://cds.linear.com/docs/Datasheet/2978fa.pdf
|
||||
* Maxim MAX16064
|
||||
Quad Power-Supply Controller
|
||||
Prefix: 'max16064'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX16064.pdf
|
||||
* Maxim MAX34440
|
||||
PMBus 6-Channel Power-Supply Manager
|
||||
Prefixes: 'max34440'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX34440.pdf
|
||||
* Maxim MAX34441
|
||||
PMBus 5-Channel Power-Supply Manager and Intelligent Fan Controller
|
||||
Prefixes: 'max34441'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX34441.pdf
|
||||
* Maxim MAX8688
|
||||
Digital Power-Supply Controller/Monitor
|
||||
Prefix: 'max8688'
|
||||
Addresses scanned: -
|
||||
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8688.pdf
|
||||
* Generic PMBus devices
|
||||
Prefix: 'pmbus'
|
||||
Addresses scanned: -
|
||||
|
|
@ -175,11 +155,13 @@ currX_crit Critical maximum current.
|
|||
From IIN_OC_FAULT_LIMIT or IOUT_OC_FAULT_LIMIT register.
|
||||
currX_alarm Current high alarm.
|
||||
From IIN_OC_WARNING or IOUT_OC_WARNING status.
|
||||
currX_max_alarm Current high alarm.
|
||||
From IIN_OC_WARN_LIMIT or IOUT_OC_WARN_LIMIT status.
|
||||
currX_lcrit_alarm Output current critical low alarm.
|
||||
From IOUT_UC_FAULT status.
|
||||
currX_crit_alarm Current critical high alarm.
|
||||
From IIN_OC_FAULT or IOUT_OC_FAULT status.
|
||||
currX_label "iin" or "vinY"
|
||||
currX_label "iin" or "ioutY"
|
||||
|
||||
powerX_input Measured power. From READ_PIN or READ_POUT register.
|
||||
powerX_cap Output power cap. From POUT_MAX register.
|
||||
|
|
@ -193,13 +175,13 @@ powerX_crit_alarm Output power critical high alarm.
|
|||
From POUT_OP_FAULT status.
|
||||
powerX_label "pin" or "poutY"
|
||||
|
||||
tempX_input Measured tempererature.
|
||||
tempX_input Measured temperature.
|
||||
From READ_TEMPERATURE_X register.
|
||||
tempX_min Mimimum tempererature. From UT_WARN_LIMIT register.
|
||||
tempX_max Maximum tempererature. From OT_WARN_LIMIT register.
|
||||
tempX_lcrit Critical low tempererature.
|
||||
tempX_min Mimimum temperature. From UT_WARN_LIMIT register.
|
||||
tempX_max Maximum temperature. From OT_WARN_LIMIT register.
|
||||
tempX_lcrit Critical low temperature.
|
||||
From UT_FAULT_LIMIT register.
|
||||
tempX_crit Critical high tempererature.
|
||||
tempX_crit Critical high temperature.
|
||||
From OT_FAULT_LIMIT register.
|
||||
tempX_min_alarm Chip temperature low alarm. Set by comparing
|
||||
READ_TEMPERATURE_X with UT_WARN_LIMIT if
|
||||
|
|
|
|||
|
|
@ -150,8 +150,8 @@ in8_crit_alarm Channel F critical alarm
|
|||
in9_crit_alarm AIN1 critical alarm
|
||||
in10_crit_alarm AIN2 critical alarm
|
||||
|
||||
temp1_input Chip tempererature
|
||||
temp1_min Mimimum chip tempererature
|
||||
temp1_max Maximum chip tempererature
|
||||
temp1_crit Critical chip tempererature
|
||||
temp1_input Chip temperature
|
||||
temp1_min Mimimum chip temperature
|
||||
temp1_max Maximum chip temperature
|
||||
temp1_crit Critical chip temperature
|
||||
temp1_crit_alarm Temperature critical alarm
|
||||
|
|
|
|||
|
|
@ -0,0 +1,109 @@
|
|||
How to Get Your Patch Accepted Into the Hwmon Subsystem
|
||||
-------------------------------------------------------
|
||||
|
||||
This text is is a collection of suggestions for people writing patches or
|
||||
drivers for the hwmon subsystem. Following these suggestions will greatly
|
||||
increase the chances of your change being accepted.
|
||||
|
||||
|
||||
1. General
|
||||
----------
|
||||
|
||||
* It should be unnecessary to mention, but please read and follow
|
||||
Documentation/SubmitChecklist
|
||||
Documentation/SubmittingDrivers
|
||||
Documentation/SubmittingPatches
|
||||
Documentation/CodingStyle
|
||||
|
||||
* If your patch generates checkpatch warnings, please refrain from explanations
|
||||
such as "I don't like that coding style". Keep in mind that each unnecessary
|
||||
warning helps hiding a real problem. If you don't like the kernel coding
|
||||
style, don't write kernel drivers.
|
||||
|
||||
* Please test your patch thoroughly. We are not your test group.
|
||||
Sometimes a patch can not or not completely be tested because of missing
|
||||
hardware. In such cases, you should test-build the code on at least one
|
||||
architecture. If run-time testing was not achieved, it should be written
|
||||
explicitly below the patch header.
|
||||
|
||||
* If your patch (or the driver) is affected by configuration options such as
|
||||
CONFIG_SMP or CONFIG_HOTPLUG, make sure it compiles for all configuration
|
||||
variants.
|
||||
|
||||
|
||||
2. Adding functionality to existing drivers
|
||||
-------------------------------------------
|
||||
|
||||
* Make sure the documentation in Documentation/hwmon/<driver_name> is up to
|
||||
date.
|
||||
|
||||
* Make sure the information in Kconfig is up to date.
|
||||
|
||||
* If the added functionality requires some cleanup or structural changes, split
|
||||
your patch into a cleanup part and the actual addition. This makes it easier
|
||||
to review your changes, and to bisect any resulting problems.
|
||||
|
||||
* Never mix bug fixes, cleanup, and functional enhancements in a single patch.
|
||||
|
||||
|
||||
3. New drivers
|
||||
--------------
|
||||
|
||||
* Running your patch or driver file(s) through checkpatch does not mean its
|
||||
formatting is clean. If unsure about formatting in your new driver, run it
|
||||
through Lindent. Lindent is not perfect, and you may have to do some minor
|
||||
cleanup, but it is a good start.
|
||||
|
||||
* Consider adding yourself to MAINTAINERS.
|
||||
|
||||
* Document the driver in Documentation/hwmon/<driver_name>.
|
||||
|
||||
* Add the driver to Kconfig and Makefile in alphabetical order.
|
||||
|
||||
* Make sure that all dependencies are listed in Kconfig. For new drivers, it
|
||||
is most likely prudent to add a dependency on EXPERIMENTAL.
|
||||
|
||||
* Avoid forward declarations if you can. Rearrange the code if necessary.
|
||||
|
||||
* Avoid calculations in macros and macro-generated functions. While such macros
|
||||
may save a line or so in the source, it obfuscates the code and makes code
|
||||
review more difficult. It may also result in code which is more complicated
|
||||
than necessary. Use inline functions or just regular functions instead.
|
||||
|
||||
* If the driver has a detect function, make sure it is silent. Debug messages
|
||||
and messages printed after a successful detection are acceptable, but it
|
||||
must not print messages such as "Chip XXX not found/supported".
|
||||
|
||||
Keep in mind that the detect function will run for all drivers supporting an
|
||||
address if a chip is detected on that address. Unnecessary messages will just
|
||||
pollute the kernel log and not provide any value.
|
||||
|
||||
* Provide a detect function if and only if a chip can be detected reliably.
|
||||
|
||||
* Avoid writing to chip registers in the detect function. If you have to write,
|
||||
only do it after you have already gathered enough data to be certain that the
|
||||
detection is going to be successful.
|
||||
|
||||
Keep in mind that the chip might not be what your driver believes it is, and
|
||||
writing to it might cause a bad misconfiguration.
|
||||
|
||||
* Make sure there are no race conditions in the probe function. Specifically,
|
||||
completely initialize your chip first, then create sysfs entries and register
|
||||
with the hwmon subsystem.
|
||||
|
||||
* Do not provide support for deprecated sysfs attributes.
|
||||
|
||||
* Do not create non-standard attributes unless really needed. If you have to use
|
||||
non-standard attributes, or you believe you do, discuss it on the mailing list
|
||||
first. Either case, provide a detailed explanation why you need the
|
||||
non-standard attribute(s).
|
||||
Standard attributes are specified in Documentation/hwmon/sysfs-interface.
|
||||
|
||||
* When deciding which sysfs attributes to support, look at the chip's
|
||||
capabilities. While we do not expect your driver to support everything the
|
||||
chip may offer, it should at least support all limits and alarms.
|
||||
|
||||
* Last but not least, please check if a driver for your chip already exists
|
||||
before starting to write a new driver. Especially for temperature sensors,
|
||||
new chips are often variants of previously released chips. In some cases,
|
||||
a presumably new chip may simply have been relabeled.
|
||||
|
|
@ -552,6 +552,16 @@ also have
|
|||
within the array where IO will be blocked. This is currently
|
||||
only supported for raid4/5/6.
|
||||
|
||||
sync_min
|
||||
sync_max
|
||||
The two values, given as numbers of sectors, indicate a range
|
||||
withing the array where 'check'/'repair' will operate. Must be
|
||||
a multiple of chunk_size. When it reaches "sync_max" it will
|
||||
pause, rather than complete.
|
||||
You can use 'select' or 'poll' on "sync_completed" to wait for
|
||||
that number to reach sync_max. Then you can either increase
|
||||
"sync_max", or can write 'idle' to "sync_action".
|
||||
|
||||
|
||||
Each active md device may also have attributes specific to the
|
||||
personality module that manages it.
|
||||
|
|
|
|||
|
|
@ -87,14 +87,14 @@ accumulator. ALSA uses accumulators 0 and 1 for left and right PCM.
|
|||
The result is forwarded to the ADC capture FIFO (thus to the standard capture
|
||||
PCM device).
|
||||
|
||||
name='Music Playback Volume',index=0
|
||||
name='Synth Playback Volume',index=0
|
||||
|
||||
This control is used to attenuate samples for left and right MIDI FX-bus
|
||||
accumulators. ALSA uses accumulators 4 and 5 for left and right MIDI samples.
|
||||
The result samples are forwarded to the front DAC PCM slots of the AC97 codec.
|
||||
|
||||
name='Music Capture Volume',index=0
|
||||
name='Music Capture Switch',index=0
|
||||
name='Synth Capture Volume',index=0
|
||||
name='Synth Capture Switch',index=0
|
||||
|
||||
These controls are used to attenuate samples for left and right MIDI FX-bus
|
||||
accumulator. ALSA uses accumulators 4 and 5 for left and right PCM.
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ Generic scaling / cropping scheme
|
|||
-1'-
|
||||
|
||||
In the above chart minuses and slashes represent "real" data amounts, points and
|
||||
accents represent "useful" data, basically, CEU scaled amd cropped output,
|
||||
accents represent "useful" data, basically, CEU scaled and cropped output,
|
||||
mapped back onto the client's source plane.
|
||||
|
||||
Such a configuration can be produced by user requests:
|
||||
|
|
@ -65,7 +65,7 @@ Do not touch input rectangle - it is already optimal.
|
|||
|
||||
1. Calculate current sensor scales:
|
||||
|
||||
scale_s = ((3') - (3)) / ((2') - (2))
|
||||
scale_s = ((2') - (2)) / ((3') - (3))
|
||||
|
||||
2. Calculate "effective" input crop (sensor subwindow) - CEU crop scaled back at
|
||||
current sensor scales onto input window - this is user S_CROP:
|
||||
|
|
@ -80,7 +80,7 @@ window:
|
|||
4. Calculate sensor output window by applying combined scales to real input
|
||||
window:
|
||||
|
||||
width_s_out = ((2') - (2)) / scale_comb
|
||||
width_s_out = ((7') - (7)) = ((2') - (2)) / scale_comb
|
||||
|
||||
5. Apply iterative sensor S_FMT for sensor output window.
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ CONTENTS
|
|||
4. Application Programming Interface (API)
|
||||
5. Example Execution Scenarios
|
||||
6. Guidelines
|
||||
7. Debugging
|
||||
|
||||
|
||||
1. Introduction
|
||||
|
|
@ -379,3 +380,42 @@ If q1 has WQ_CPU_INTENSIVE set,
|
|||
* Unless work items are expected to consume a huge amount of CPU
|
||||
cycles, using a bound wq is usually beneficial due to the increased
|
||||
level of locality in wq operations and work item execution.
|
||||
|
||||
|
||||
7. Debugging
|
||||
|
||||
Because the work functions are executed by generic worker threads
|
||||
there are a few tricks needed to shed some light on misbehaving
|
||||
workqueue users.
|
||||
|
||||
Worker threads show up in the process list as:
|
||||
|
||||
root 5671 0.0 0.0 0 0 ? S 12:07 0:00 [kworker/0:1]
|
||||
root 5672 0.0 0.0 0 0 ? S 12:07 0:00 [kworker/1:2]
|
||||
root 5673 0.0 0.0 0 0 ? S 12:12 0:00 [kworker/0:0]
|
||||
root 5674 0.0 0.0 0 0 ? S 12:13 0:00 [kworker/1:0]
|
||||
|
||||
If kworkers are going crazy (using too much cpu), there are two types
|
||||
of possible problems:
|
||||
|
||||
1. Something beeing scheduled in rapid succession
|
||||
2. A single work item that consumes lots of cpu cycles
|
||||
|
||||
The first one can be tracked using tracing:
|
||||
|
||||
$ echo workqueue:workqueue_queue_work > /sys/kernel/debug/tracing/set_event
|
||||
$ cat /sys/kernel/debug/tracing/trace_pipe > out.txt
|
||||
(wait a few secs)
|
||||
^C
|
||||
|
||||
If something is busy looping on work queueing, it would be dominating
|
||||
the output and the offender can be determined with the work item
|
||||
function.
|
||||
|
||||
For the second type of problems it should be possible to just check
|
||||
the stack trace of the offending worker thread.
|
||||
|
||||
$ cat /proc/THE_OFFENDING_KWORKER/stack
|
||||
|
||||
The work item's function should be trivially visible in the stack
|
||||
trace.
|
||||
|
|
|
|||
114
MAINTAINERS
114
MAINTAINERS
|
|
@ -151,6 +151,7 @@ S: Maintained
|
|||
F: drivers/net/hamradio/6pack.c
|
||||
|
||||
8169 10/100/1000 GIGABIT ETHERNET DRIVER
|
||||
M: Realtek linux nic maintainers <nic_swsd@realtek.com>
|
||||
M: Francois Romieu <romieu@fr.zoreil.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -1031,12 +1032,13 @@ W: http://www.fluff.org/ben/linux/
|
|||
S: Maintained
|
||||
F: arch/arm/mach-s3c64xx/
|
||||
|
||||
ARM/S5P ARM ARCHITECTURES
|
||||
ARM/S5P EXYNOS ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s5p*/
|
||||
F: arch/arm/mach-exynos*/
|
||||
|
||||
ARM/SAMSUNG MOBILE MACHINE SUPPORT
|
||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
|
|
@ -2807,42 +2809,23 @@ GPIO SUBSYSTEM
|
|||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
S: Maintained
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
F: Documentation/gpio/gpio.txt
|
||||
F: Documentation/gpio.txt
|
||||
F: drivers/gpio/
|
||||
F: include/linux/gpio*
|
||||
|
||||
GRE DEMULTIPLEXER DRIVER
|
||||
M: Dmitry Kozlov <xeb@mail.ru>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: net/ipv4/gre.c
|
||||
F: include/net/gre.h
|
||||
|
||||
GRETH 10/100/1G Ethernet MAC device driver
|
||||
M: Kristoffer Glembo <kristoffer@gaisler.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/greth*
|
||||
|
||||
HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER
|
||||
M: Frank Seidel <frank@f-seidel.de>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
W: http://www.kernel.org/pub/linux/kernel/people/fseidel/hdaps/
|
||||
S: Maintained
|
||||
F: drivers/platform/x86/hdaps.c
|
||||
|
||||
HWPOISON MEMORY FAILURE HANDLING
|
||||
M: Andi Kleen <andi@firstfloor.org>
|
||||
L: linux-mm@kvack.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-mce-2.6.git hwpoison
|
||||
S: Maintained
|
||||
F: mm/memory-failure.c
|
||||
F: mm/hwpoison-inject.c
|
||||
|
||||
HYPERVISOR VIRTUAL CONSOLE DRIVER
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Odd Fixes
|
||||
F: drivers/tty/hvc/
|
||||
|
||||
iSCSI BOOT FIRMWARE TABLE (iBFT) DRIVER
|
||||
M: Peter Jones <pjones@redhat.com>
|
||||
M: Konrad Rzeszutek Wilk <konrad@kernel.org>
|
||||
S: Maintained
|
||||
F: drivers/firmware/iscsi_ibft*
|
||||
|
||||
GSPCA FINEPIX SUBDRIVER
|
||||
M: Frank Zago <frank@zago.net>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -2893,6 +2876,26 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
|||
S: Maintained
|
||||
F: drivers/media/video/gspca/
|
||||
|
||||
HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER
|
||||
M: Frank Seidel <frank@f-seidel.de>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
W: http://www.kernel.org/pub/linux/kernel/people/fseidel/hdaps/
|
||||
S: Maintained
|
||||
F: drivers/platform/x86/hdaps.c
|
||||
|
||||
HWPOISON MEMORY FAILURE HANDLING
|
||||
M: Andi Kleen <andi@firstfloor.org>
|
||||
L: linux-mm@kvack.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-mce-2.6.git hwpoison
|
||||
S: Maintained
|
||||
F: mm/memory-failure.c
|
||||
F: mm/hwpoison-inject.c
|
||||
|
||||
HYPERVISOR VIRTUAL CONSOLE DRIVER
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Odd Fixes
|
||||
F: drivers/tty/hvc/
|
||||
|
||||
HARDWARE MONITORING
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
M: Guenter Roeck <guenter.roeck@ericsson.com>
|
||||
|
|
@ -3476,6 +3479,12 @@ F: Documentation/isapnp.txt
|
|||
F: drivers/pnp/isapnp/
|
||||
F: include/linux/isapnp.h
|
||||
|
||||
iSCSI BOOT FIRMWARE TABLE (iBFT) DRIVER
|
||||
M: Peter Jones <pjones@redhat.com>
|
||||
M: Konrad Rzeszutek Wilk <konrad@kernel.org>
|
||||
S: Maintained
|
||||
F: drivers/firmware/iscsi_ibft*
|
||||
|
||||
ISCSI
|
||||
M: Mike Christie <michaelc@cs.wisc.edu>
|
||||
L: open-iscsi@googlegroups.com
|
||||
|
|
@ -4987,6 +4996,13 @@ F: Documentation/pps/
|
|||
F: drivers/pps/
|
||||
F: include/linux/pps*.h
|
||||
|
||||
PPTP DRIVER
|
||||
M: Dmitry Kozlov <xeb@mail.ru>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/pptp.c
|
||||
W: http://sourceforge.net/projects/accel-pptp
|
||||
|
||||
PREEMPTIBLE KERNEL
|
||||
M: Robert Love <rml@tech9.net>
|
||||
L: kpreempt-tech@lists.sourceforge.net
|
||||
|
|
@ -5395,7 +5411,7 @@ F: drivers/media/video/*7146*
|
|||
F: include/media/*7146*
|
||||
|
||||
SAMSUNG AUDIO (ASoC) DRIVERS
|
||||
M: Jassi Brar <jassi.brar@samsung.com>
|
||||
M: Jassi Brar <jassisinghbrar@gmail.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: sound/soc/samsung
|
||||
|
|
@ -6554,7 +6570,7 @@ S: Maintained
|
|||
F: drivers/usb/host/uhci*
|
||||
|
||||
USB "USBNET" DRIVER FRAMEWORK
|
||||
M: David Brownell <dbrownell@users.sourceforge.net>
|
||||
M: Oliver Neukum <oneukum@suse.de>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.linux-usb.org/usbnet
|
||||
S: Maintained
|
||||
|
|
@ -6920,6 +6936,18 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mjg59/platform-drivers-x86.
|
|||
S: Maintained
|
||||
F: drivers/platform/x86
|
||||
|
||||
XEN HYPERVISOR INTERFACE
|
||||
M: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
S: Supported
|
||||
F: arch/x86/xen/
|
||||
F: drivers/*/xen-*front.c
|
||||
F: drivers/xen/
|
||||
F: arch/x86/include/asm/xen/
|
||||
F: include/xen/
|
||||
|
||||
XEN NETWORK BACKEND DRIVER
|
||||
M: Ian Campbell <ian.campbell@citrix.com>
|
||||
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
||||
|
|
@ -6941,18 +6969,6 @@ S: Supported
|
|||
F: arch/x86/xen/*swiotlb*
|
||||
F: drivers/xen/*swiotlb*
|
||||
|
||||
XEN HYPERVISOR INTERFACE
|
||||
M: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
L: xen-devel@lists.xensource.com (moderated for non-subscribers)
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
S: Supported
|
||||
F: arch/x86/xen/
|
||||
F: drivers/*/xen-*front.c
|
||||
F: drivers/xen/
|
||||
F: arch/x86/include/asm/xen/
|
||||
F: include/xen/
|
||||
|
||||
XFS FILESYSTEM
|
||||
P: Silicon Graphics Inc
|
||||
M: Alex Elder <aelder@sgi.com>
|
||||
|
|
@ -7022,20 +7038,6 @@ M: "Maciej W. Rozycki" <macro@linux-mips.org>
|
|||
S: Maintained
|
||||
F: drivers/tty/serial/zs.*
|
||||
|
||||
GRE DEMULTIPLEXER DRIVER
|
||||
M: Dmitry Kozlov <xeb@mail.ru>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: net/ipv4/gre.c
|
||||
F: include/net/gre.h
|
||||
|
||||
PPTP DRIVER
|
||||
M: Dmitry Kozlov <xeb@mail.ru>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/pptp.c
|
||||
W: http://sourceforge.net/projects/accel-pptp
|
||||
|
||||
THE REST
|
||||
M: Linus Torvalds <torvalds@linux-foundation.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 39
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION =
|
||||
NAME = Flesh-Eating Bats with Fangs
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -452,10 +452,14 @@
|
|||
#define __NR_fanotify_init 494
|
||||
#define __NR_fanotify_mark 495
|
||||
#define __NR_prlimit64 496
|
||||
#define __NR_name_to_handle_at 497
|
||||
#define __NR_open_by_handle_at 498
|
||||
#define __NR_clock_adjtime 499
|
||||
#define __NR_syncfs 500
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define NR_SYSCALLS 497
|
||||
#define NR_SYSCALLS 501
|
||||
|
||||
#define __ARCH_WANT_IPC_PARSE_VERSION
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
|
|
|
|||
|
|
@ -498,23 +498,27 @@ sys_call_table:
|
|||
.quad sys_ni_syscall /* sys_timerfd */
|
||||
.quad sys_eventfd
|
||||
.quad sys_recvmmsg
|
||||
.quad sys_fallocate /* 480 */
|
||||
.quad sys_fallocate /* 480 */
|
||||
.quad sys_timerfd_create
|
||||
.quad sys_timerfd_settime
|
||||
.quad sys_timerfd_gettime
|
||||
.quad sys_signalfd4
|
||||
.quad sys_eventfd2 /* 485 */
|
||||
.quad sys_eventfd2 /* 485 */
|
||||
.quad sys_epoll_create1
|
||||
.quad sys_dup3
|
||||
.quad sys_pipe2
|
||||
.quad sys_inotify_init1
|
||||
.quad sys_preadv /* 490 */
|
||||
.quad sys_preadv /* 490 */
|
||||
.quad sys_pwritev
|
||||
.quad sys_rt_tgsigqueueinfo
|
||||
.quad sys_perf_event_open
|
||||
.quad sys_fanotify_init
|
||||
.quad sys_fanotify_mark /* 495 */
|
||||
.quad sys_fanotify_mark /* 495 */
|
||||
.quad sys_prlimit64
|
||||
.quad sys_name_to_handle_at
|
||||
.quad sys_open_by_handle_at
|
||||
.quad sys_clock_adjtime
|
||||
.quad sys_syncfs /* 500 */
|
||||
|
||||
.size sys_call_table, . - sys_call_table
|
||||
.type sys_call_table, @object
|
||||
|
|
|
|||
|
|
@ -375,8 +375,7 @@ static struct clocksource clocksource_rpcc = {
|
|||
|
||||
static inline void register_rpcc_clocksource(long cycle_freq)
|
||||
{
|
||||
clocksource_calc_mult_shift(&clocksource_rpcc, cycle_freq, 4);
|
||||
clocksource_register(&clocksource_rpcc);
|
||||
clocksource_register_hz(&clocksource_rpcc, cycle_freq);
|
||||
}
|
||||
#else /* !CONFIG_SMP */
|
||||
static inline void register_rpcc_clocksource(long cycle_freq)
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@ ZTEXTADDR := $(CONFIG_ZBOOT_ROM_TEXT)
|
|||
ZBSSADDR := $(CONFIG_ZBOOT_ROM_BSS)
|
||||
else
|
||||
ZTEXTADDR := 0
|
||||
ZBSSADDR := ALIGN(4)
|
||||
ZBSSADDR := ALIGN(8)
|
||||
endif
|
||||
|
||||
SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
|
||||
|
|
|
|||
|
|
@ -179,15 +179,14 @@ not_angel:
|
|||
bl cache_on
|
||||
|
||||
restart: adr r0, LC0
|
||||
ldmia r0, {r1, r2, r3, r5, r6, r9, r11, r12}
|
||||
ldr sp, [r0, #32]
|
||||
ldmia r0, {r1, r2, r3, r6, r9, r11, r12}
|
||||
ldr sp, [r0, #28]
|
||||
|
||||
/*
|
||||
* We might be running at a different address. We need
|
||||
* to fix up various pointers.
|
||||
*/
|
||||
sub r0, r0, r1 @ calculate the delta offset
|
||||
add r5, r5, r0 @ _start
|
||||
add r6, r6, r0 @ _edata
|
||||
|
||||
#ifndef CONFIG_ZBOOT_ROM
|
||||
|
|
@ -206,31 +205,40 @@ restart: adr r0, LC0
|
|||
/*
|
||||
* Check to see if we will overwrite ourselves.
|
||||
* r4 = final kernel address
|
||||
* r5 = start of this image
|
||||
* r9 = size of decompressed image
|
||||
* r10 = end of this image, including bss/stack/malloc space if non XIP
|
||||
* We basically want:
|
||||
* r4 >= r10 -> OK
|
||||
* r4 + image length <= r5 -> OK
|
||||
* r4 - 16k page directory >= r10 -> OK
|
||||
* r4 + image length <= current position (pc) -> OK
|
||||
*/
|
||||
add r10, r10, #16384
|
||||
cmp r4, r10
|
||||
bhs wont_overwrite
|
||||
add r10, r4, r9
|
||||
cmp r10, r5
|
||||
ARM( cmp r10, pc )
|
||||
THUMB( mov lr, pc )
|
||||
THUMB( cmp r10, lr )
|
||||
bls wont_overwrite
|
||||
|
||||
/*
|
||||
* Relocate ourselves past the end of the decompressed kernel.
|
||||
* r5 = start of this image
|
||||
* r6 = _edata
|
||||
* r10 = end of the decompressed kernel
|
||||
* Because we always copy ahead, we need to do it from the end and go
|
||||
* backward in case the source and destination overlap.
|
||||
*/
|
||||
/* Round up to next 256-byte boundary. */
|
||||
add r10, r10, #256
|
||||
/*
|
||||
* Bump to the next 256-byte boundary with the size of
|
||||
* the relocation code added. This avoids overwriting
|
||||
* ourself when the offset is small.
|
||||
*/
|
||||
add r10, r10, #((reloc_code_end - restart + 256) & ~255)
|
||||
bic r10, r10, #255
|
||||
|
||||
/* Get start of code we want to copy and align it down. */
|
||||
adr r5, restart
|
||||
bic r5, r5, #31
|
||||
|
||||
sub r9, r6, r5 @ size to copy
|
||||
add r9, r9, #31 @ rounded up to a multiple
|
||||
bic r9, r9, #31 @ ... of 32 bytes
|
||||
|
|
@ -245,6 +253,11 @@ restart: adr r0, LC0
|
|||
/* Preserve offset to relocated code. */
|
||||
sub r6, r9, r6
|
||||
|
||||
#ifndef CONFIG_ZBOOT_ROM
|
||||
/* cache_clean_flush may use the stack, so relocate it */
|
||||
add sp, sp, r6
|
||||
#endif
|
||||
|
||||
bl cache_clean_flush
|
||||
|
||||
adr r0, BSYM(restart)
|
||||
|
|
@ -333,7 +346,6 @@ not_relocated: mov r0, #0
|
|||
LC0: .word LC0 @ r1
|
||||
.word __bss_start @ r2
|
||||
.word _end @ r3
|
||||
.word _start @ r5
|
||||
.word _edata @ r6
|
||||
.word _image_size @ r9
|
||||
.word _got_start @ r11
|
||||
|
|
@ -1062,6 +1074,7 @@ memdump: mov r12, r0
|
|||
#endif
|
||||
|
||||
.ltorg
|
||||
reloc_code_end:
|
||||
|
||||
.align
|
||||
.section ".stack", "aw", %nobits
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ SECTIONS
|
|||
.bss : { *(.bss) }
|
||||
_end = .;
|
||||
|
||||
. = ALIGN(8); /* the stack must be 64-bit aligned */
|
||||
.stack : { *(.stack) }
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
|
|
|
|||
|
|
@ -0,0 +1,48 @@
|
|||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_HOTPLUG is not set
|
||||
# CONFIG_ELF_CORE is not set
|
||||
# CONFIG_FUTEX is not set
|
||||
# CONFIG_TIMERFD is not set
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_LBDAF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
# CONFIG_MMU is not set
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_ARCH_AT91X40=y
|
||||
CONFIG_MACH_AT91EB01=y
|
||||
CONFIG_AT91_EARLY_USART0=y
|
||||
CONFIG_CPU_ARM7TDMI=y
|
||||
CONFIG_SET_MEM_PARAM=y
|
||||
CONFIG_DRAM_BASE=0x01000000
|
||||
CONFIG_DRAM_SIZE=0x00400000
|
||||
CONFIG_FLASH_MEM_BASE=0x01400000
|
||||
CONFIG_PROCESSOR_ID=0x14000040
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_BINFMT_FLAT=y
|
||||
# CONFIG_SUSPEND is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_RAM=y
|
||||
CONFIG_MTD_ROM=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_ROMFS_FS=y
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
|
|
@ -2,6 +2,7 @@
|
|||
#define __ASM_ARM_CPUTYPE_H
|
||||
|
||||
#include <linux/stringify.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#define CPUID_ID 0
|
||||
#define CPUID_CACHETYPE 1
|
||||
|
|
|
|||
|
|
@ -39,10 +39,13 @@ typedef u32 kprobe_opcode_t;
|
|||
struct kprobe;
|
||||
typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *);
|
||||
|
||||
typedef unsigned long (kprobe_check_cc)(unsigned long);
|
||||
|
||||
/* Architecture specific copy of original instruction. */
|
||||
struct arch_specific_insn {
|
||||
kprobe_opcode_t *insn;
|
||||
kprobe_insn_handler_t *insn_handler;
|
||||
kprobe_check_cc *insn_check_cc;
|
||||
};
|
||||
|
||||
struct prev_kprobe {
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ extern unsigned int user_debug;
|
|||
#include <mach/barriers.h>
|
||||
#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
|
||||
#define mb() do { dsb(); outer_sync(); } while (0)
|
||||
#define rmb() dmb()
|
||||
#define rmb() dsb()
|
||||
#define wmb() mb()
|
||||
#else
|
||||
#include <asm/memory.h>
|
||||
|
|
|
|||
|
|
@ -396,6 +396,10 @@
|
|||
#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
|
||||
#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
|
||||
#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
|
||||
#define __NR_name_to_handle_at (__NR_SYSCALL_BASE+370)
|
||||
#define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371)
|
||||
#define __NR_clock_adjtime (__NR_SYSCALL_BASE+372)
|
||||
#define __NR_syncfs (__NR_SYSCALL_BASE+373)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
|||
|
|
@ -379,6 +379,10 @@
|
|||
CALL(sys_fanotify_init)
|
||||
CALL(sys_fanotify_mark)
|
||||
CALL(sys_prlimit64)
|
||||
/* 370 */ CALL(sys_name_to_handle_at)
|
||||
CALL(sys_open_by_handle_at)
|
||||
CALL(sys_clock_adjtime)
|
||||
CALL(sys_syncfs)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
|||
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
|
|
@ -134,7 +134,8 @@ static void __kprobes singlestep(struct kprobe *p, struct pt_regs *regs,
|
|||
struct kprobe_ctlblk *kcb)
|
||||
{
|
||||
regs->ARM_pc += 4;
|
||||
p->ainsn.insn_handler(p, regs);
|
||||
if (p->ainsn.insn_check_cc(regs->ARM_cpsr))
|
||||
p->ainsn.insn_handler(p, regs);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -746,7 +746,8 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
|||
|
||||
tail = (struct frame_tail __user *)regs->ARM_fp - 1;
|
||||
|
||||
while (tail && !((unsigned long)tail & 0x3))
|
||||
while ((entry->nr < PERF_MAX_STACK_DEPTH) &&
|
||||
tail && !((unsigned long)tail & 0x3))
|
||||
tail = user_backtrace(tail, entry);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -767,12 +767,20 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
case PTRACE_GETHBPREGS:
|
||||
if (ptrace_get_breakpoints(child) < 0)
|
||||
return -ESRCH;
|
||||
|
||||
ret = ptrace_gethbpregs(child, addr,
|
||||
(unsigned long __user *)data);
|
||||
ptrace_put_breakpoints(child);
|
||||
break;
|
||||
case PTRACE_SETHBPREGS:
|
||||
if (ptrace_get_breakpoints(child) < 0)
|
||||
return -ESRCH;
|
||||
|
||||
ret = ptrace_sethbpregs(child, addr,
|
||||
(unsigned long __user *)data);
|
||||
ptrace_put_breakpoints(child);
|
||||
break;
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -597,45 +597,19 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info,
|
|||
return err;
|
||||
}
|
||||
|
||||
static inline void setup_syscall_restart(struct pt_regs *regs)
|
||||
{
|
||||
regs->ARM_r0 = regs->ARM_ORIG_r0;
|
||||
regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* OK, we're invoking a handler
|
||||
*/
|
||||
static int
|
||||
handle_signal(unsigned long sig, struct k_sigaction *ka,
|
||||
siginfo_t *info, sigset_t *oldset,
|
||||
struct pt_regs * regs, int syscall)
|
||||
struct pt_regs * regs)
|
||||
{
|
||||
struct thread_info *thread = current_thread_info();
|
||||
struct task_struct *tsk = current;
|
||||
int usig = sig;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* If we were from a system call, check for system call restarting...
|
||||
*/
|
||||
if (syscall) {
|
||||
switch (regs->ARM_r0) {
|
||||
case -ERESTART_RESTARTBLOCK:
|
||||
case -ERESTARTNOHAND:
|
||||
regs->ARM_r0 = -EINTR;
|
||||
break;
|
||||
case -ERESTARTSYS:
|
||||
if (!(ka->sa.sa_flags & SA_RESTART)) {
|
||||
regs->ARM_r0 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
case -ERESTARTNOINTR:
|
||||
setup_syscall_restart(regs);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* translate the signal
|
||||
*/
|
||||
|
|
@ -685,6 +659,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
|
|||
*/
|
||||
static void do_signal(struct pt_regs *regs, int syscall)
|
||||
{
|
||||
unsigned int retval = 0, continue_addr = 0, restart_addr = 0;
|
||||
struct k_sigaction ka;
|
||||
siginfo_t info;
|
||||
int signr;
|
||||
|
|
@ -698,18 +673,61 @@ static void do_signal(struct pt_regs *regs, int syscall)
|
|||
if (!user_mode(regs))
|
||||
return;
|
||||
|
||||
/*
|
||||
* If we were from a system call, check for system call restarting...
|
||||
*/
|
||||
if (syscall) {
|
||||
continue_addr = regs->ARM_pc;
|
||||
restart_addr = continue_addr - (thumb_mode(regs) ? 2 : 4);
|
||||
retval = regs->ARM_r0;
|
||||
|
||||
/*
|
||||
* Prepare for system call restart. We do this here so that a
|
||||
* debugger will see the already changed PSW.
|
||||
*/
|
||||
switch (retval) {
|
||||
case -ERESTARTNOHAND:
|
||||
case -ERESTARTSYS:
|
||||
case -ERESTARTNOINTR:
|
||||
regs->ARM_r0 = regs->ARM_ORIG_r0;
|
||||
regs->ARM_pc = restart_addr;
|
||||
break;
|
||||
case -ERESTART_RESTARTBLOCK:
|
||||
regs->ARM_r0 = -EINTR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (try_to_freeze())
|
||||
goto no_signal;
|
||||
|
||||
/*
|
||||
* Get the signal to deliver. When running under ptrace, at this
|
||||
* point the debugger may change all our registers ...
|
||||
*/
|
||||
signr = get_signal_to_deliver(&info, &ka, regs, NULL);
|
||||
if (signr > 0) {
|
||||
sigset_t *oldset;
|
||||
|
||||
/*
|
||||
* Depending on the signal settings we may need to revert the
|
||||
* decision to restart the system call. But skip this if a
|
||||
* debugger has chosen to restart at a different PC.
|
||||
*/
|
||||
if (regs->ARM_pc == restart_addr) {
|
||||
if (retval == -ERESTARTNOHAND
|
||||
|| (retval == -ERESTARTSYS
|
||||
&& !(ka.sa.sa_flags & SA_RESTART))) {
|
||||
regs->ARM_r0 = -EINTR;
|
||||
regs->ARM_pc = continue_addr;
|
||||
}
|
||||
}
|
||||
|
||||
if (test_thread_flag(TIF_RESTORE_SIGMASK))
|
||||
oldset = ¤t->saved_sigmask;
|
||||
else
|
||||
oldset = ¤t->blocked;
|
||||
if (handle_signal(signr, &ka, &info, oldset, regs, syscall) == 0) {
|
||||
if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
|
||||
/*
|
||||
* A signal was successfully delivered; the saved
|
||||
* sigmask will have been stored in the signal frame,
|
||||
|
|
@ -723,11 +741,14 @@ static void do_signal(struct pt_regs *regs, int syscall)
|
|||
}
|
||||
|
||||
no_signal:
|
||||
/*
|
||||
* No signal to deliver to the process - restart the syscall.
|
||||
*/
|
||||
if (syscall) {
|
||||
if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) {
|
||||
/*
|
||||
* Handle restarting a different system call. As above,
|
||||
* if a debugger has chosen to restart at a different PC,
|
||||
* ignore the restart.
|
||||
*/
|
||||
if (retval == -ERESTART_RESTARTBLOCK
|
||||
&& regs->ARM_pc == continue_addr) {
|
||||
if (thumb_mode(regs)) {
|
||||
regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
|
||||
regs->ARM_pc -= 2;
|
||||
|
|
@ -750,11 +771,6 @@ static void do_signal(struct pt_regs *regs, int syscall)
|
|||
#endif
|
||||
}
|
||||
}
|
||||
if (regs->ARM_r0 == -ERESTARTNOHAND ||
|
||||
regs->ARM_r0 == -ERESTARTSYS ||
|
||||
regs->ARM_r0 == -ERESTARTNOINTR) {
|
||||
setup_syscall_restart(regs);
|
||||
}
|
||||
|
||||
/* If there's no signal to deliver, we just put the saved sigmask
|
||||
* back.
|
||||
|
|
|
|||
|
|
@ -479,7 +479,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
|
|||
{
|
||||
}
|
||||
|
||||
static void broadcast_timer_setup(struct clock_event_device *evt)
|
||||
static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
|
||||
{
|
||||
evt->name = "dummy_timer";
|
||||
evt->features = CLOCK_EVT_FEAT_ONESHOT |
|
||||
|
|
|
|||
|
|
@ -311,7 +311,7 @@ asmlinkage long sys_oabi_semtimedop(int semid,
|
|||
long err;
|
||||
int i;
|
||||
|
||||
if (nsops < 1)
|
||||
if (nsops < 1 || nsops > SEMOPM)
|
||||
return -EINVAL;
|
||||
sops = kmalloc(sizeof(*sops) * nsops, GFP_KERNEL);
|
||||
if (!sops)
|
||||
|
|
|
|||
|
|
@ -83,6 +83,7 @@ config ARCH_AT91CAP9
|
|||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
|
||||
config ARCH_AT572D940HF
|
||||
bool "AT572D940HF"
|
||||
|
|
|
|||
|
|
@ -30,6 +30,11 @@
|
|||
#include <mach/board.h>
|
||||
#include "generic.h"
|
||||
|
||||
static void __init at91eb01_init_irq(void)
|
||||
{
|
||||
at91x40_init_interrupts(NULL);
|
||||
}
|
||||
|
||||
static void __init at91eb01_map_io(void)
|
||||
{
|
||||
at91x40_initialize(40000000);
|
||||
|
|
@ -38,7 +43,7 @@ static void __init at91eb01_map_io(void)
|
|||
MACHINE_START(AT91EB01, "Atmel AT91 EB01")
|
||||
/* Maintainer: Greg Ungerer <gerg@snapgear.com> */
|
||||
.timer = &at91x40_timer,
|
||||
.init_irq = at91x40_init_interrupts,
|
||||
.init_irq = at91eb01_init_irq,
|
||||
.map_io = at91eb01_map_io,
|
||||
MACHINE_END
|
||||
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
#define ARCH_ID_AT91SAM9G45 0x819b05a0
|
||||
#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
|
||||
#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
|
||||
#define ARCH_ID_AT91SAM9X5 0x819a05a0
|
||||
#define ARCH_ID_AT91CAP9 0x039A03A0
|
||||
|
||||
#define ARCH_ID_AT91SAM9XE128 0x329973a0
|
||||
|
|
@ -55,6 +56,12 @@ static inline unsigned long at91_cpu_fully_identify(void)
|
|||
#define ARCH_EXID_AT91SAM9G46 0x00000003
|
||||
#define ARCH_EXID_AT91SAM9G45 0x00000004
|
||||
|
||||
#define ARCH_EXID_AT91SAM9G15 0x00000000
|
||||
#define ARCH_EXID_AT91SAM9G35 0x00000001
|
||||
#define ARCH_EXID_AT91SAM9X35 0x00000002
|
||||
#define ARCH_EXID_AT91SAM9G25 0x00000003
|
||||
#define ARCH_EXID_AT91SAM9X25 0x00000004
|
||||
|
||||
static inline unsigned long at91_exid_identify(void)
|
||||
{
|
||||
return at91_sys_read(AT91_DBGU_EXID);
|
||||
|
|
@ -143,6 +150,27 @@ static inline unsigned long at91cap9_rev_identify(void)
|
|||
#define cpu_is_at91sam9m11() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91SAM9X5
|
||||
#define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
|
||||
#define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \
|
||||
(at91_exid_identify() == ARCH_EXID_AT91SAM9G15))
|
||||
#define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \
|
||||
(at91_exid_identify() == ARCH_EXID_AT91SAM9G35))
|
||||
#define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \
|
||||
(at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
|
||||
#define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \
|
||||
(at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
|
||||
#define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \
|
||||
(at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
|
||||
#else
|
||||
#define cpu_is_at91sam9x5() (0)
|
||||
#define cpu_is_at91sam9g15() (0)
|
||||
#define cpu_is_at91sam9g35() (0)
|
||||
#define cpu_is_at91sam9x35() (0)
|
||||
#define cpu_is_at91sam9g25() (0)
|
||||
#define cpu_is_at91sam9x25() (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_AT91CAP9
|
||||
#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
|
||||
#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
|
||||
|
|
|
|||
|
|
@ -63,6 +63,7 @@ config MACH_DAVINCI_EVM
|
|||
depends on ARCH_DAVINCI_DM644x
|
||||
select MISC_DEVICES
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
help
|
||||
Configure this option to specify the whether the board used
|
||||
for development is a DM644x EVM
|
||||
|
|
@ -72,6 +73,7 @@ config MACH_SFFSDR
|
|||
depends on ARCH_DAVINCI_DM644x
|
||||
select MISC_DEVICES
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
help
|
||||
Say Y here to select the Lyrtech Small Form Factor
|
||||
Software Defined Radio (SFFSDR) board.
|
||||
|
|
@ -105,6 +107,7 @@ config MACH_DAVINCI_DM6467_EVM
|
|||
select MACH_DAVINCI_DM6467TEVM
|
||||
select MISC_DEVICES
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
help
|
||||
Configure this option to specify the whether the board used
|
||||
for development is a DM6467 EVM
|
||||
|
|
@ -118,6 +121,7 @@ config MACH_DAVINCI_DM365_EVM
|
|||
depends on ARCH_DAVINCI_DM365
|
||||
select MISC_DEVICES
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
help
|
||||
Configure this option to specify whether the board used
|
||||
for development is a DM365 EVM
|
||||
|
|
@ -129,6 +133,7 @@ config MACH_DAVINCI_DA830_EVM
|
|||
select GPIO_PCF857X
|
||||
select MISC_DEVICES
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
help
|
||||
Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
|
||||
|
||||
|
|
@ -205,6 +210,7 @@ config MACH_MITYOMAPL138
|
|||
depends on ARCH_DAVINCI_DA850
|
||||
select MISC_DEVICES
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
help
|
||||
Say Y here to select the Critical Link MityDSP-L138/MityARM-1808
|
||||
System on Module. Information on this SoM may be found at
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
#include <mach/mux.h>
|
||||
#include <mach/spi.h>
|
||||
|
||||
#define MITYOMAPL138_PHY_ID "0:03"
|
||||
#define MITYOMAPL138_PHY_ID ""
|
||||
|
||||
#define FACTORY_CONFIG_MAGIC 0x012C0138
|
||||
#define FACTORY_CONFIG_VERSION 0x00010001
|
||||
|
|
@ -414,7 +414,7 @@ static struct resource mityomapl138_nandflash_resource[] = {
|
|||
|
||||
static struct platform_device mityomapl138_nandflash_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &mityomapl138_nandflash_data,
|
||||
},
|
||||
|
|
|
|||
|
|
@ -39,7 +39,8 @@
|
|||
#define DA8XX_GPIO_BASE 0x01e26000
|
||||
#define DA8XX_I2C1_BASE 0x01e28000
|
||||
#define DA8XX_SPI0_BASE 0x01c41000
|
||||
#define DA8XX_SPI1_BASE 0x01f0e000
|
||||
#define DA830_SPI1_BASE 0x01e12000
|
||||
#define DA850_SPI1_BASE 0x01f0e000
|
||||
|
||||
#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
|
||||
#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
|
||||
|
|
@ -762,8 +763,8 @@ static struct resource da8xx_spi0_resources[] = {
|
|||
|
||||
static struct resource da8xx_spi1_resources[] = {
|
||||
[0] = {
|
||||
.start = DA8XX_SPI1_BASE,
|
||||
.end = DA8XX_SPI1_BASE + SZ_4K - 1,
|
||||
.start = DA830_SPI1_BASE,
|
||||
.end = DA830_SPI1_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
|
|
@ -832,5 +833,10 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,
|
|||
|
||||
da8xx_spi_pdata[instance].num_chipselect = len;
|
||||
|
||||
if (instance == 1 && cpu_is_davinci_da850()) {
|
||||
da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
|
||||
da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
|
||||
}
|
||||
|
||||
return platform_device_register(&da8xx_spi_device[instance]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -314,7 +314,7 @@ static struct clk timer2_clk = {
|
|||
.name = "timer2",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_TIMER2,
|
||||
.usecount = 1, /* REVISIT: why can't' this be disabled? */
|
||||
.usecount = 1, /* REVISIT: why can't this be disabled? */
|
||||
};
|
||||
|
||||
static struct clk timer3_clk = {
|
||||
|
|
|
|||
|
|
@ -274,7 +274,7 @@ static struct clk timer2_clk = {
|
|||
.name = "timer2",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_TIMER2,
|
||||
.usecount = 1, /* REVISIT: why can't' this be disabled? */
|
||||
.usecount = 1, /* REVISIT: why can't this be disabled? */
|
||||
};
|
||||
|
||||
static struct clk_lookup dm644x_clks[] = {
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@
|
|||
|
||||
#define UART_SHIFT 2
|
||||
|
||||
#define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
|
||||
#define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
|
||||
|
||||
.pushsection .data
|
||||
davinci_uart_phys: .word 0
|
||||
davinci_uart_virt: .word 0
|
||||
|
|
@ -34,7 +37,7 @@ davinci_uart_virt: .word 0
|
|||
/* Use davinci_uart_phys/virt if already configured */
|
||||
10: mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
ldreq \rp, =__virt_to_phys(davinci_uart_phys)
|
||||
ldreq \rp, =davinci_uart_v2p(davinci_uart_phys)
|
||||
ldrne \rp, =davinci_uart_phys
|
||||
add \rv, \rp, #4 @ davinci_uart_virt
|
||||
ldr \rp, [\rp, #0]
|
||||
|
|
@ -48,18 +51,18 @@ davinci_uart_virt: .word 0
|
|||
tst \rp, #1 @ MMU enabled?
|
||||
|
||||
/* Copy uart phys address from decompressor uart info */
|
||||
ldreq \rv, =__virt_to_phys(davinci_uart_phys)
|
||||
ldreq \rv, =davinci_uart_v2p(davinci_uart_phys)
|
||||
ldrne \rv, =davinci_uart_phys
|
||||
ldreq \rp, =DAVINCI_UART_INFO
|
||||
ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO)
|
||||
ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
|
||||
ldr \rp, [\rp, #0]
|
||||
str \rp, [\rv]
|
||||
|
||||
/* Copy uart virt address from decompressor uart info */
|
||||
ldreq \rv, =__virt_to_phys(davinci_uart_virt)
|
||||
ldreq \rv, =davinci_uart_v2p(davinci_uart_virt)
|
||||
ldrne \rv, =davinci_uart_virt
|
||||
ldreq \rp, =DAVINCI_UART_INFO
|
||||
ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO)
|
||||
ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
|
||||
ldr \rp, [\rp, #4]
|
||||
str \rp, [\rv]
|
||||
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
*
|
||||
* This area sits just below the page tables (see arch/arm/kernel/head.S).
|
||||
*/
|
||||
#define DAVINCI_UART_INFO (PHYS_OFFSET + 0x3ff8)
|
||||
#define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8)
|
||||
|
||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||
|
|
|
|||
|
|
@ -257,11 +257,16 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
|
|||
.workaround = FLS_USB2_WORKAROUND_ENGCM09152,
|
||||
};
|
||||
|
||||
static int vpr200_usbh_init(struct platform_device *pdev)
|
||||
{
|
||||
return mx35_initialize_usb_hw(pdev->id,
|
||||
MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY);
|
||||
}
|
||||
|
||||
/* USB HOST config */
|
||||
static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
|
||||
.portsc = MXC_EHCI_MODE_SERIAL,
|
||||
.flags = MXC_EHCI_INTERFACE_SINGLE_UNI |
|
||||
MXC_EHCI_INTERNAL_PHY,
|
||||
.init = vpr200_usbh_init,
|
||||
.portsc = MXC_EHCI_MODE_SERIAL,
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
|
|
|
|||
|
|
@ -193,7 +193,7 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
|
|||
.wakeup = wake, \
|
||||
}
|
||||
|
||||
static const struct gpio_keys_button loco_buttons[] __initconst = {
|
||||
static struct gpio_keys_button loco_buttons[] = {
|
||||
GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0),
|
||||
GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0),
|
||||
GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0),
|
||||
|
|
|
|||
|
|
@ -295,11 +295,11 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
|
|||
unsigned long diff, parent_rate, calc_rate; \
|
||||
int i; \
|
||||
\
|
||||
parent_rate = clk_get_rate(clk->parent); \
|
||||
div_max = BM_CLKCTRL_##dr##_DIV >> BP_CLKCTRL_##dr##_DIV; \
|
||||
bm_busy = BM_CLKCTRL_##dr##_BUSY; \
|
||||
\
|
||||
if (clk->parent == &ref_xtal_clk) { \
|
||||
parent_rate = clk_get_rate(clk->parent); \
|
||||
div = DIV_ROUND_UP(parent_rate, rate); \
|
||||
if (clk == &cpu_clk) { \
|
||||
div_max = BM_CLKCTRL_CPU_DIV_XTAL >> \
|
||||
|
|
@ -309,6 +309,11 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
|
|||
if (div == 0 || div > div_max) \
|
||||
return -EINVAL; \
|
||||
} else { \
|
||||
/* \
|
||||
* hack alert: this block modifies clk->parent, too, \
|
||||
* so the base to use it the grand parent. \
|
||||
*/ \
|
||||
parent_rate = clk_get_rate(clk->parent->parent); \
|
||||
rate >>= PARENT_RATE_SHIFT; \
|
||||
parent_rate >>= PARENT_RATE_SHIFT; \
|
||||
diff = parent_rate; \
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
|
|||
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
|
||||
|
||||
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
|
||||
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
|
||||
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec)
|
||||
|
||||
ifeq ($(CONFIG_PM_VERBOSE),y)
|
||||
CFLAGS_pm_bus.o += -DDEBUG
|
||||
|
|
|
|||
|
|
@ -141,14 +141,19 @@ static void __init rx51_init(void)
|
|||
static void __init rx51_map_io(void)
|
||||
{
|
||||
omap2_set_globals_3xxx();
|
||||
rx51_video_mem_init();
|
||||
omap34xx_map_common_io();
|
||||
}
|
||||
|
||||
static void __init rx51_reserve(void)
|
||||
{
|
||||
rx51_video_mem_init();
|
||||
omap_reserve();
|
||||
}
|
||||
|
||||
MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
||||
/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
|
||||
.boot_params = 0x80000100,
|
||||
.reserve = omap_reserve,
|
||||
.reserve = rx51_reserve,
|
||||
.map_io = rx51_map_io,
|
||||
.init_early = rx51_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
|
|
|
|||
|
|
@ -115,6 +115,7 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
|
|||
sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
|
||||
sdrc_cs0->actim_ctrlb, sdrc_cs0->mr,
|
||||
0, 0, 0, 0);
|
||||
clk->rate = rate;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3116,14 +3116,9 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
|
||||
CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
|
||||
CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
|
||||
CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X),
|
||||
CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
|
||||
CLK("omapdss_dss", "fck", &dss_fck, CK_443X),
|
||||
/*
|
||||
* On OMAP4, DSS ick is a dummy clock; this is needed for compatibility
|
||||
* with OMAP2/3.
|
||||
*/
|
||||
CLK("omapdss_dss", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X),
|
||||
CLK("omapdss_dss", "ick", &dss_fck, CK_443X),
|
||||
CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
|
||||
CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
|
||||
CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),
|
||||
|
|
|
|||
|
|
@ -247,6 +247,7 @@ struct omap3_cm_regs {
|
|||
u32 per_cm_clksel;
|
||||
u32 emu_cm_clksel;
|
||||
u32 emu_cm_clkstctrl;
|
||||
u32 pll_cm_autoidle;
|
||||
u32 pll_cm_autoidle2;
|
||||
u32 pll_cm_clksel4;
|
||||
u32 pll_cm_clksel5;
|
||||
|
|
@ -319,6 +320,15 @@ void omap3_cm_save_context(void)
|
|||
omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
|
||||
cm_context.emu_cm_clkstctrl =
|
||||
omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
|
||||
/*
|
||||
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||
* programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.
|
||||
* In this case, even though this register has been saved in
|
||||
* scratchpad contents, we need to restore AUTO_PERIPH_DPLL
|
||||
* by ourselves. So, we need to save it anyway.
|
||||
*/
|
||||
cm_context.pll_cm_autoidle =
|
||||
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
|
||||
cm_context.pll_cm_autoidle2 =
|
||||
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
|
||||
cm_context.pll_cm_clksel4 =
|
||||
|
|
@ -441,6 +451,13 @@ void omap3_cm_restore_context(void)
|
|||
CM_CLKSEL1);
|
||||
omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
|
||||
OMAP2_CM_CLKSTCTRL);
|
||||
/*
|
||||
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||
* programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.
|
||||
* In this case, we need to restore AUTO_PERIPH_DPLL by ourselves.
|
||||
*/
|
||||
omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD,
|
||||
CM_AUTOIDLE);
|
||||
omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
|
||||
CM_AUTOIDLE2);
|
||||
omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
|
||||
|
|
|
|||
|
|
@ -316,8 +316,14 @@ void omap3_save_scratchpad_contents(void)
|
|||
omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
||||
prcm_block_contents.cm_clken_pll =
|
||||
omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
||||
/*
|
||||
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||
* programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1.
|
||||
* Then, in anycase, clear these bits to avoid extra latencies.
|
||||
*/
|
||||
prcm_block_contents.cm_autoidle_pll =
|
||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
|
||||
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) &
|
||||
~OMAP3430_AUTO_PERIPH_DPLL_MASK;
|
||||
prcm_block_contents.cm_clksel1_pll =
|
||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
||||
prcm_block_contents.cm_clksel2_pll =
|
||||
|
|
|
|||
|
|
@ -1639,6 +1639,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2420_gpio1_hwmod = {
|
||||
.name = "gpio1",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio1_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1669,6 +1670,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2420_gpio2_hwmod = {
|
||||
.name = "gpio2",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio2_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1699,6 +1701,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2420_gpio3_hwmod = {
|
||||
.name = "gpio3",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio3_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1729,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2420_gpio4_hwmod = {
|
||||
.name = "gpio4",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio4_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1782,7 +1786,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
|
|||
static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x48056000,
|
||||
.pa_end = 0x4a0560ff,
|
||||
.pa_end = 0x48056fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1742,6 +1742,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_gpio1_hwmod = {
|
||||
.name = "gpio1",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio1_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1772,6 +1773,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_gpio2_hwmod = {
|
||||
.name = "gpio2",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio2_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1802,6 +1804,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_gpio3_hwmod = {
|
||||
.name = "gpio3",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio3_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1832,6 +1835,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_gpio4_hwmod = {
|
||||
.name = "gpio4",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio4_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs),
|
||||
.main_clk = "gpios_fck",
|
||||
|
|
@ -1862,6 +1866,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_gpio5_hwmod = {
|
||||
.name = "gpio5",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio5_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs),
|
||||
.main_clk = "gpio5_fck",
|
||||
|
|
@ -1915,7 +1920,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
|
|||
static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x48056000,
|
||||
.pa_end = 0x4a0560ff,
|
||||
.pa_end = 0x48056fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2141,6 +2141,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_gpio1_hwmod = {
|
||||
.name = "gpio1",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio1_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs),
|
||||
.main_clk = "gpio1_ick",
|
||||
|
|
@ -2177,6 +2178,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_gpio2_hwmod = {
|
||||
.name = "gpio2",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio2_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs),
|
||||
.main_clk = "gpio2_ick",
|
||||
|
|
@ -2213,6 +2215,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_gpio3_hwmod = {
|
||||
.name = "gpio3",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio3_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs),
|
||||
.main_clk = "gpio3_ick",
|
||||
|
|
@ -2249,6 +2252,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_gpio4_hwmod = {
|
||||
.name = "gpio4",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio4_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs),
|
||||
.main_clk = "gpio4_ick",
|
||||
|
|
@ -2285,6 +2289,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio5_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_gpio5_hwmod = {
|
||||
.name = "gpio5",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio5_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs),
|
||||
.main_clk = "gpio5_ick",
|
||||
|
|
@ -2321,6 +2326,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio6_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_gpio6_hwmod = {
|
||||
.name = "gpio6",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio6_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs),
|
||||
.main_clk = "gpio6_ick",
|
||||
|
|
@ -2386,7 +2392,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
|
|||
static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x48056000,
|
||||
.pa_end = 0x4a0560ff,
|
||||
.pa_end = 0x48056fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -885,7 +885,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {
|
|||
static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4a056000,
|
||||
.pa_end = 0x4a0560ff,
|
||||
.pa_end = 0x4a056fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -196,11 +196,11 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
|
|||
/* No timeout error for debug sources */
|
||||
}
|
||||
|
||||
base = ((l3->rt) + (*(omap3_l3_bases[int_type] + err_source)));
|
||||
|
||||
/* identify the error source */
|
||||
for (err_source = 0; !(status & (1 << err_source)); err_source++)
|
||||
;
|
||||
|
||||
base = l3->rt + *(omap3_l3_bases[int_type] + err_source);
|
||||
error = omap3_l3_readll(base, L3_ERROR_LOG);
|
||||
|
||||
if (error) {
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ static void omap2_init_processor_devices(void)
|
|||
if (cpu_is_omap44xx()) {
|
||||
_init_omap_device("l3_main_1", &l3_dev);
|
||||
_init_omap_device("dsp", &dsp_dev);
|
||||
_init_omap_device("iva", &iva_dev);
|
||||
} else {
|
||||
_init_omap_device("l3_main", &l3_dev);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -114,7 +114,6 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd)
|
|||
sys_clk_speed /= 1000;
|
||||
|
||||
/* Generic voltage parameters */
|
||||
vdd->curr_volt = 1200000;
|
||||
vdd->volt_scale = vp_forceupdate_scale_voltage;
|
||||
vdd->vp_enabled = false;
|
||||
|
||||
|
|
|
|||
|
|
@ -711,7 +711,7 @@ static struct regulator_consumer_supply bq24022_consumers[] = {
|
|||
static struct regulator_init_data bq24022_init_data = {
|
||||
.constraints = {
|
||||
.max_uA = 500000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_CURRENT,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
|
||||
.consumer_supplies = bq24022_consumers,
|
||||
|
|
|
|||
|
|
@ -599,7 +599,7 @@ static struct regulator_consumer_supply bq24022_consumers[] = {
|
|||
static struct regulator_init_data bq24022_init_data = {
|
||||
.constraints = {
|
||||
.max_uA = 500000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_CURRENT,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
|
||||
.consumer_supplies = bq24022_consumers,
|
||||
|
|
|
|||
|
|
@ -4,5 +4,5 @@
|
|||
* operation to deadlock the system.
|
||||
*/
|
||||
#define mb() dsb()
|
||||
#define rmb() dmb()
|
||||
#define rmb() dsb()
|
||||
#define wmb() mb()
|
||||
|
|
|
|||
|
|
@ -409,6 +409,10 @@ struct platform_device s3c24xx_pwm_device = {
|
|||
.num_resources = 0,
|
||||
};
|
||||
|
||||
static struct platform_device gta02_dfbmcs320_device = {
|
||||
.name = "dfbmcs320",
|
||||
};
|
||||
|
||||
static struct i2c_board_info gta02_i2c_devs[] __initdata = {
|
||||
{
|
||||
I2C_BOARD_INFO("pcf50633", 0x73),
|
||||
|
|
@ -523,6 +527,7 @@ static struct platform_device *gta02_devices[] __initdata = {
|
|||
&s3c_device_iis,
|
||||
&samsung_asoc_dma,
|
||||
&s3c_device_i2c0,
|
||||
>a02_dfbmcs320_device,
|
||||
>a02_buttons_device,
|
||||
&s3c_device_adc,
|
||||
&s3c_device_ts,
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
|
||||
#include <asm/outercache.h>
|
||||
|
||||
#define rmb() dmb()
|
||||
#define rmb() dsb()
|
||||
#define wmb() do { dsb(); outer_sync(); } while (0)
|
||||
#define mb() wmb()
|
||||
|
||||
|
|
|
|||
|
|
@ -178,16 +178,15 @@ static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
|
|||
.irq = NOMADIK_GPIO_TO_IRQ(217),
|
||||
.platform_data = &mop500_tc35892_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* I2C0 devices only available prior to HREFv60 */
|
||||
static struct i2c_board_info __initdata mop500_i2c0_old_devices[] = {
|
||||
/* I2C0 devices only available prior to HREFv60 */
|
||||
{
|
||||
I2C_BOARD_INFO("tps61052", 0x33),
|
||||
.platform_data = &mop500_tps61052_data,
|
||||
},
|
||||
};
|
||||
|
||||
#define NUM_PRE_V60_I2C0_DEVICES 1
|
||||
|
||||
static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
|
||||
{
|
||||
/* lp5521 LED driver, 1st device */
|
||||
|
|
@ -425,6 +424,8 @@ static void __init mop500_uart_init(void)
|
|||
|
||||
static void __init mop500_init_machine(void)
|
||||
{
|
||||
int i2c0_devs;
|
||||
|
||||
/*
|
||||
* The HREFv60 board removed a GPIO expander and routed
|
||||
* all these GPIO pins to the internal GPIO controller
|
||||
|
|
@ -448,11 +449,11 @@ static void __init mop500_init_machine(void)
|
|||
|
||||
platform_device_register(&ab8500_device);
|
||||
|
||||
i2c_register_board_info(0, mop500_i2c0_devices,
|
||||
ARRAY_SIZE(mop500_i2c0_devices));
|
||||
if (!machine_is_hrefv60())
|
||||
i2c_register_board_info(0, mop500_i2c0_old_devices,
|
||||
ARRAY_SIZE(mop500_i2c0_old_devices));
|
||||
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
||||
if (machine_is_hrefv60())
|
||||
i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
|
||||
|
||||
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
|
||||
i2c_register_board_info(2, mop500_i2c2_devices,
|
||||
ARRAY_SIZE(mop500_i2c2_devices));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -392,7 +392,7 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
|
|||
* Convert start_pfn/end_pfn to a struct page pointer.
|
||||
*/
|
||||
start_pg = pfn_to_page(start_pfn - 1) + 1;
|
||||
end_pg = pfn_to_page(end_pfn);
|
||||
end_pg = pfn_to_page(end_pfn - 1) + 1;
|
||||
|
||||
/*
|
||||
* Convert to physical addresses, and
|
||||
|
|
@ -426,6 +426,14 @@ static void __init free_unused_memmap(struct meminfo *mi)
|
|||
|
||||
bank_start = bank_pfn_start(bank);
|
||||
|
||||
#ifdef CONFIG_SPARSEMEM
|
||||
/*
|
||||
* Take care not to free memmap entries that don't exist
|
||||
* due to SPARSEMEM sections which aren't present.
|
||||
*/
|
||||
bank_start = min(bank_start,
|
||||
ALIGN(prev_bank_end, PAGES_PER_SECTION));
|
||||
#endif
|
||||
/*
|
||||
* If we had a previous bank, and there is a space
|
||||
* between the current bank and the previous, free it.
|
||||
|
|
@ -440,6 +448,12 @@ static void __init free_unused_memmap(struct meminfo *mi)
|
|||
*/
|
||||
prev_bank_end = ALIGN(bank_pfn_end(bank), MAX_ORDER_NR_PAGES);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPARSEMEM
|
||||
if (!IS_ALIGNED(prev_bank_end, PAGES_PER_SECTION))
|
||||
free_memmap(prev_bank_end,
|
||||
ALIGN(prev_bank_end, PAGES_PER_SECTION));
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __init free_highpages(void)
|
||||
|
|
|
|||
|
|
@ -395,7 +395,7 @@ ENTRY(xscale_dma_a0_map_area)
|
|||
teq r2, #DMA_TO_DEVICE
|
||||
beq xscale_dma_clean_range
|
||||
b xscale_dma_flush_range
|
||||
ENDPROC(xscsale_dma_a0_map_area)
|
||||
ENDPROC(xscale_dma_a0_map_area)
|
||||
|
||||
/*
|
||||
* dma_unmap_area(start, size, dir)
|
||||
|
|
|
|||
|
|
@ -295,6 +295,12 @@ static int mxc_gpio_direction_output(struct gpio_chip *chip,
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This lock class tells lockdep that GPIO irqs are in a different
|
||||
* category than their parents, so it won't report false recursion.
|
||||
*/
|
||||
static struct lock_class_key gpio_lock_class;
|
||||
|
||||
int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
|
||||
{
|
||||
int i, j;
|
||||
|
|
@ -311,6 +317,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
|
|||
__raw_writel(~0, port[i].base + GPIO_ISR);
|
||||
for (j = port[i].virtual_irq_start;
|
||||
j < port[i].virtual_irq_start + 32; j++) {
|
||||
irq_set_lockdep_class(j, &gpio_lock_class);
|
||||
irq_set_chip_and_handler(j, &gpio_irq_chip,
|
||||
handle_level_irq);
|
||||
set_irq_flags(j, IRQF_VALID);
|
||||
|
|
|
|||
|
|
@ -124,6 +124,8 @@ imx_ssi_fiq_start:
|
|||
1:
|
||||
@ return from FIQ
|
||||
subs pc, lr, #4
|
||||
|
||||
.align
|
||||
imx_ssi_fiq_base:
|
||||
.word 0x0
|
||||
imx_ssi_fiq_rx_buffer:
|
||||
|
|
|
|||
|
|
@ -793,6 +793,8 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
|
|||
clk_enable(obj->clk);
|
||||
errs = iommu_report_fault(obj, &da);
|
||||
clk_disable(obj->clk);
|
||||
if (errs == 0)
|
||||
return IRQ_HANDLED;
|
||||
|
||||
/* Fault callback or TLB/PTE Dynamic loading */
|
||||
if (obj->isr && !obj->isr(obj, da, errs, obj->isr_priv))
|
||||
|
|
|
|||
|
|
@ -300,6 +300,8 @@ void __init paging_init(void)
|
|||
zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT;
|
||||
free_area_init_node(i, zones_size,
|
||||
m68k_memory[i].addr >> PAGE_SHIFT, NULL);
|
||||
if (node_present_pages(i))
|
||||
node_set_state(i, N_NORMAL_MEMORY);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -997,9 +997,6 @@ config IRQ_GT641XX
|
|||
config IRQ_GIC
|
||||
bool
|
||||
|
||||
config IRQ_CPU_OCTEON
|
||||
bool
|
||||
|
||||
config MIPS_BOARDS_GEN
|
||||
bool
|
||||
|
||||
|
|
@ -1359,8 +1356,6 @@ config CPU_SB1
|
|||
config CPU_CAVIUM_OCTEON
|
||||
bool "Cavium Octeon processor"
|
||||
depends on SYS_HAS_CPU_CAVIUM_OCTEON
|
||||
select IRQ_CPU
|
||||
select IRQ_CPU_OCTEON
|
||||
select CPU_HAS_PREFETCH
|
||||
select CPU_SUPPORTS_64BIT_KERNEL
|
||||
select SYS_SUPPORTS_SMP
|
||||
|
|
|
|||
|
|
@ -127,13 +127,10 @@ const char *get_system_type(void)
|
|||
void __init board_setup(void)
|
||||
{
|
||||
unsigned long bcsr1, bcsr2;
|
||||
u32 pin_func;
|
||||
|
||||
bcsr1 = DB1000_BCSR_PHYS_ADDR;
|
||||
bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS;
|
||||
|
||||
pin_func = 0;
|
||||
|
||||
#ifdef CONFIG_MIPS_DB1000
|
||||
printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
|
||||
#endif
|
||||
|
|
@ -164,12 +161,16 @@ void __init board_setup(void)
|
|||
/* Not valid for Au1550 */
|
||||
#if defined(CONFIG_IRDA) && \
|
||||
(defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
|
||||
/* Set IRFIRSEL instead of GPIO15 */
|
||||
pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
/* Power off until the driver is in use */
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
|
||||
BCSR_RESETS_IRDA_MODE_OFF);
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
/* Set IRFIRSEL instead of GPIO15 */
|
||||
pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
/* Power off until the driver is in use */
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
|
||||
BCSR_RESETS_IRDA_MODE_OFF);
|
||||
}
|
||||
#endif
|
||||
bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
|
||||
|
||||
|
|
@ -177,31 +178,35 @@ void __init board_setup(void)
|
|||
alchemy_gpio1_input_enable();
|
||||
|
||||
#ifdef CONFIG_MIPS_MIRAGE
|
||||
/* GPIO[20] is output */
|
||||
alchemy_gpio_direction_output(20, 0);
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
/* Set GPIO[210:208] instead of SSI_0 */
|
||||
pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
|
||||
/* GPIO[20] is output */
|
||||
alchemy_gpio_direction_output(20, 0);
|
||||
|
||||
/* Set GPIO[215:211] for LEDs */
|
||||
pin_func |= 5 << 2;
|
||||
/* Set GPIO[210:208] instead of SSI_0 */
|
||||
pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
|
||||
|
||||
/* Set GPIO[214:213] for more LEDs */
|
||||
pin_func |= 5 << 12;
|
||||
/* Set GPIO[215:211] for LEDs */
|
||||
pin_func |= 5 << 2;
|
||||
|
||||
/* Set GPIO[207:200] instead of PCMCIA/LCD */
|
||||
pin_func |= SYS_PF_LCD | SYS_PF_PC;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
/* Set GPIO[214:213] for more LEDs */
|
||||
pin_func |= 5 << 12;
|
||||
|
||||
/*
|
||||
* Enable speaker amplifier. This should
|
||||
* be part of the audio driver.
|
||||
*/
|
||||
alchemy_gpio_direction_output(209, 1);
|
||||
/* Set GPIO[207:200] instead of PCMCIA/LCD */
|
||||
pin_func |= SYS_PF_LCD | SYS_PF_PC;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
|
||||
pm_power_off = mirage_power_off;
|
||||
_machine_halt = mirage_power_off;
|
||||
_machine_restart = (void(*)(char *))mips_softreset;
|
||||
/*
|
||||
* Enable speaker amplifier. This should
|
||||
* be part of the audio driver.
|
||||
*/
|
||||
alchemy_gpio_direction_output(209, 1);
|
||||
|
||||
pm_power_off = mirage_power_off;
|
||||
_machine_halt = mirage_power_off;
|
||||
_machine_restart = (void(*)(char *))mips_softreset;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MIPS_BOSPORUS
|
||||
|
|
|
|||
|
|
@ -51,10 +51,9 @@ void __init prom_init(void)
|
|||
prom_init_cmdline();
|
||||
|
||||
memsize_str = prom_getenv("memsize");
|
||||
if (!memsize_str)
|
||||
if (!memsize_str || strict_strtoul(memsize_str, 0, &memsize))
|
||||
memsize = 0x04000000;
|
||||
else
|
||||
strict_strtoul(memsize_str, 0, &memsize);
|
||||
|
||||
add_memory_region(0, memsize, BOOT_MEM_RAM);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -325,9 +325,7 @@ int __init ar7_gpio_init(void)
|
|||
size = 0x1f;
|
||||
}
|
||||
|
||||
gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
|
||||
AR7_REGS_GPIO + 0x10);
|
||||
|
||||
gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size);
|
||||
if (!gpch->regs) {
|
||||
printk(KERN_ERR "%s: failed to ioremap regs\n",
|
||||
gpch->chip.label);
|
||||
|
|
|
|||
|
|
@ -16,8 +16,8 @@
|
|||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
unsigned long long vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr;
|
||||
struct stat sb;
|
||||
uint64_t vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr;
|
||||
|
||||
if (argc != 3) {
|
||||
fprintf(stderr, "Usage: %s <pathname> <vmlinux_load_addr>\n",
|
||||
|
|
|
|||
|
|
@ -1,11 +1,7 @@
|
|||
config CAVIUM_OCTEON_SPECIFIC_OPTIONS
|
||||
bool "Enable Octeon specific options"
|
||||
depends on CPU_CAVIUM_OCTEON
|
||||
default "y"
|
||||
if CPU_CAVIUM_OCTEON
|
||||
|
||||
config CAVIUM_CN63XXP1
|
||||
bool "Enable CN63XXP1 errata worarounds"
|
||||
depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
|
||||
default "n"
|
||||
help
|
||||
The CN63XXP1 chip requires build time workarounds to
|
||||
|
|
@ -16,7 +12,6 @@ config CAVIUM_CN63XXP1
|
|||
|
||||
config CAVIUM_OCTEON_2ND_KERNEL
|
||||
bool "Build the kernel to be used as a 2nd kernel on the same chip"
|
||||
depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
|
||||
default "n"
|
||||
help
|
||||
This option configures this kernel to be linked at a different
|
||||
|
|
@ -26,7 +21,6 @@ config CAVIUM_OCTEON_2ND_KERNEL
|
|||
|
||||
config CAVIUM_OCTEON_HW_FIX_UNALIGNED
|
||||
bool "Enable hardware fixups of unaligned loads and stores"
|
||||
depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
|
||||
default "y"
|
||||
help
|
||||
Configure the Octeon hardware to automatically fix unaligned loads
|
||||
|
|
@ -38,7 +32,6 @@ config CAVIUM_OCTEON_HW_FIX_UNALIGNED
|
|||
|
||||
config CAVIUM_OCTEON_CVMSEG_SIZE
|
||||
int "Number of L1 cache lines reserved for CVMSEG memory"
|
||||
depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
|
||||
range 0 54
|
||||
default 1
|
||||
help
|
||||
|
|
@ -50,7 +43,6 @@ config CAVIUM_OCTEON_CVMSEG_SIZE
|
|||
|
||||
config CAVIUM_OCTEON_LOCK_L2
|
||||
bool "Lock often used kernel code in the L2"
|
||||
depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS
|
||||
default "y"
|
||||
help
|
||||
Enable locking parts of the kernel into the L2 cache.
|
||||
|
|
@ -93,7 +85,6 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY
|
|||
config ARCH_SPARSEMEM_ENABLE
|
||||
def_bool y
|
||||
select SPARSEMEM_STATIC
|
||||
depends on CPU_CAVIUM_OCTEON
|
||||
|
||||
config CAVIUM_OCTEON_HELPER
|
||||
def_bool y
|
||||
|
|
@ -107,6 +98,8 @@ config NEED_SG_DMA_LENGTH
|
|||
|
||||
config SWIOTLB
|
||||
def_bool y
|
||||
depends on CPU_CAVIUM_OCTEON
|
||||
select IOMMU_HELPER
|
||||
select NEED_SG_DMA_LENGTH
|
||||
|
||||
|
||||
endif # CPU_CAVIUM_OCTEON
|
||||
|
|
|
|||
|
|
@ -17,6 +17,6 @@
|
|||
#define SMP_CACHE_SHIFT L1_CACHE_SHIFT
|
||||
#define SMP_CACHE_BYTES L1_CACHE_BYTES
|
||||
|
||||
#define __read_mostly __attribute__((__section__(".data.read_mostly")))
|
||||
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
|
||||
|
||||
#endif /* _ASM_CACHE_H */
|
||||
|
|
|
|||
|
|
@ -14,6 +14,9 @@
|
|||
#ifndef __ASM_CEVT_R4K_H
|
||||
#define __ASM_CEVT_R4K_H
|
||||
|
||||
#include <linux/clockchips.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
|
||||
|
||||
void mips_event_handler(struct clock_event_device *dev);
|
||||
|
|
|
|||
|
|
@ -5,7 +5,9 @@
|
|||
#include <asm/cache.h>
|
||||
#include <asm-generic/dma-coherent.h>
|
||||
|
||||
#ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
|
||||
#include <dma-coherence.h>
|
||||
#endif
|
||||
|
||||
extern struct dma_map_ops *mips_dma_map_ops;
|
||||
|
||||
|
|
|
|||
|
|
@ -70,6 +70,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
|
|||
static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
|
||||
unsigned long addr, pte_t *ptep)
|
||||
{
|
||||
flush_tlb_mm(vma->vm_mm);
|
||||
}
|
||||
|
||||
static inline int huge_pte_none(pte_t pte)
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ struct bcm_tag {
|
|||
char kernel_crc[CRC_LEN];
|
||||
/* 228-235: Unused at present */
|
||||
char reserved1[8];
|
||||
/* 236-239: CRC32 of header excluding tagVersion */
|
||||
/* 236-239: CRC32 of header excluding last 20 bytes */
|
||||
char header_crc[CRC_LEN];
|
||||
/* 240-255: Unused at present */
|
||||
char reserved2[16];
|
||||
|
|
|
|||
|
|
@ -211,7 +211,7 @@ EXPORT_SYMBOL(vdma_free);
|
|||
*/
|
||||
int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
|
||||
{
|
||||
int first, pages, npages;
|
||||
int first, pages;
|
||||
|
||||
if (laddr > 0xffffff) {
|
||||
if (vdma_debug)
|
||||
|
|
@ -228,8 +228,7 @@ int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
|
|||
return -EINVAL; /* invalid physical address */
|
||||
}
|
||||
|
||||
npages = pages =
|
||||
(((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
|
||||
pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
|
||||
first = laddr >> 12;
|
||||
if (vdma_debug)
|
||||
printk("vdma_remap: first=%x, pages=%x\n", first, pages);
|
||||
|
|
|
|||
|
|
@ -242,9 +242,7 @@ EXPORT_SYMBOL_GPL(jz4740_dma_get_residue);
|
|||
|
||||
static void jz4740_dma_chan_irq(struct jz4740_dma_chan *dma)
|
||||
{
|
||||
uint32_t status;
|
||||
|
||||
status = jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id));
|
||||
(void) jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id));
|
||||
|
||||
jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0,
|
||||
JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_TRANSFER_DONE);
|
||||
|
|
|
|||
|
|
@ -89,7 +89,7 @@ static int jz4740_clockevent_set_next(unsigned long evt,
|
|||
|
||||
static struct clock_event_device jz4740_clockevent = {
|
||||
.name = "jz4740-timer",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC,
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.set_next_event = jz4740_clockevent_set_next,
|
||||
.set_mode = jz4740_clockevent_set_mode,
|
||||
.rating = 200,
|
||||
|
|
|
|||
|
|
@ -27,11 +27,13 @@ void jz4740_timer_enable_watchdog(void)
|
|||
{
|
||||
writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(jz4740_timer_enable_watchdog);
|
||||
|
||||
void jz4740_timer_disable_watchdog(void)
|
||||
{
|
||||
writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(jz4740_timer_disable_watchdog);
|
||||
|
||||
void __init jz4740_timer_init(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
|
||||
#define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */
|
||||
#define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */
|
||||
#define JUMP_RANGE_MASK ((1UL << 28) - 1)
|
||||
|
||||
#define INSN_NOP 0x00000000 /* nop */
|
||||
#define INSN_JAL(addr) \
|
||||
|
|
@ -44,12 +45,12 @@ static inline void ftrace_dyn_arch_init_insns(void)
|
|||
|
||||
/* jal (ftrace_caller + 8), jump over the first two instruction */
|
||||
buf = (u32 *)&insn_jal_ftrace_caller;
|
||||
uasm_i_jal(&buf, (FTRACE_ADDR + 8));
|
||||
uasm_i_jal(&buf, (FTRACE_ADDR + 8) & JUMP_RANGE_MASK);
|
||||
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
/* j ftrace_graph_caller */
|
||||
buf = (u32 *)&insn_j_ftrace_graph_caller;
|
||||
uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
|
||||
uasm_i_j(&buf, (unsigned long)ftrace_graph_caller & JUMP_RANGE_MASK);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -540,8 +540,8 @@ asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
|
|||
secure_computing(regs->regs[2]);
|
||||
|
||||
if (unlikely(current->audit_context) && entryexit)
|
||||
audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
|
||||
regs->regs[2]);
|
||||
audit_syscall_exit(AUDITSC_RESULT(regs->regs[7]),
|
||||
-regs->regs[2]);
|
||||
|
||||
if (!(current->ptrace & PT_PTRACED))
|
||||
goto out;
|
||||
|
|
|
|||
|
|
@ -565,7 +565,7 @@ einval: li v0, -ENOSYS
|
|||
sys sys_ioprio_get 2 /* 4315 */
|
||||
sys sys_utimensat 4
|
||||
sys sys_signalfd 3
|
||||
sys sys_ni_syscall 0
|
||||
sys sys_ni_syscall 0 /* was timerfd */
|
||||
sys sys_eventfd 1
|
||||
sys sys_fallocate 6 /* 4320 */
|
||||
sys sys_timerfd_create 2
|
||||
|
|
|
|||
|
|
@ -404,7 +404,7 @@ sys_call_table:
|
|||
PTR sys_ioprio_get
|
||||
PTR sys_utimensat /* 5275 */
|
||||
PTR sys_signalfd
|
||||
PTR sys_ni_syscall
|
||||
PTR sys_ni_syscall /* was timerfd */
|
||||
PTR sys_eventfd
|
||||
PTR sys_fallocate
|
||||
PTR sys_timerfd_create /* 5280 */
|
||||
|
|
|
|||
|
|
@ -403,7 +403,7 @@ EXPORT(sysn32_call_table)
|
|||
PTR sys_ioprio_get
|
||||
PTR compat_sys_utimensat
|
||||
PTR compat_sys_signalfd /* 6280 */
|
||||
PTR sys_ni_syscall
|
||||
PTR sys_ni_syscall /* was timerfd */
|
||||
PTR sys_eventfd
|
||||
PTR sys_fallocate
|
||||
PTR sys_timerfd_create
|
||||
|
|
|
|||
|
|
@ -522,7 +522,7 @@ sys_call_table:
|
|||
PTR sys_ioprio_get /* 4315 */
|
||||
PTR compat_sys_utimensat
|
||||
PTR compat_sys_signalfd
|
||||
PTR sys_ni_syscall
|
||||
PTR sys_ni_syscall /* was timerfd */
|
||||
PTR sys_eventfd
|
||||
PTR sys32_fallocate /* 4320 */
|
||||
PTR sys_timerfd_create
|
||||
|
|
|
|||
|
|
@ -374,7 +374,8 @@ void __noreturn die(const char *str, struct pt_regs *regs)
|
|||
unsigned long dvpret = dvpe();
|
||||
#endif /* CONFIG_MIPS_MT_SMTC */
|
||||
|
||||
notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV);
|
||||
if (notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV) == NOTIFY_STOP)
|
||||
sig = 0;
|
||||
|
||||
console_verbose();
|
||||
spin_lock_irq(&die_lock);
|
||||
|
|
@ -383,9 +384,6 @@ void __noreturn die(const char *str, struct pt_regs *regs)
|
|||
mips_mt_regdump(dvpret);
|
||||
#endif /* CONFIG_MIPS_MT_SMTC */
|
||||
|
||||
if (notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV) == NOTIFY_STOP)
|
||||
sig = 0;
|
||||
|
||||
printk("%s[#%d]:\n", str, ++die_counter);
|
||||
show_registers(regs);
|
||||
add_taint(TAINT_DIE);
|
||||
|
|
|
|||
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