rt2x00: rt2x00pci: fix build error on Ralink RT3x5x SoCs
The rt2800pci driver supports the built-in wireless
MAC of the Ralink RT3x5x SoCs. However building the
driver for these SoCs leads to the following error:
LD init/built-in.o
drivers/built-in.o: In function `rt2800pci_rxdone_tasklet':
<...>/drivers/net/wireless/rt2x00/rt2800pci.c:1012: undefined reference to `rt2x00pci_rxdone'
drivers/built-in.o:(.rodata+0x4780): undefined reference to `rt2x00pci_initialize'
drivers/built-in.o:(.rodata+0x4784): undefined reference to `rt2x00pci_uninitialize'
drivers/built-in.o:(.rodata+0x47bc): undefined reference to `rt2x00pci_flush_queue'
drivers/built-in.o:(.rodata+0x4818): undefined reference to `rt2x00pci_regbusy_read'
make[5]: *** [vmlinux] Error 1
The missing functions are provided by the rt2x00pci
module. This module is only selected by the rt2800pci
driver if PCI support is enabled in the kernel, because
some parts of the rt2x00pci code depends on PCI support.
PCI support is not available on the RT3x5x SoCs because
those have no PCI host controller at all.
Move the non PCI specific code from rt2x00pci into a
separate module. This makes it possible to use that
code even if PCI support is disabled. The affected
functions are used by all of the rt2x00 PCI drivers
so select the new module for those drivers.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gabor Juhos
John W. Linville
Родитель
83589b30f1
Коммит
69a2bac898
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@ -20,6 +20,7 @@ if RT2X00
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config RT2400PCI
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tristate "Ralink rt2400 (PCI/PCMCIA) support"
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depends on PCI
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select RT2X00_LIB_MMIO
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select RT2X00_LIB_PCI
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select EEPROM_93CX6
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---help---
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@ -31,6 +32,7 @@ config RT2400PCI
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config RT2500PCI
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tristate "Ralink rt2500 (PCI/PCMCIA) support"
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depends on PCI
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select RT2X00_LIB_MMIO
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select RT2X00_LIB_PCI
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select EEPROM_93CX6
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---help---
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@ -43,6 +45,7 @@ config RT61PCI
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tristate "Ralink rt2501/rt61 (PCI/PCMCIA) support"
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depends on PCI
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select RT2X00_LIB_PCI
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select RT2X00_LIB_MMIO
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select RT2X00_LIB_FIRMWARE
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select RT2X00_LIB_CRYPTO
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select CRC_ITU_T
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@ -57,6 +60,7 @@ config RT2800PCI
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tristate "Ralink rt27xx/rt28xx/rt30xx (PCI/PCIe/PCMCIA) support"
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depends on PCI || SOC_RT288X || SOC_RT305X
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select RT2800_LIB
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select RT2X00_LIB_MMIO
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select RT2X00_LIB_PCI if PCI
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select RT2X00_LIB_SOC if SOC_RT288X || SOC_RT305X
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select RT2X00_LIB_FIRMWARE
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@ -185,6 +189,9 @@ endif
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config RT2800_LIB
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tristate
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config RT2X00_LIB_MMIO
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tristate
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config RT2X00_LIB_PCI
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tristate
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select RT2X00_LIB
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@ -9,6 +9,7 @@ rt2x00lib-$(CONFIG_RT2X00_LIB_FIRMWARE) += rt2x00firmware.o
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rt2x00lib-$(CONFIG_RT2X00_LIB_LEDS) += rt2x00leds.o
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obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o
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obj-$(CONFIG_RT2X00_LIB_MMIO) += rt2x00mmio.o
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obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o
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obj-$(CONFIG_RT2X00_LIB_SOC) += rt2x00soc.o
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obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o
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@ -34,6 +34,7 @@
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#include <linux/slab.h>
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#include "rt2x00.h"
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#include "rt2x00mmio.h"
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#include "rt2x00pci.h"
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#include "rt2400pci.h"
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@ -34,6 +34,7 @@
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#include <linux/slab.h>
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#include "rt2x00.h"
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#include "rt2x00mmio.h"
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#include "rt2x00pci.h"
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#include "rt2500pci.h"
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@ -41,6 +41,7 @@
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#include <linux/eeprom_93cx6.h>
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#include "rt2x00.h"
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#include "rt2x00mmio.h"
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#include "rt2x00pci.h"
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#include "rt2x00soc.h"
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#include "rt2800lib.h"
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@ -0,0 +1,216 @@
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/*
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Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the
|
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00mmio
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Abstract: rt2x00 generic mmio device routines.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include "rt2x00.h"
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#include "rt2x00mmio.h"
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/*
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* Register access.
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*/
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int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset,
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const struct rt2x00_field32 field,
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u32 *reg)
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{
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unsigned int i;
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if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
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return 0;
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for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
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rt2x00pci_register_read(rt2x00dev, offset, reg);
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if (!rt2x00_get_field32(*reg, field))
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return 1;
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udelay(REGISTER_BUSY_DELAY);
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}
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printk_once(KERN_ERR "%s() Indirect register access failed: "
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"offset=0x%.08x, value=0x%.08x\n", __func__, offset, *reg);
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*reg = ~0;
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
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bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue = rt2x00dev->rx;
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struct queue_entry *entry;
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struct queue_entry_priv_pci *entry_priv;
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struct skb_frame_desc *skbdesc;
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int max_rx = 16;
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while (--max_rx) {
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entry = rt2x00queue_get_entry(queue, Q_INDEX);
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entry_priv = entry->priv_data;
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if (rt2x00dev->ops->lib->get_entry_state(entry))
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break;
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/*
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* Fill in desc fields of the skb descriptor
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*/
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skbdesc = get_skb_frame_desc(entry->skb);
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skbdesc->desc = entry_priv->desc;
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skbdesc->desc_len = entry->queue->desc_size;
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/*
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* DMA is already done, notify rt2x00lib that
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* it finished successfully.
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*/
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rt2x00lib_dmastart(entry);
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rt2x00lib_dmadone(entry);
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/*
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* Send the frame to rt2x00lib for further processing.
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*/
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rt2x00lib_rxdone(entry, GFP_ATOMIC);
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}
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return !max_rx;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
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void rt2x00pci_flush_queue(struct data_queue *queue, bool drop)
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{
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unsigned int i;
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for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
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msleep(10);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_flush_queue);
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/*
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* Device initialization handlers.
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*/
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static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue)
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{
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struct queue_entry_priv_pci *entry_priv;
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void *addr;
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dma_addr_t dma;
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unsigned int i;
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/*
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* Allocate DMA memory for descriptor and buffer.
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*/
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addr = dma_alloc_coherent(rt2x00dev->dev,
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queue->limit * queue->desc_size,
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&dma, GFP_KERNEL);
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if (!addr)
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return -ENOMEM;
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memset(addr, 0, queue->limit * queue->desc_size);
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/*
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* Initialize all queue entries to contain valid addresses.
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*/
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for (i = 0; i < queue->limit; i++) {
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entry_priv = queue->entries[i].priv_data;
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entry_priv->desc = addr + i * queue->desc_size;
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entry_priv->desc_dma = dma + i * queue->desc_size;
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}
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return 0;
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}
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static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue)
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{
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struct queue_entry_priv_pci *entry_priv =
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queue->entries[0].priv_data;
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if (entry_priv->desc)
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dma_free_coherent(rt2x00dev->dev,
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queue->limit * queue->desc_size,
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entry_priv->desc, entry_priv->desc_dma);
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entry_priv->desc = NULL;
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}
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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int status;
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/*
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* Allocate DMA
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*/
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queue_for_each(rt2x00dev, queue) {
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status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
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if (status)
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goto exit;
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}
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/*
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* Register interrupt handler.
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*/
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status = request_irq(rt2x00dev->irq,
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rt2x00dev->ops->lib->irq_handler,
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IRQF_SHARED, rt2x00dev->name, rt2x00dev);
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if (status) {
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ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
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rt2x00dev->irq, status);
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goto exit;
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}
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return 0;
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exit:
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queue_for_each(rt2x00dev, queue)
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rt2x00pci_free_queue_dma(rt2x00dev, queue);
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return status;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
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void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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/*
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* Free irq line.
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*/
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free_irq(rt2x00dev->irq, rt2x00dev);
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/*
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* Free DMA
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*/
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queue_for_each(rt2x00dev, queue)
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rt2x00pci_free_queue_dma(rt2x00dev, queue);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
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/*
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* rt2x00mmio module information.
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*/
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MODULE_AUTHOR(DRV_PROJECT);
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MODULE_VERSION(DRV_VERSION);
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MODULE_DESCRIPTION("rt2x00 mmio library");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,119 @@
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/*
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Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
|
||||
<http://rt2x00.serialmonkey.com>
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the
|
||||
Free Software Foundation, Inc.,
|
||||
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
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/*
|
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Module: rt2x00mmio
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Abstract: Data structures for the rt2x00mmio module.
|
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*/
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#ifndef RT2X00MMIO_H
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#define RT2X00MMIO_H
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#include <linux/io.h>
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/*
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* Register access.
|
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*/
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static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset,
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u32 *value)
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{
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*value = readl(rt2x00dev->csr.base + offset);
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}
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||||
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static inline void rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
|
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const unsigned int offset,
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void *value, const u32 length)
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||||
{
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memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
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}
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|
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static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
|
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const unsigned int offset,
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u32 value)
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{
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writel(value, rt2x00dev->csr.base + offset);
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}
|
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|
||||
static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
|
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const unsigned int offset,
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const void *value,
|
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const u32 length)
|
||||
{
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__iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
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}
|
||||
|
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/**
|
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* rt2x00pci_regbusy_read - Read from register with busy check
|
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* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
|
||||
* @offset: Register offset
|
||||
* @field: Field to check if register is busy
|
||||
* @reg: Pointer to where register contents should be stored
|
||||
*
|
||||
* This function will read the given register, and checks if the
|
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* register is busy. If it is, it will sleep for a couple of
|
||||
* microseconds before reading the register again. If the register
|
||||
* is not read after a certain timeout, this function will return
|
||||
* FALSE.
|
||||
*/
|
||||
int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
const struct rt2x00_field32 field,
|
||||
u32 *reg);
|
||||
|
||||
/**
|
||||
* struct queue_entry_priv_pci: Per entry PCI specific information
|
||||
*
|
||||
* @desc: Pointer to device descriptor
|
||||
* @desc_dma: DMA pointer to &desc.
|
||||
* @data: Pointer to device's entry memory.
|
||||
* @data_dma: DMA pointer to &data.
|
||||
*/
|
||||
struct queue_entry_priv_pci {
|
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__le32 *desc;
|
||||
dma_addr_t desc_dma;
|
||||
};
|
||||
|
||||
/**
|
||||
* rt2x00pci_rxdone - Handle RX done events
|
||||
* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
|
||||
*
|
||||
* Returns true if there are still rx frames pending and false if all
|
||||
* pending rx frames were processed.
|
||||
*/
|
||||
bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00pci_flush_queue - Flush data queue
|
||||
* @queue: Data queue to stop
|
||||
* @drop: True to drop all pending frames.
|
||||
*
|
||||
* This will wait for a maximum of 100ms, waiting for the queues
|
||||
* to become empty.
|
||||
*/
|
||||
void rt2x00pci_flush_queue(struct data_queue *queue, bool drop);
|
||||
|
||||
/*
|
||||
* Device initialization handlers.
|
||||
*/
|
||||
int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
|
||||
void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
#endif /* RT2X00MMIO_H */
|
||||
|
|
@ -32,182 +32,6 @@
|
|||
#include "rt2x00.h"
|
||||
#include "rt2x00pci.h"
|
||||
|
||||
/*
|
||||
* Register access.
|
||||
*/
|
||||
int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
const struct rt2x00_field32 field,
|
||||
u32 *reg)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00pci_register_read(rt2x00dev, offset, reg);
|
||||
if (!rt2x00_get_field32(*reg, field))
|
||||
return 1;
|
||||
udelay(REGISTER_BUSY_DELAY);
|
||||
}
|
||||
|
||||
printk_once(KERN_ERR "%s() Indirect register access failed: "
|
||||
"offset=0x%.08x, value=0x%.08x\n", __func__, offset, *reg);
|
||||
*reg = ~0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
|
||||
|
||||
bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
struct data_queue *queue = rt2x00dev->rx;
|
||||
struct queue_entry *entry;
|
||||
struct queue_entry_priv_pci *entry_priv;
|
||||
struct skb_frame_desc *skbdesc;
|
||||
int max_rx = 16;
|
||||
|
||||
while (--max_rx) {
|
||||
entry = rt2x00queue_get_entry(queue, Q_INDEX);
|
||||
entry_priv = entry->priv_data;
|
||||
|
||||
if (rt2x00dev->ops->lib->get_entry_state(entry))
|
||||
break;
|
||||
|
||||
/*
|
||||
* Fill in desc fields of the skb descriptor
|
||||
*/
|
||||
skbdesc = get_skb_frame_desc(entry->skb);
|
||||
skbdesc->desc = entry_priv->desc;
|
||||
skbdesc->desc_len = entry->queue->desc_size;
|
||||
|
||||
/*
|
||||
* DMA is already done, notify rt2x00lib that
|
||||
* it finished successfully.
|
||||
*/
|
||||
rt2x00lib_dmastart(entry);
|
||||
rt2x00lib_dmadone(entry);
|
||||
|
||||
/*
|
||||
* Send the frame to rt2x00lib for further processing.
|
||||
*/
|
||||
rt2x00lib_rxdone(entry, GFP_ATOMIC);
|
||||
}
|
||||
|
||||
return !max_rx;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
|
||||
|
||||
void rt2x00pci_flush_queue(struct data_queue *queue, bool drop)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
|
||||
msleep(10);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00pci_flush_queue);
|
||||
|
||||
/*
|
||||
* Device initialization handlers.
|
||||
*/
|
||||
static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
|
||||
struct data_queue *queue)
|
||||
{
|
||||
struct queue_entry_priv_pci *entry_priv;
|
||||
void *addr;
|
||||
dma_addr_t dma;
|
||||
unsigned int i;
|
||||
|
||||
/*
|
||||
* Allocate DMA memory for descriptor and buffer.
|
||||
*/
|
||||
addr = dma_alloc_coherent(rt2x00dev->dev,
|
||||
queue->limit * queue->desc_size,
|
||||
&dma, GFP_KERNEL);
|
||||
if (!addr)
|
||||
return -ENOMEM;
|
||||
|
||||
memset(addr, 0, queue->limit * queue->desc_size);
|
||||
|
||||
/*
|
||||
* Initialize all queue entries to contain valid addresses.
|
||||
*/
|
||||
for (i = 0; i < queue->limit; i++) {
|
||||
entry_priv = queue->entries[i].priv_data;
|
||||
entry_priv->desc = addr + i * queue->desc_size;
|
||||
entry_priv->desc_dma = dma + i * queue->desc_size;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
|
||||
struct data_queue *queue)
|
||||
{
|
||||
struct queue_entry_priv_pci *entry_priv =
|
||||
queue->entries[0].priv_data;
|
||||
|
||||
if (entry_priv->desc)
|
||||
dma_free_coherent(rt2x00dev->dev,
|
||||
queue->limit * queue->desc_size,
|
||||
entry_priv->desc, entry_priv->desc_dma);
|
||||
entry_priv->desc = NULL;
|
||||
}
|
||||
|
||||
int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
struct data_queue *queue;
|
||||
int status;
|
||||
|
||||
/*
|
||||
* Allocate DMA
|
||||
*/
|
||||
queue_for_each(rt2x00dev, queue) {
|
||||
status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
|
||||
if (status)
|
||||
goto exit;
|
||||
}
|
||||
|
||||
/*
|
||||
* Register interrupt handler.
|
||||
*/
|
||||
status = request_irq(rt2x00dev->irq,
|
||||
rt2x00dev->ops->lib->irq_handler,
|
||||
IRQF_SHARED, rt2x00dev->name, rt2x00dev);
|
||||
if (status) {
|
||||
ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
|
||||
rt2x00dev->irq, status);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
exit:
|
||||
queue_for_each(rt2x00dev, queue)
|
||||
rt2x00pci_free_queue_dma(rt2x00dev, queue);
|
||||
|
||||
return status;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
|
||||
|
||||
void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
struct data_queue *queue;
|
||||
|
||||
/*
|
||||
* Free irq line.
|
||||
*/
|
||||
free_irq(rt2x00dev->irq, rt2x00dev);
|
||||
|
||||
/*
|
||||
* Free DMA
|
||||
*/
|
||||
queue_for_each(rt2x00dev, queue)
|
||||
rt2x00pci_free_queue_dma(rt2x00dev, queue);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
|
||||
|
||||
/*
|
||||
* PCI driver handlers.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -35,94 +35,6 @@
|
|||
*/
|
||||
#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
|
||||
|
||||
/*
|
||||
* Register access.
|
||||
*/
|
||||
static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 *value)
|
||||
{
|
||||
*value = readl(rt2x00dev->csr.base + offset);
|
||||
}
|
||||
|
||||
static inline void rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
void *value, const u32 length)
|
||||
{
|
||||
memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
|
||||
}
|
||||
|
||||
static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 value)
|
||||
{
|
||||
writel(value, rt2x00dev->csr.base + offset);
|
||||
}
|
||||
|
||||
static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
const void *value,
|
||||
const u32 length)
|
||||
{
|
||||
__iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
|
||||
}
|
||||
|
||||
/**
|
||||
* rt2x00pci_regbusy_read - Read from register with busy check
|
||||
* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
|
||||
* @offset: Register offset
|
||||
* @field: Field to check if register is busy
|
||||
* @reg: Pointer to where register contents should be stored
|
||||
*
|
||||
* This function will read the given register, and checks if the
|
||||
* register is busy. If it is, it will sleep for a couple of
|
||||
* microseconds before reading the register again. If the register
|
||||
* is not read after a certain timeout, this function will return
|
||||
* FALSE.
|
||||
*/
|
||||
int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
const struct rt2x00_field32 field,
|
||||
u32 *reg);
|
||||
|
||||
/**
|
||||
* struct queue_entry_priv_pci: Per entry PCI specific information
|
||||
*
|
||||
* @desc: Pointer to device descriptor
|
||||
* @desc_dma: DMA pointer to &desc.
|
||||
* @data: Pointer to device's entry memory.
|
||||
* @data_dma: DMA pointer to &data.
|
||||
*/
|
||||
struct queue_entry_priv_pci {
|
||||
__le32 *desc;
|
||||
dma_addr_t desc_dma;
|
||||
};
|
||||
|
||||
/**
|
||||
* rt2x00pci_rxdone - Handle RX done events
|
||||
* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
|
||||
*
|
||||
* Returns true if there are still rx frames pending and false if all
|
||||
* pending rx frames were processed.
|
||||
*/
|
||||
bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/**
|
||||
* rt2x00pci_flush_queue - Flush data queue
|
||||
* @queue: Data queue to stop
|
||||
* @drop: True to drop all pending frames.
|
||||
*
|
||||
* This will wait for a maximum of 100ms, waiting for the queues
|
||||
* to become empty.
|
||||
*/
|
||||
void rt2x00pci_flush_queue(struct data_queue *queue, bool drop);
|
||||
|
||||
/*
|
||||
* Device initialization handlers.
|
||||
*/
|
||||
int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
|
||||
void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
|
||||
|
||||
/*
|
||||
* PCI driver handlers.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@
|
|||
#include <linux/eeprom_93cx6.h>
|
||||
|
||||
#include "rt2x00.h"
|
||||
#include "rt2x00mmio.h"
|
||||
#include "rt2x00pci.h"
|
||||
#include "rt61pci.h"
|
||||
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче