A small collection of fixes. I'll make another sweep soon to look for
more fixes for this -rc series. - Mark device node const in of_clk_get_parent APIs to ease landing changes in users later - Fix flag for Qualcomm SC7180 video clocks where we thought it would never turn off but actually hardware takes care of it - Remove disp_cc_mdss_rscc_ahb_clk on Qualcomm SC7180 SoCs because this clk is always on anyway - Correct some bad dt-binding numbers for i.MX8MN SoCs -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl5sMV0RHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXzBhAAh4bih0khHYOh7FWJVuIuoUqJrikiSc4L rxD1oi3ZyUyauvFl0QOcxe6YB8qwjA6G14FWjluj6LzhXGCnl2I58j0eWV/eFiCD 3GXMhbUkEHjOLa1BC52LgJ7/eifQHECCFJkzi7HXhUDaUDpC4zP+ysBBde5A1ECX IYCXmUlv0TkxRe6pEgtylrU+XFC9IPuq8FOHHYEcDKi8XwLhw8PS2klBkE2hsHH6 i/ZFIx+2VFFcCtPfvOtOl1L26pHrvehorjp9JaajyKInDpfLYAZPoxCY4k7agxix uGQq8B+2Wl9W5yT4vGhuujSV2IVZHlC56VjBbwEUTGwCIKJqiexTqaL8Ls083nY+ te/wi21pFBr1oH77ZlP6gbUlHGaH2wONJVim8DbLrZ5t7fcGf0pMWkofBgEyj2rh WX8Kbhjp/GN4Q3qUMQbF1Gej3RMg9e6/LirlaFkvi0clrXFOzlM1tCuDdrfgA5i6 NnTL1MDFPu57Vc5Srkk7+/jabMSFCX1fxX3GP/y7ZS3Fnxxb6ZY6iMpUdP+XnJyz G0PKPFRg26k5YC2wy5V8hBpvt/9IXkv1FTnDa6FLSbuMAFVdL3mb+FDxlVZBZAGJ KL0HMGfhOieZDB0K+6KNQndbcJzWCPZYcChqZaLaM8/ZFFFMWZ8Sh6B5BR4Keal7 wUYounnQlic= =m90j -----END PGP SIGNATURE----- Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "A small collection of fixes. I'll make another sweep soon to look for more fixes for this -rc series. - Mark device node const in of_clk_get_parent APIs to ease landing changes in users later - Fix flag for Qualcomm SC7180 video clocks where we thought it would never turn off but actually hardware takes care of it - Remove disp_cc_mdss_rscc_ahb_clk on Qualcomm SC7180 SoCs because this clk is always on anyway - Correct some bad dt-binding numbers for i.MX8MN SoCs" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: imx8mn: Fix incorrect clock defines clk: qcom: dispcc: Remove support of disp_cc_mdss_rscc_ahb_clk clk: qcom: videocc: Update the clock flag for video_cc_vcodec0_core_clk of: clk: Make of_clk_get_parent_{count,name}() parameter const
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Коммит
69a4d0baee
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@ -4713,7 +4713,7 @@ EXPORT_SYMBOL(of_clk_get_by_name);
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*
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* Returns: The number of clocks that are possible parents of this node
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*/
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unsigned int of_clk_get_parent_count(struct device_node *np)
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unsigned int of_clk_get_parent_count(const struct device_node *np)
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{
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int count;
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@ -4725,7 +4725,7 @@ unsigned int of_clk_get_parent_count(struct device_node *np)
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}
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EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
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const char *of_clk_get_parent_name(struct device_node *np, int index)
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const char *of_clk_get_parent_name(const struct device_node *np, int index)
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{
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struct of_phandle_args clkspec;
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struct property *prop;
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@ -592,24 +592,6 @@ static struct clk_branch disp_cc_mdss_rot_clk = {
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},
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};
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static struct clk_branch disp_cc_mdss_rscc_ahb_clk = {
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.halt_reg = 0x400c,
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.halt_check = BRANCH_HALT,
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.clkr = {
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.enable_reg = 0x400c,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "disp_cc_mdss_rscc_ahb_clk",
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.parent_data = &(const struct clk_parent_data){
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.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch disp_cc_mdss_rscc_vsync_clk = {
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.halt_reg = 0x4008,
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.halt_check = BRANCH_HALT,
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@ -687,7 +669,6 @@ static struct clk_regmap *disp_cc_sc7180_clocks[] = {
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[DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr,
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[DISP_CC_MDSS_ROT_CLK] = &disp_cc_mdss_rot_clk.clkr,
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[DISP_CC_MDSS_ROT_CLK_SRC] = &disp_cc_mdss_rot_clk_src.clkr,
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[DISP_CC_MDSS_RSCC_AHB_CLK] = &disp_cc_mdss_rscc_ahb_clk.clkr,
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[DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
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[DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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[DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
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@ -97,7 +97,7 @@ static struct clk_branch video_cc_vcodec0_axi_clk = {
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static struct clk_branch video_cc_vcodec0_core_clk = {
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.halt_reg = 0x890,
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.halt_check = BRANCH_HALT,
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.halt_check = BRANCH_HALT_VOTED,
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.clkr = {
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.enable_reg = 0x890,
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.enable_mask = BIT(0),
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@ -122,8 +122,8 @@
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#define IMX8MN_CLK_I2C1 105
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#define IMX8MN_CLK_I2C2 106
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#define IMX8MN_CLK_I2C3 107
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#define IMX8MN_CLK_I2C4 118
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#define IMX8MN_CLK_UART1 119
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#define IMX8MN_CLK_I2C4 108
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#define IMX8MN_CLK_UART1 109
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#define IMX8MN_CLK_UART2 110
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#define IMX8MN_CLK_UART3 111
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#define IMX8MN_CLK_UART4 112
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@ -11,17 +11,17 @@ struct of_device_id;
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#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_OF)
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unsigned int of_clk_get_parent_count(struct device_node *np);
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const char *of_clk_get_parent_name(struct device_node *np, int index);
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unsigned int of_clk_get_parent_count(const struct device_node *np);
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const char *of_clk_get_parent_name(const struct device_node *np, int index);
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void of_clk_init(const struct of_device_id *matches);
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#else /* !CONFIG_COMMON_CLK || !CONFIG_OF */
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static inline unsigned int of_clk_get_parent_count(struct device_node *np)
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static inline unsigned int of_clk_get_parent_count(const struct device_node *np)
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{
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return 0;
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}
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static inline const char *of_clk_get_parent_name(struct device_node *np,
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static inline const char *of_clk_get_parent_name(const struct device_node *np,
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int index)
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{
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return NULL;
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