V4L/DVB (7005): cx23885: SRAM reallocation prior to analog video implementation
We need to clear space large enough for the video and encoder fifos. Signed-off-by: Steven Toth <stoth@hauppauge.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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5206d6ec36
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69ad6e56ba
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@ -75,12 +75,12 @@ static LIST_HEAD(cx23885_devlist);
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static struct sram_channel cx23885_sram_channels[] = {
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[SRAM_CH01] = {
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.name = "test ch1",
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.name = "VID A",
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.cmds_start = 0x10000,
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.ctrl_start = 0x10500,
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.cdt = 0x10900,
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.fifo_start = 0x3000,
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.fifo_size = 0x1000,
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.ctrl_start = 0x105b0,
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.cdt = 0x107b0,
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.fifo_start = 0x40,
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.fifo_size = 0x2800,
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.ptr1_reg = DMA1_PTR1,
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.ptr2_reg = DMA1_PTR2,
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.cnt1_reg = DMA1_CNT1,
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@ -102,8 +102,8 @@ static struct sram_channel cx23885_sram_channels[] = {
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[SRAM_CH03] = {
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.name = "TS1 B",
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.cmds_start = 0x100A0,
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.ctrl_start = 0x10780,
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.cdt = 0x10400,
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.ctrl_start = 0x10630,
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.cdt = 0x10870,
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.fifo_start = 0x5000,
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.fifo_size = 0x1000,
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.ptr1_reg = DMA3_PTR1,
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@ -139,7 +139,7 @@ static struct sram_channel cx23885_sram_channels[] = {
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.name = "TS2 C",
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.cmds_start = 0x10140,
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.ctrl_start = 0x10680,
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.cdt = 0x10480,
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.cdt = 0x108d0,
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.fifo_start = 0x6000,
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.fifo_size = 0x1000,
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.ptr1_reg = DMA5_PTR1,
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@ -207,12 +207,12 @@ static struct sram_channel cx23885_sram_channels[] = {
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static struct sram_channel cx23887_sram_channels[] = {
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[SRAM_CH01] = {
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.name = "test ch1",
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.cmds_start = 0x0,
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.ctrl_start = 0x0,
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.cdt = 0x0,
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.fifo_start = 0x0,
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.fifo_size = 0x0,
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.name = "VID A",
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.cmds_start = 0x10000,
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.ctrl_start = 0x105b0,
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.cdt = 0x107b0,
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.fifo_start = 0x40,
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.fifo_size = 0x2800,
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.ptr1_reg = DMA1_PTR1,
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.ptr2_reg = DMA1_PTR2,
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.cnt1_reg = DMA1_CNT1,
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@ -231,12 +231,12 @@ static struct sram_channel cx23887_sram_channels[] = {
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.cnt2_reg = DMA2_CNT2,
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},
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[SRAM_CH03] = {
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.name = "ch3",
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.cmds_start = 0x0,
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.ctrl_start = 0x0,
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.cdt = 0x0,
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.fifo_start = 0x0,
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.fifo_size = 0x0,
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.name = "TS1 B",
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.cmds_start = 0x100A0,
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.ctrl_start = 0x10780,
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.cdt = 0x10400,
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.fifo_start = 0x5000,
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.fifo_size = 0x1000,
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.ptr1_reg = DMA3_PTR1,
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.ptr2_reg = DMA3_PTR2,
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.cnt1_reg = DMA3_CNT1,
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