ARM: add DMA support to sh7372, enable DMA for SDHI
This adds DMA support for the sh7372 sh-mobile ARM core, using the shdma dmaengine driver, and uses DMA for the SDHI SD-card controller on this SoC. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Родитель
d5b732b17c
Коммит
69bf6f451f
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@ -24,6 +24,7 @@
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/mfd/sh_mobile_sdhi.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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@ -231,6 +232,11 @@ static struct platform_device keysc_device = {
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};
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/* SDHI0 */
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static struct sh_mobile_sdhi_info sdhi0_info = {
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.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
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.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
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};
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static struct resource sdhi0_resources[] = {
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[0] = {
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.name = "SDHI0",
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@ -249,6 +255,9 @@ static struct platform_device sdhi0_device = {
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.num_resources = ARRAY_SIZE(sdhi0_resources),
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.resource = sdhi0_resources,
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.id = 0,
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.dev = {
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.platform_data = &sdhi0_info,
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},
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};
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/* USB1 */
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@ -431,4 +431,14 @@ enum {
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GPIO_FN_SDENC_DV_CLKI,
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};
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/* DMA slave IDs */
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enum {
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SHDMA_SLAVE_SDHI0_RX,
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SHDMA_SLAVE_SDHI0_TX,
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SHDMA_SLAVE_SDHI1_RX,
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SHDMA_SLAVE_SDHI1_TX,
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SHDMA_SLAVE_SDHI2_RX,
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SHDMA_SLAVE_SDHI2_TX,
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};
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#endif /* __ASM_SH7372_H__ */
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@ -26,9 +26,11 @@
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#include <linux/input.h>
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#include <linux/io.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_dma.h>
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#include <linux/sh_intc.h>
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#include <linux/sh_timer.h>
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#include <mach/hardware.h>
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#include <mach/sh7372.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -227,6 +229,224 @@ static struct platform_device iic1_device = {
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.resource = iic1_resources,
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};
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/* DMA */
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/* Transmit sizes and respective CHCR register values */
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enum {
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XMIT_SZ_8BIT = 0,
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XMIT_SZ_16BIT = 1,
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XMIT_SZ_32BIT = 2,
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XMIT_SZ_64BIT = 7,
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XMIT_SZ_128BIT = 3,
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XMIT_SZ_256BIT = 4,
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XMIT_SZ_512BIT = 5,
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};
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/* log2(size / 8) - used to calculate number of transfers */
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#define TS_SHIFT { \
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[XMIT_SZ_8BIT] = 0, \
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[XMIT_SZ_16BIT] = 1, \
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[XMIT_SZ_32BIT] = 2, \
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[XMIT_SZ_64BIT] = 3, \
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[XMIT_SZ_128BIT] = 4, \
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[XMIT_SZ_256BIT] = 5, \
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[XMIT_SZ_512BIT] = 6, \
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}
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#define TS_INDEX2VAL(i) ((((i) & 3) << 3) | \
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(((i) & 0xc) << (20 - 2)))
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static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_SDHI0_TX,
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.addr = 0xe6850030,
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.chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
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.mid_rid = 0xc1,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI0_RX,
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.addr = 0xe6850030,
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.chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
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.mid_rid = 0xc2,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI1_TX,
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.addr = 0xe6860030,
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.chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
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.mid_rid = 0xc9,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI1_RX,
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.addr = 0xe6860030,
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.chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
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.mid_rid = 0xca,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI2_TX,
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.addr = 0xe6870030,
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.chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
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.mid_rid = 0xcd,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI2_RX,
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.addr = 0xe6870030,
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.chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
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.mid_rid = 0xce,
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},
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};
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static const struct sh_dmae_channel sh7372_dmae_channels[] = {
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{
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.offset = 0,
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.dmars = 0,
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.dmars_bit = 0,
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}, {
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.offset = 0x10,
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.dmars = 0,
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.dmars_bit = 8,
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}, {
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.offset = 0x20,
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.dmars = 4,
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.dmars_bit = 0,
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}, {
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.offset = 0x30,
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.dmars = 4,
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.dmars_bit = 8,
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}, {
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.offset = 0x50,
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.dmars = 8,
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.dmars_bit = 0,
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}, {
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.offset = 0x60,
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.dmars = 8,
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.dmars_bit = 8,
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}
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};
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static const unsigned int ts_shift[] = TS_SHIFT;
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static struct sh_dmae_pdata dma_platform_data = {
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.slave = sh7372_dmae_slaves,
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.slave_num = ARRAY_SIZE(sh7372_dmae_slaves),
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.channel = sh7372_dmae_channels,
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.channel_num = ARRAY_SIZE(sh7372_dmae_channels),
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.ts_low_shift = 3,
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.ts_low_mask = 0x18,
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.ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */
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.ts_high_mask = 0x00300000,
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.ts_shift = ts_shift,
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.ts_shift_num = ARRAY_SIZE(ts_shift),
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.dmaor_init = DMAOR_DME,
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};
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/* Resource order important! */
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static struct resource sh7372_dmae0_resources[] = {
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{
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/* Channel registers and DMAOR */
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.start = 0xfe008020,
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.end = 0xfe00808f,
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.flags = IORESOURCE_MEM,
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},
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{
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/* DMARSx */
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.start = 0xfe009000,
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.end = 0xfe00900b,
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.flags = IORESOURCE_MEM,
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},
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{
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/* DMA error IRQ */
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.start = 246,
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.end = 246,
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.flags = IORESOURCE_IRQ,
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},
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{
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/* IRQ for channels 0-5 */
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.start = 240,
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.end = 245,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* Resource order important! */
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static struct resource sh7372_dmae1_resources[] = {
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{
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/* Channel registers and DMAOR */
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.start = 0xfe018020,
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.end = 0xfe01808f,
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.flags = IORESOURCE_MEM,
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},
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{
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/* DMARSx */
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.start = 0xfe019000,
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.end = 0xfe01900b,
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.flags = IORESOURCE_MEM,
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},
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{
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/* DMA error IRQ */
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.start = 254,
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.end = 254,
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.flags = IORESOURCE_IRQ,
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},
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{
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/* IRQ for channels 0-5 */
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.start = 248,
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.end = 253,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* Resource order important! */
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static struct resource sh7372_dmae2_resources[] = {
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{
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/* Channel registers and DMAOR */
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.start = 0xfe028020,
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.end = 0xfe02808f,
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.flags = IORESOURCE_MEM,
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},
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{
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/* DMARSx */
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.start = 0xfe029000,
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.end = 0xfe02900b,
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.flags = IORESOURCE_MEM,
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},
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{
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/* DMA error IRQ */
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.start = 262,
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.end = 262,
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.flags = IORESOURCE_IRQ,
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},
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{
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/* IRQ for channels 0-5 */
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.start = 256,
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.end = 261,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device dma0_device = {
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.name = "sh-dma-engine",
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.id = 0,
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.resource = sh7372_dmae0_resources,
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.num_resources = ARRAY_SIZE(sh7372_dmae0_resources),
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.dev = {
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.platform_data = &dma_platform_data,
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},
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};
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static struct platform_device dma1_device = {
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.name = "sh-dma-engine",
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.id = 1,
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.resource = sh7372_dmae1_resources,
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.num_resources = ARRAY_SIZE(sh7372_dmae1_resources),
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.dev = {
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.platform_data = &dma_platform_data,
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},
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};
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static struct platform_device dma2_device = {
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.name = "sh-dma-engine",
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.id = 2,
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.resource = sh7372_dmae2_resources,
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.num_resources = ARRAY_SIZE(sh7372_dmae2_resources),
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.dev = {
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.platform_data = &dma_platform_data,
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},
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};
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static struct platform_device *sh7372_early_devices[] __initdata = {
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&scif0_device,
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&scif1_device,
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@ -238,6 +458,9 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
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&cmt10_device,
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&iic0_device,
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&iic1_device,
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&dma0_device,
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&dma1_device,
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&dma2_device,
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};
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void __init sh7372_add_standard_devices(void)
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