hardirq/nmi: Allow nested nmi_enter()
Since there are already a number of sites (ARM64, PowerPC) that effectively nest nmi_enter(), make the primitive support this before adding even more. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Marc Zyngier <maz@kernel.org> Acked-by: Will Deacon <will@kernel.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Link: https://lkml.kernel.org/r/20200505134100.864179229@linutronix.de
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@ -251,22 +251,12 @@ asmlinkage __kprobes notrace unsigned long
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__sdei_handler(struct pt_regs *regs, struct sdei_registered_event *arg)
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{
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unsigned long ret;
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bool do_nmi_exit = false;
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/*
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* nmi_enter() deals with printk() re-entrance and use of RCU when
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* RCU believed this CPU was idle. Because critical events can
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* interrupt normal events, we may already be in_nmi().
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*/
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if (!in_nmi()) {
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nmi_enter();
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do_nmi_exit = true;
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}
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nmi_enter();
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ret = _sdei_handler(regs, arg);
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if (do_nmi_exit)
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nmi_exit();
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nmi_exit();
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return ret;
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}
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@ -906,17 +906,13 @@ bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
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asmlinkage void do_serror(struct pt_regs *regs, unsigned int esr)
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{
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const bool was_in_nmi = in_nmi();
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if (!was_in_nmi)
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nmi_enter();
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nmi_enter();
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/* non-RAS errors are not containable */
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if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr))
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arm64_serror_panic(regs, esr);
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if (!was_in_nmi)
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nmi_exit();
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nmi_exit();
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}
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asmlinkage void enter_from_user_mode(void)
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@ -441,15 +441,9 @@ nonrecoverable:
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void system_reset_exception(struct pt_regs *regs)
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{
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unsigned long hsrr0, hsrr1;
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bool nested = in_nmi();
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bool saved_hsrrs = false;
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/*
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* Avoid crashes in case of nested NMI exceptions. Recoverability
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* is determined by RI and in_nmi
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*/
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if (!nested)
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nmi_enter();
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nmi_enter();
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/*
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* System reset can interrupt code where HSRRs are live and MSR[RI]=1.
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@ -521,8 +515,7 @@ out:
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mtspr(SPRN_HSRR1, hsrr1);
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}
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if (!nested)
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nmi_exit();
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nmi_exit();
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/* What should we do here? We could issue a shutdown or hard reset. */
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}
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@ -823,9 +816,8 @@ int machine_check_generic(struct pt_regs *regs)
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void machine_check_exception(struct pt_regs *regs)
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{
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int recover = 0;
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bool nested = in_nmi();
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if (!nested)
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nmi_enter();
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nmi_enter();
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__this_cpu_inc(irq_stat.mce_exceptions);
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@ -851,8 +843,7 @@ void machine_check_exception(struct pt_regs *regs)
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if (check_io_access(regs))
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goto bail;
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if (!nested)
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nmi_exit();
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nmi_exit();
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die("Machine check", regs, SIGBUS);
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@ -863,8 +854,7 @@ void machine_check_exception(struct pt_regs *regs)
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return;
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bail:
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if (!nested)
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nmi_exit();
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nmi_exit();
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}
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void SMIException(struct pt_regs *regs)
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@ -65,13 +65,16 @@ extern void irq_exit(void);
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#define arch_nmi_exit() do { } while (0)
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#endif
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/*
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* nmi_enter() can nest up to 15 times; see NMI_BITS.
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*/
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#define nmi_enter() \
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do { \
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arch_nmi_enter(); \
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printk_nmi_enter(); \
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lockdep_off(); \
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ftrace_nmi_enter(); \
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BUG_ON(in_nmi()); \
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BUG_ON(in_nmi() == NMI_MASK); \
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preempt_count_add(NMI_OFFSET + HARDIRQ_OFFSET); \
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rcu_nmi_enter(); \
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lockdep_hardirq_enter(); \
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@ -26,13 +26,13 @@
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* PREEMPT_MASK: 0x000000ff
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* SOFTIRQ_MASK: 0x0000ff00
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* HARDIRQ_MASK: 0x000f0000
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* NMI_MASK: 0x00100000
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* NMI_MASK: 0x00f00000
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* PREEMPT_NEED_RESCHED: 0x80000000
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*/
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#define PREEMPT_BITS 8
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#define SOFTIRQ_BITS 8
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#define HARDIRQ_BITS 4
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#define NMI_BITS 1
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#define NMI_BITS 4
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#define PREEMPT_SHIFT 0
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#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
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