[PATCH] forcedeth config: module parameters
This patch adds (and modifies) module parameter support. Signed-Off-By: Ayaz Abdulla <aabdulla@nvidia.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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9589c77a0d
Коммит
69fe3fd7b1
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@ -761,8 +761,10 @@ static int max_interrupt_work = 5;
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* Throughput Mode: Every tx and rx packet will generate an interrupt.
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* CPU Mode: Interrupts are controlled by a timer.
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*/
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#define NV_OPTIMIZATION_MODE_THROUGHPUT 0
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#define NV_OPTIMIZATION_MODE_CPU 1
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enum {
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NV_OPTIMIZATION_MODE_THROUGHPUT,
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NV_OPTIMIZATION_MODE_CPU
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};
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static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
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/*
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@ -775,14 +777,31 @@ static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
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static int poll_interval = -1;
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/*
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* Disable MSI interrupts
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* MSI interrupts
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*/
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static int disable_msi = 0;
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enum {
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NV_MSI_INT_DISABLED,
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NV_MSI_INT_ENABLED
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};
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static int msi = NV_MSI_INT_ENABLED;
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/*
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* Disable MSIX interrupts
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* MSIX interrupts
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*/
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static int disable_msix = 0;
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enum {
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NV_MSIX_INT_DISABLED,
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NV_MSIX_INT_ENABLED
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};
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static int msix = NV_MSIX_INT_ENABLED;
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/*
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* DMA 64bit
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*/
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enum {
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NV_DMA_64BIT_DISABLED,
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NV_DMA_64BIT_ENABLED
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};
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static int dma_64bit = NV_DMA_64BIT_ENABLED;
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static inline struct fe_priv *get_nvpriv(struct net_device *dev)
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{
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@ -4115,16 +4134,18 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
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/* packet format 3: supports 40-bit addressing */
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np->desc_ver = DESC_VER_3;
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np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
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if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
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printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
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pci_name(pci_dev));
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} else {
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dev->features |= NETIF_F_HIGHDMA;
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printk(KERN_INFO "forcedeth: using HIGHDMA\n");
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}
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if (pci_set_consistent_dma_mask(pci_dev, 0x0000007fffffffffULL)) {
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printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed for device %s.\n",
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pci_name(pci_dev));
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if (dma_64bit) {
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if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
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printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
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pci_name(pci_dev));
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} else {
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dev->features |= NETIF_F_HIGHDMA;
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printk(KERN_INFO "forcedeth: using HIGHDMA\n");
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}
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if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) {
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printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed, using 32-bit ring buffers for device %s.\n",
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pci_name(pci_dev));
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}
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}
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} else if (id->driver_data & DEV_HAS_LARGEDESC) {
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/* packet format 2: supports jumbo frames */
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@ -4157,10 +4178,10 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
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}
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np->msi_flags = 0;
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if ((id->driver_data & DEV_HAS_MSI) && !disable_msi) {
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if ((id->driver_data & DEV_HAS_MSI) && msi) {
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np->msi_flags |= NV_MSI_CAPABLE;
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}
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if ((id->driver_data & DEV_HAS_MSI_X) && !disable_msix) {
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if ((id->driver_data & DEV_HAS_MSI_X) && msix) {
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np->msi_flags |= NV_MSI_X_CAPABLE;
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}
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@ -4473,10 +4494,12 @@ module_param(optimization_mode, int, 0);
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MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
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module_param(poll_interval, int, 0);
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MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
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module_param(disable_msi, int, 0);
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MODULE_PARM_DESC(disable_msi, "Disable MSI interrupts by setting to 1.");
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module_param(disable_msix, int, 0);
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MODULE_PARM_DESC(disable_msix, "Disable MSIX interrupts by setting to 1.");
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module_param(msi, int, 0);
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MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0.");
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module_param(msix, int, 0);
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MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0.");
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module_param(dma_64bit, int, 0);
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MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");
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MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
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MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
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