mmc: host driver for Ricoh Bay1Controllers
Signed-off-by: Sascha Sommer <saschasommer@freenet.de> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This commit is contained in:
Sascha Sommer
Pierre Ossman
Родитель
ea901300cd
Коммит
6a36913a33
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@ -3609,6 +3609,12 @@ P: Jim Cromie
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M: jim.cromie@gmail.com
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S: Maintained
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SDRICOH_CS MMC/SD HOST CONTROLLER INTERFACE DRIVER
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P: Sascha Sommer
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M: saschasommer@freenet.de
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L: sdricohcs-devel@lists.sourceforge.net (subscribers-only)
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S: Maintained
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SECURITY CONTACT
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P: Security Officers
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M: security@kernel.org
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@ -164,3 +164,13 @@ config MMC_S3C
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If unsure, say N.
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config MMC_SDRICOH_CS
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tristate "MMC/SD driver for Ricoh Bay1Controllers (EXPERIMENTAL)"
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depends on EXPERIMENTAL && MMC && PCI && PCMCIA
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help
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Say Y here if your Notebook reports a Ricoh Bay1Controller PCMCIA
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card whenever you insert a MMC or SD card into the card slot.
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To compile this driver as a module, choose M here: the
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module will be called sdricoh_cs.
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@ -20,3 +20,5 @@ obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
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obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
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obj-$(CONFIG_MMC_SPI) += mmc_spi.o
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obj-$(CONFIG_MMC_S3C) += s3cmci.o
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obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o
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@ -0,0 +1,575 @@
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/*
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* sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
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* found on some Ricoh RL5c476 II cardbus bridge
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*
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* Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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/*
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#define DEBUG
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#define VERBOSE_DEBUG
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*/
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#include <linux/delay.h>
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#include <linux/highmem.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/scatterlist.h>
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#include <linux/version.h>
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#include <pcmcia/cs_types.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/cistpl.h>
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#include <pcmcia/ds.h>
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#include <linux/io.h>
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#include <linux/mmc/host.h>
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#define DRIVER_NAME "sdricoh_cs"
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static unsigned int switchlocked;
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/* i/o region */
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#define SDRICOH_PCI_REGION 0
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#define SDRICOH_PCI_REGION_SIZE 0x1000
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/* registers */
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#define R104_VERSION 0x104
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#define R200_CMD 0x200
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#define R204_CMD_ARG 0x204
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#define R208_DATAIO 0x208
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#define R20C_RESP 0x20c
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#define R21C_STATUS 0x21c
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#define R2E0_INIT 0x2e0
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#define R2E4_STATUS_RESP 0x2e4
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#define R2F0_RESET 0x2f0
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#define R224_MODE 0x224
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#define R226_BLOCKSIZE 0x226
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#define R228_POWER 0x228
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#define R230_DATA 0x230
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/* flags for the R21C_STATUS register */
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#define STATUS_CMD_FINISHED 0x00000001
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#define STATUS_TRANSFER_FINISHED 0x00000004
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#define STATUS_CARD_INSERTED 0x00000020
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#define STATUS_CARD_LOCKED 0x00000080
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#define STATUS_CMD_TIMEOUT 0x00400000
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#define STATUS_READY_TO_READ 0x01000000
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#define STATUS_READY_TO_WRITE 0x02000000
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#define STATUS_BUSY 0x40000000
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/* timeouts */
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#define INIT_TIMEOUT 100
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#define CMD_TIMEOUT 100000
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#define TRANSFER_TIMEOUT 100000
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#define BUSY_TIMEOUT 32767
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/* list of supported pcmcia devices */
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static struct pcmcia_device_id pcmcia_ids[] = {
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/* vendor and device strings followed by their crc32 hashes */
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PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
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0xc3901202),
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PCMCIA_DEVICE_NULL,
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};
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MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
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/* mmc privdata */
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struct sdricoh_host {
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struct device *dev;
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struct mmc_host *mmc; /* MMC structure */
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unsigned char __iomem *iobase;
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struct pci_dev *pci_dev;
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int app_cmd;
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};
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/***************** register i/o helper functions *****************************/
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static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
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unsigned int reg)
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{
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unsigned int value = readl(host->iobase + reg);
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dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
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return value;
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}
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static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
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unsigned int value)
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{
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writel(value, host->iobase + reg);
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dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
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}
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static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
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unsigned int reg)
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{
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unsigned int value = readw(host->iobase + reg);
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dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
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return value;
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}
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static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
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unsigned short value)
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{
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writew(value, host->iobase + reg);
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dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
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}
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static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
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unsigned int reg)
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{
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unsigned int value = readb(host->iobase + reg);
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dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
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return value;
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}
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static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
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unsigned int timeout){
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unsigned int loop;
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unsigned int status = 0;
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struct device *dev = host->dev;
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for (loop = 0; loop < timeout; loop++) {
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status = sdricoh_readl(host, R21C_STATUS);
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sdricoh_writel(host, R2E4_STATUS_RESP, status);
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if (status & wanted)
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break;
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}
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if (loop == timeout) {
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dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
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return -ETIMEDOUT;
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}
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/* do not do this check in the loop as some commands fail otherwise */
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if (status & 0x7F0000) {
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dev_err(dev, "waiting for status bit %x failed\n", wanted);
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return -EINVAL;
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}
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return 0;
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}
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static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
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unsigned int arg)
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{
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unsigned int status;
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int result = 0;
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unsigned int loop = 0;
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/* reset status reg? */
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sdricoh_writel(host, R21C_STATUS, 0x18);
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/* fill parameters */
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sdricoh_writel(host, R204_CMD_ARG, arg);
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sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
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/* wait for command completion */
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if (opcode) {
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for (loop = 0; loop < CMD_TIMEOUT; loop++) {
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status = sdricoh_readl(host, R21C_STATUS);
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sdricoh_writel(host, R2E4_STATUS_RESP, status);
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if (status & STATUS_CMD_FINISHED)
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break;
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}
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/* don't check for timeout in the loop it is not always
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reset correctly
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*/
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if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT)
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result = -ETIMEDOUT;
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}
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return result;
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}
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static int sdricoh_reset(struct sdricoh_host *host)
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{
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dev_dbg(host->dev, "reset\n");
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sdricoh_writel(host, R2F0_RESET, 0x10001);
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sdricoh_writel(host, R2E0_INIT, 0x10000);
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if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
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return -EIO;
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sdricoh_writel(host, R2E0_INIT, 0x10007);
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sdricoh_writel(host, R224_MODE, 0x2000000);
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sdricoh_writel(host, R228_POWER, 0xe0);
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/* status register ? */
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sdricoh_writel(host, R21C_STATUS, 0x18);
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return 0;
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}
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static int sdricoh_blockio(struct sdricoh_host *host, int read,
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u8 *buf, int len)
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{
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int size;
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u32 data = 0;
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/* wait until the data is available */
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if (read) {
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if (sdricoh_query_status(host, STATUS_READY_TO_READ,
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TRANSFER_TIMEOUT))
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return -ETIMEDOUT;
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sdricoh_writel(host, R21C_STATUS, 0x18);
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/* read data */
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while (len) {
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data = sdricoh_readl(host, R230_DATA);
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size = min(len, 4);
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len -= size;
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while (size) {
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*buf = data & 0xFF;
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buf++;
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data >>= 8;
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size--;
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}
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}
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} else {
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if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
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TRANSFER_TIMEOUT))
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return -ETIMEDOUT;
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sdricoh_writel(host, R21C_STATUS, 0x18);
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/* write data */
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while (len) {
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size = min(len, 4);
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len -= size;
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while (size) {
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data >>= 8;
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data |= (u32)*buf << 24;
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buf++;
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size--;
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}
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sdricoh_writel(host, R230_DATA, data);
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}
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}
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if (len)
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return -EIO;
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return 0;
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}
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static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct sdricoh_host *host = mmc_priv(mmc);
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struct mmc_command *cmd = mrq->cmd;
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struct mmc_data *data = cmd->data;
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struct device *dev = host->dev;
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unsigned char opcode = cmd->opcode;
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int i;
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dev_dbg(dev, "=============================\n");
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dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode);
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sdricoh_writel(host, R21C_STATUS, 0x18);
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/* MMC_APP_CMDs need some special handling */
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if (host->app_cmd) {
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opcode |= 64;
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host->app_cmd = 0;
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} else if (opcode == 55)
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host->app_cmd = 1;
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/* read/write commands seem to require this */
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if (data) {
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sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
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sdricoh_writel(host, R208_DATAIO, 0);
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}
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cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
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/* read response buffer */
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if (cmd->flags & MMC_RSP_PRESENT) {
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if (cmd->flags & MMC_RSP_136) {
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/* CRC is stripped so we need to do some shifting. */
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for (i = 0; i < 4; i++) {
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cmd->resp[i] =
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sdricoh_readl(host,
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R20C_RESP + (3 - i) * 4) << 8;
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if (i != 3)
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cmd->resp[i] |=
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sdricoh_readb(host, R20C_RESP +
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(3 - i) * 4 - 1);
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}
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} else
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cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
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}
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/* transfer data */
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if (data && cmd->error == 0) {
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dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
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"sg length %i\n", data->blksz, data->blocks,
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data->sg_len, data->sg->length);
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/* enter data reading mode */
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sdricoh_writel(host, R21C_STATUS, 0x837f031e);
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for (i = 0; i < data->blocks; i++) {
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size_t len = data->blksz;
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u8 *buf;
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struct page *page;
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int result;
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page = sg_page(data->sg);
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buf = kmap(page) + data->sg->offset + (len * i);
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result =
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sdricoh_blockio(host,
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data->flags & MMC_DATA_READ, buf, len);
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kunmap(page);
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flush_dcache_page(page);
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if (result) {
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dev_err(dev, "sdricoh_request: cmd %i "
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"block transfer failed\n", cmd->opcode);
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cmd->error = result;
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break;
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} else
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data->bytes_xfered += len;
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}
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sdricoh_writel(host, R208_DATAIO, 1);
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if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
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TRANSFER_TIMEOUT)) {
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dev_err(dev, "sdricoh_request: transfer end error\n");
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cmd->error = -EINVAL;
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}
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}
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/* FIXME check busy flag */
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mmc_request_done(mmc, mrq);
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dev_dbg(dev, "=============================\n");
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}
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static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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{
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struct sdricoh_host *host = mmc_priv(mmc);
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dev_dbg(host->dev, "set_ios\n");
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if (ios->power_mode == MMC_POWER_ON) {
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||||
sdricoh_writel(host, R228_POWER, 0xc0e0);
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||||
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||||
if (ios->bus_width == MMC_BUS_WIDTH_4) {
|
||||
sdricoh_writel(host, R224_MODE, 0x2000300);
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||||
sdricoh_writel(host, R228_POWER, 0x40e0);
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} else {
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sdricoh_writel(host, R224_MODE, 0x2000340);
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||||
}
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||||
|
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} else if (ios->power_mode == MMC_POWER_UP) {
|
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sdricoh_writel(host, R224_MODE, 0x2000320);
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sdricoh_writel(host, R228_POWER, 0xe0);
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||||
}
|
||||
}
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||||
|
||||
static int sdricoh_get_ro(struct mmc_host *mmc)
|
||||
{
|
||||
struct sdricoh_host *host = mmc_priv(mmc);
|
||||
unsigned int status;
|
||||
|
||||
status = sdricoh_readl(host, R21C_STATUS);
|
||||
sdricoh_writel(host, R2E4_STATUS_RESP, status);
|
||||
|
||||
/* some notebooks seem to have the locked flag switched */
|
||||
if (switchlocked)
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return !(status & STATUS_CARD_LOCKED);
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||||
|
||||
return (status & STATUS_CARD_LOCKED);
|
||||
}
|
||||
|
||||
static struct mmc_host_ops sdricoh_ops = {
|
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.request = sdricoh_request,
|
||||
.set_ios = sdricoh_set_ios,
|
||||
.get_ro = sdricoh_get_ro,
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};
|
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|
||||
/* initialize the control and register it to the mmc framework */
|
||||
static int sdricoh_init_mmc(struct pci_dev *pci_dev,
|
||||
struct pcmcia_device *pcmcia_dev)
|
||||
{
|
||||
int result = 0;
|
||||
void __iomem *iobase = NULL;
|
||||
struct mmc_host *mmc = NULL;
|
||||
struct sdricoh_host *host = NULL;
|
||||
struct device *dev = &pcmcia_dev->dev;
|
||||
/* map iomem */
|
||||
if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
|
||||
SDRICOH_PCI_REGION_SIZE) {
|
||||
dev_dbg(dev, "unexpected pci resource len\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
iobase =
|
||||
pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
|
||||
if (!iobase) {
|
||||
dev_err(dev, "unable to map iobase\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
/* check version? */
|
||||
if (readl(iobase + R104_VERSION) != 0x4000) {
|
||||
dev_dbg(dev, "no supported mmc controller found\n");
|
||||
result = -ENODEV;
|
||||
goto err;
|
||||
}
|
||||
/* allocate privdata */
|
||||
mmc = pcmcia_dev->priv =
|
||||
mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
|
||||
if (!mmc) {
|
||||
dev_err(dev, "mmc_alloc_host failed\n");
|
||||
result = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
host = mmc_priv(mmc);
|
||||
|
||||
host->iobase = iobase;
|
||||
host->dev = dev;
|
||||
host->pci_dev = pci_dev;
|
||||
|
||||
mmc->ops = &sdricoh_ops;
|
||||
|
||||
/* FIXME: frequency and voltage handling is done by the controller
|
||||
*/
|
||||
mmc->f_min = 450000;
|
||||
mmc->f_max = 24000000;
|
||||
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
|
||||
mmc->max_seg_size = 1024 * 512;
|
||||
mmc->max_blk_size = 512;
|
||||
|
||||
/* reset the controler */
|
||||
if (sdricoh_reset(host)) {
|
||||
dev_dbg(dev, "could not reset\n");
|
||||
result = -EIO;
|
||||
goto err;
|
||||
|
||||
}
|
||||
|
||||
result = mmc_add_host(mmc);
|
||||
|
||||
if (!result) {
|
||||
dev_dbg(dev, "mmc host registered\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
err:
|
||||
if (iobase)
|
||||
iounmap(iobase);
|
||||
if (mmc)
|
||||
mmc_free_host(mmc);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/* search for supported mmc controllers */
|
||||
static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
|
||||
{
|
||||
struct pci_dev *pci_dev = NULL;
|
||||
|
||||
dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
|
||||
" %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
|
||||
|
||||
/* search pci cardbus bridge that contains the mmc controler */
|
||||
/* the io region is already claimed by yenta_socket... */
|
||||
while ((pci_dev =
|
||||
pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
|
||||
pci_dev))) {
|
||||
/* try to init the device */
|
||||
if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
|
||||
dev_info(&pcmcia_dev->dev, "MMC controller found\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
}
|
||||
dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
|
||||
{
|
||||
struct mmc_host *mmc = link->priv;
|
||||
|
||||
dev_dbg(&link->dev, "detach\n");
|
||||
|
||||
/* remove mmc host */
|
||||
if (mmc) {
|
||||
struct sdricoh_host *host = mmc_priv(mmc);
|
||||
mmc_remove_host(mmc);
|
||||
pci_iounmap(host->pci_dev, host->iobase);
|
||||
pci_dev_put(host->pci_dev);
|
||||
mmc_free_host(mmc);
|
||||
}
|
||||
pcmcia_disable_device(link);
|
||||
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
|
||||
{
|
||||
struct mmc_host *mmc = link->priv;
|
||||
dev_dbg(&link->dev, "suspend\n");
|
||||
mmc_suspend_host(mmc, PMSG_SUSPEND);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
|
||||
{
|
||||
struct mmc_host *mmc = link->priv;
|
||||
dev_dbg(&link->dev, "resume\n");
|
||||
sdricoh_reset(mmc_priv(mmc));
|
||||
mmc_resume_host(mmc);
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define sdricoh_pcmcia_suspend NULL
|
||||
#define sdricoh_pcmcia_resume NULL
|
||||
#endif
|
||||
|
||||
static struct pcmcia_driver sdricoh_driver = {
|
||||
.drv = {
|
||||
.name = DRIVER_NAME,
|
||||
},
|
||||
.probe = sdricoh_pcmcia_probe,
|
||||
.remove = sdricoh_pcmcia_detach,
|
||||
.id_table = pcmcia_ids,
|
||||
.suspend = sdricoh_pcmcia_suspend,
|
||||
.resume = sdricoh_pcmcia_resume,
|
||||
};
|
||||
|
||||
/*****************************************************************************\
|
||||
* *
|
||||
* Driver init/exit *
|
||||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
static int __init sdricoh_drv_init(void)
|
||||
{
|
||||
return pcmcia_register_driver(&sdricoh_driver);
|
||||
}
|
||||
|
||||
static void __exit sdricoh_drv_exit(void)
|
||||
{
|
||||
pcmcia_unregister_driver(&sdricoh_driver);
|
||||
}
|
||||
|
||||
module_init(sdricoh_drv_init);
|
||||
module_exit(sdricoh_drv_exit);
|
||||
|
||||
module_param(switchlocked, uint, 0444);
|
||||
|
||||
MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
|
||||
MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
|
||||
"Use this when unlocked cards are shown readonly (default 0)");
|
||||
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