[PATCH] USB: ohci uses driver model wakeup flags
This makes OHCI use the driver model wakeup control bits for its root hub (e.g. disable on amd756, because of chip erratum) and for the controller itself. It no longer uses the hcd glue bits with those roles, and depends on the previous patch making the root hub available earlier. Note that on most platforms (boot code properly setting the RWC bit) this gives a partial workaround for the way PCI isn't currently flagging devices that support PME# signals. (Because of odd PCI init sequencing on PPC.) That's because many OHCI controllers support "legacy PCI PM" ... without involving any PCI PM capability. USB wakeup from STR, if it works on your system, may still involve tweaking things by hand in /proc/acpi/wakeup. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -443,11 +443,16 @@ ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
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static int ohci_init (struct ohci_hcd *ohci)
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{
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int ret;
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struct usb_hcd *hcd = ohci_to_hcd(ohci);
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disable (ohci);
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ohci->regs = ohci_to_hcd(ohci)->regs;
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ohci->regs = hcd->regs;
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ohci->next_statechange = jiffies;
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/* REVISIT this BIOS handshake is now moved into PCI "quirks", and
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* was never needed for most non-PCI systems ... remove the code?
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*/
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#ifndef IR_DISABLE
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/* SMM owns the HC? not for long! */
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if (!no_handshake && ohci_readl (ohci,
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@ -478,8 +483,10 @@ static int ohci_init (struct ohci_hcd *ohci)
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/* Disable HC interrupts */
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ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
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// flush the writes
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(void) ohci_readl (ohci, &ohci->regs->control);
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/* flush the writes, and save key bits like RWC */
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if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
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ohci->hc_control |= OHCI_CTRL_RWC;
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/* Read the number of ports unless overridden */
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if (ohci->num_ports == 0)
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@ -488,16 +495,19 @@ static int ohci_init (struct ohci_hcd *ohci)
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if (ohci->hcca)
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return 0;
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ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
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ohci->hcca = dma_alloc_coherent (hcd->self.controller,
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sizeof *ohci->hcca, &ohci->hcca_dma, 0);
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if (!ohci->hcca)
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return -ENOMEM;
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if ((ret = ohci_mem_init (ohci)) < 0)
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ohci_stop (ohci_to_hcd(ohci));
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ohci_stop (hcd);
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else {
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register_reboot_notifier (&ohci->reboot_notifier);
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create_debug_files (ohci);
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}
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return ret;
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}
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/*-------------------------------------------------------------------------*/
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@ -510,6 +520,7 @@ static int ohci_run (struct ohci_hcd *ohci)
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{
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u32 mask, temp;
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int first = ohci->fminterval == 0;
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struct usb_hcd *hcd = ohci_to_hcd(ohci);
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disable (ohci);
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@ -525,18 +536,17 @@ static int ohci_run (struct ohci_hcd *ohci)
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/* also: power/overcurrent flags in roothub.a */
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}
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/* Reset USB nearly "by the book". RemoteWakeupConnected
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* saved if boot firmware (BIOS/SMM/...) told us it's connected
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* (for OHCI integrated on mainboard, it normally is)
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/* Reset USB nearly "by the book". RemoteWakeupConnected was
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* saved if boot firmware (BIOS/SMM/...) told us it's connected,
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* or if bus glue did the same (e.g. for PCI add-in cards with
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* PCI PM support).
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*/
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ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
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ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
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hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
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ohci->hc_control);
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if (ohci->hc_control & OHCI_CTRL_RWC
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&& !(ohci->flags & OHCI_QUIRK_AMD756))
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ohci_to_hcd(ohci)->can_wakeup = 1;
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ohci_readl (ohci, &ohci->regs->control));
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if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
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&& !device_may_wakeup(hcd->self.controller))
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device_init_wakeup(hcd->self.controller, 1);
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switch (ohci->hc_control & OHCI_CTRL_HCFS) {
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case OHCI_USB_OPER:
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@ -632,7 +642,7 @@ retry:
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ohci->hc_control &= OHCI_CTRL_RWC;
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ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
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ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
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ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
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hcd->state = HC_STATE_RUNNING;
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/* wake on ConnectStatusChange, matching external hubs */
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ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
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@ -667,15 +677,10 @@ retry:
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// POTPGT delay is bits 24-31, in 2 ms units.
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mdelay ((temp >> 23) & 0x1fe);
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ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
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hcd->state = HC_STATE_RUNNING;
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ohci_dump (ohci, 1);
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if (ohci_to_hcd(ohci)->self.root_hub == NULL) {
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register_reboot_notifier (&ohci->reboot_notifier);
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create_debug_files (ohci);
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}
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return 0;
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}
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@ -107,7 +107,7 @@ static int ohci_bus_suspend (struct usb_hcd *hcd)
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&ohci->regs->intrstatus);
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/* maybe resume can wake root hub */
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if (hcd->remote_wakeup)
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if (device_may_wakeup(&ohci_to_hcd(ohci)->self.root_hub->dev))
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ohci->hc_control |= OHCI_CTRL_RWE;
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else
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ohci->hc_control &= ~OHCI_CTRL_RWE;
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@ -246,9 +246,9 @@ static int ohci_bus_resume (struct usb_hcd *hcd)
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(void) ohci_readl (ohci, &ohci->regs->control);
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msleep (3);
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temp = OHCI_CONTROL_INIT | OHCI_USB_OPER;
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if (hcd->can_wakeup)
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temp |= OHCI_CTRL_RWC;
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temp = ohci->hc_control;
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temp &= OHCI_CTRL_RWC;
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temp |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
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ohci->hc_control = temp;
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ohci_writel (ohci, temp, &ohci->regs->control);
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(void) ohci_readl (ohci, &ohci->regs->control);
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@ -302,7 +302,7 @@ ohci_hub_status_data (struct usb_hcd *hcd, char *buf)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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int i, changed = 0, length = 1;
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int can_suspend = hcd->can_wakeup;
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int can_suspend = device_may_wakeup(&hcd->self.root_hub->dev);
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unsigned long flags;
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spin_lock_irqsave (&ohci->lock, flags);
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@ -354,7 +354,7 @@ ohci_hub_status_data (struct usb_hcd *hcd, char *buf)
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*/
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if (!(status & RH_PS_CCS))
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continue;
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if ((status & RH_PS_PSS) && hcd->remote_wakeup)
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if ((status & RH_PS_PSS) && can_suspend)
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continue;
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can_suspend = 0;
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}
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@ -35,7 +35,10 @@ ohci_pci_start (struct usb_hcd *hcd)
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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int ret;
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if(hcd->self.controller && hcd->self.controller->bus == &pci_bus_type) {
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/* REVISIT this whole block should move to reset(), which handles
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* all the other one-time init.
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*/
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if (hcd->self.controller) {
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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/* AMD 756, for most chips (early revs), corrupts register
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@ -45,7 +48,8 @@ ohci_pci_start (struct usb_hcd *hcd)
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&& pdev->device == 0x740c) {
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ohci->flags = OHCI_QUIRK_AMD756;
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ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
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// also somewhat erratum 10 (suspend/resume issues)
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/* also erratum 10 (suspend/resume issues) */
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device_init_wakeup(&hcd->self.root_hub->dev, 0);
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}
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/* FIXME for some of the early AMD 760 southbridges, OHCI
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@ -88,6 +92,13 @@ ohci_pci_start (struct usb_hcd *hcd)
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ohci_dbg (ohci,
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"enabled Compaq ZFMicro chipset quirk\n");
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}
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/* RWC may not be set for add-in PCI cards, since boot
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* firmware probably ignored them. This transfers PCI
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* PM wakeup capabilities (once the PCI layer is fixed).
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*/
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if (device_may_wakeup(&pdev->dev))
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ohci->hc_control |= OHCI_CTRL_RWC;
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}
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/* NOTE: there may have already been a first reset, to
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