kbuild: pass $(MAKECMDGOALS) to sub-make as is
Manipulating $(MAKECMDGOALS) for sub-make seems odd to me. [1] 'make O=foo sub-make' is turned into 'make O=foo', which builds the default targets. It would make sense to terminate the build with: *** No rule to make target 'sub-make'. Stop. [2] 'make O=foo defconfig _all' is turned into 'make O=foo defconfig', which changes the behavior. Let's pass $(MAKECMDGOALS) as is. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Родитель
0209987fc8
Коммит
6b1a9a02c7
2
Makefile
2
Makefile
|
@ -168,7 +168,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all:
|
|||
sub-make:
|
||||
$(Q)$(MAKE) \
|
||||
$(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
|
||||
-f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
|
||||
-f $(CURDIR)/Makefile $(MAKECMDGOALS)
|
||||
|
||||
endif # need-sub-make
|
||||
endif # sub_make_done
|
||||
|
|
Загрузка…
Ссылка в новой задаче