drm/dp: Use AUX constants from specification
The current values seem to be defined in a format that's specific to the i915, gma500 and radeon drivers. To make this more generally useful, use the values as defined in the specification. While at it, prefix the constants with DP_ for improved namespacing. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Thierry Reding
Dave Airlie
Родитель
05f51722a1
Коммит
6b27f7f0e9
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@ -483,7 +483,7 @@ cdv_intel_dp_aux_native_write(struct gma_encoder *encoder,
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if (send_bytes > 16)
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return -1;
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msg[0] = AUX_NATIVE_WRITE << 4;
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msg[0] = DP_AUX_NATIVE_WRITE << 4;
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msg[1] = address >> 8;
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msg[2] = address & 0xff;
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msg[3] = send_bytes - 1;
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@ -493,9 +493,10 @@ cdv_intel_dp_aux_native_write(struct gma_encoder *encoder,
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ret = cdv_intel_dp_aux_ch(encoder, msg, msg_bytes, &ack, 1);
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if (ret < 0)
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return ret;
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if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
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ack >>= 4;
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if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK)
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break;
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else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(100);
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else
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return -EIO;
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@ -523,7 +524,7 @@ cdv_intel_dp_aux_native_read(struct gma_encoder *encoder,
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uint8_t ack;
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int ret;
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msg[0] = AUX_NATIVE_READ << 4;
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msg[0] = DP_AUX_NATIVE_READ << 4;
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msg[1] = address >> 8;
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msg[2] = address & 0xff;
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msg[3] = recv_bytes - 1;
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@ -538,12 +539,12 @@ cdv_intel_dp_aux_native_read(struct gma_encoder *encoder,
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return -EPROTO;
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if (ret < 0)
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return ret;
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ack = reply[0];
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if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) {
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ack = reply[0] >> 4;
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if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK) {
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memcpy(recv, reply + 1, ret - 1);
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return ret - 1;
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}
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else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(100);
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else
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return -EIO;
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@ -569,12 +570,12 @@ cdv_intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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/* Set up the command byte */
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if (mode & MODE_I2C_READ)
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msg[0] = AUX_I2C_READ << 4;
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msg[0] = DP_AUX_I2C_READ << 4;
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else
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msg[0] = AUX_I2C_WRITE << 4;
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msg[0] = DP_AUX_I2C_WRITE << 4;
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if (!(mode & MODE_I2C_STOP))
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msg[0] |= AUX_I2C_MOT << 4;
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msg[0] |= DP_AUX_I2C_MOT << 4;
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msg[1] = address >> 8;
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msg[2] = address;
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@ -606,16 +607,16 @@ cdv_intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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return ret;
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}
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switch (reply[0] & AUX_NATIVE_REPLY_MASK) {
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case AUX_NATIVE_REPLY_ACK:
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switch ((reply[0] >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
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case DP_AUX_NATIVE_REPLY_ACK:
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/* I2C-over-AUX Reply field is only valid
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* when paired with AUX ACK.
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*/
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break;
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case AUX_NATIVE_REPLY_NACK:
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case DP_AUX_NATIVE_REPLY_NACK:
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DRM_DEBUG_KMS("aux_ch native nack\n");
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return -EREMOTEIO;
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case AUX_NATIVE_REPLY_DEFER:
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case DP_AUX_NATIVE_REPLY_DEFER:
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udelay(100);
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continue;
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default:
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@ -624,16 +625,16 @@ cdv_intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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return -EREMOTEIO;
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}
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switch (reply[0] & AUX_I2C_REPLY_MASK) {
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case AUX_I2C_REPLY_ACK:
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switch ((reply[0] >> 4) & DP_AUX_I2C_REPLY_MASK) {
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case DP_AUX_I2C_REPLY_ACK:
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if (mode == MODE_I2C_READ) {
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*read_byte = reply[1];
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}
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return reply_bytes - 1;
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case AUX_I2C_REPLY_NACK:
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case DP_AUX_I2C_REPLY_NACK:
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DRM_DEBUG_KMS("aux_i2c nack\n");
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return -EREMOTEIO;
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case AUX_I2C_REPLY_DEFER:
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case DP_AUX_I2C_REPLY_DEFER:
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DRM_DEBUG_KMS("aux_i2c defer\n");
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udelay(100);
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break;
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@ -542,7 +542,7 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
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return -E2BIG;
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intel_dp_check_edp(intel_dp);
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msg[0] = AUX_NATIVE_WRITE << 4;
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msg[0] = DP_AUX_NATIVE_WRITE << 4;
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msg[1] = address >> 8;
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msg[2] = address & 0xff;
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msg[3] = send_bytes - 1;
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@ -552,9 +552,10 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
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ret = intel_dp_aux_ch(intel_dp, msg, msg_bytes, &ack, 1);
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if (ret < 0)
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return ret;
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if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
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ack >>= 4;
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if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK)
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break;
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else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(100);
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else
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return -EIO;
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@ -586,7 +587,7 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
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return -E2BIG;
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intel_dp_check_edp(intel_dp);
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msg[0] = AUX_NATIVE_READ << 4;
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msg[0] = DP_AUX_NATIVE_READ << 4;
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msg[1] = address >> 8;
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msg[2] = address & 0xff;
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msg[3] = recv_bytes - 1;
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@ -601,12 +602,12 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
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return -EPROTO;
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if (ret < 0)
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return ret;
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ack = reply[0];
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if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) {
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ack = reply[0] >> 4;
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if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK) {
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memcpy(recv, reply + 1, ret - 1);
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return ret - 1;
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}
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else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(100);
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else
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return -EIO;
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@ -633,12 +634,12 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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intel_dp_check_edp(intel_dp);
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/* Set up the command byte */
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if (mode & MODE_I2C_READ)
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msg[0] = AUX_I2C_READ << 4;
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msg[0] = DP_AUX_I2C_READ << 4;
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else
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msg[0] = AUX_I2C_WRITE << 4;
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msg[0] = DP_AUX_I2C_WRITE << 4;
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if (!(mode & MODE_I2C_STOP))
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msg[0] |= AUX_I2C_MOT << 4;
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msg[0] |= DP_AUX_I2C_MOT << 4;
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msg[1] = address >> 8;
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msg[2] = address;
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@ -675,17 +676,17 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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goto out;
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}
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switch (reply[0] & AUX_NATIVE_REPLY_MASK) {
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case AUX_NATIVE_REPLY_ACK:
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switch ((reply[0] >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
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case DP_AUX_NATIVE_REPLY_ACK:
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/* I2C-over-AUX Reply field is only valid
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* when paired with AUX ACK.
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*/
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break;
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case AUX_NATIVE_REPLY_NACK:
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case DP_AUX_NATIVE_REPLY_NACK:
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DRM_DEBUG_KMS("aux_ch native nack\n");
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ret = -EREMOTEIO;
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goto out;
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case AUX_NATIVE_REPLY_DEFER:
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case DP_AUX_NATIVE_REPLY_DEFER:
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/*
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* For now, just give more slack to branch devices. We
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* could check the DPCD for I2C bit rate capabilities,
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@ -706,18 +707,18 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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goto out;
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}
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switch (reply[0] & AUX_I2C_REPLY_MASK) {
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case AUX_I2C_REPLY_ACK:
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switch ((reply[0] >> 4) & DP_AUX_I2C_REPLY_MASK) {
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case DP_AUX_I2C_REPLY_ACK:
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if (mode == MODE_I2C_READ) {
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*read_byte = reply[1];
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}
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ret = reply_bytes - 1;
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goto out;
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case AUX_I2C_REPLY_NACK:
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case DP_AUX_I2C_REPLY_NACK:
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DRM_DEBUG_KMS("aux_i2c nack\n");
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ret = -EREMOTEIO;
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goto out;
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case AUX_I2C_REPLY_DEFER:
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case DP_AUX_I2C_REPLY_DEFER:
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DRM_DEBUG_KMS("aux_i2c defer\n");
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udelay(100);
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break;
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@ -157,7 +157,7 @@ static int radeon_dp_aux_native_write(struct radeon_connector *radeon_connector,
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msg[0] = address;
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msg[1] = address >> 8;
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msg[2] = AUX_NATIVE_WRITE << 4;
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msg[2] = DP_AUX_NATIVE_WRITE << 4;
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msg[3] = (msg_bytes << 4) | (send_bytes - 1);
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memcpy(&msg[4], send, send_bytes);
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@ -168,9 +168,10 @@ static int radeon_dp_aux_native_write(struct radeon_connector *radeon_connector,
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continue;
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else if (ret < 0)
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return ret;
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if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
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ack >>= 4;
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if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK)
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return send_bytes;
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else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(400);
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else
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return -EIO;
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@ -191,7 +192,7 @@ static int radeon_dp_aux_native_read(struct radeon_connector *radeon_connector,
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msg[0] = address;
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msg[1] = address >> 8;
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msg[2] = AUX_NATIVE_READ << 4;
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msg[2] = DP_AUX_NATIVE_READ << 4;
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msg[3] = (msg_bytes << 4) | (recv_bytes - 1);
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for (retry = 0; retry < 4; retry++) {
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@ -201,9 +202,10 @@ static int radeon_dp_aux_native_read(struct radeon_connector *radeon_connector,
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continue;
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else if (ret < 0)
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return ret;
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if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
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ack >>= 4;
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if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK)
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return ret;
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else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(400);
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else if (ret == 0)
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return -EPROTO;
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@ -246,12 +248,12 @@ int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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/* Set up the command byte */
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if (mode & MODE_I2C_READ)
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msg[2] = AUX_I2C_READ << 4;
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msg[2] = DP_AUX_I2C_READ << 4;
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else
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msg[2] = AUX_I2C_WRITE << 4;
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msg[2] = DP_AUX_I2C_WRITE << 4;
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if (!(mode & MODE_I2C_STOP))
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msg[2] |= AUX_I2C_MOT << 4;
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msg[2] |= DP_AUX_I2C_MOT << 4;
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msg[0] = address;
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msg[1] = address >> 8;
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@ -282,16 +284,16 @@ int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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return ret;
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}
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switch (ack & AUX_NATIVE_REPLY_MASK) {
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case AUX_NATIVE_REPLY_ACK:
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switch ((ack >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
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case DP_AUX_NATIVE_REPLY_ACK:
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/* I2C-over-AUX Reply field is only valid
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* when paired with AUX ACK.
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*/
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break;
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case AUX_NATIVE_REPLY_NACK:
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case DP_AUX_NATIVE_REPLY_NACK:
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DRM_DEBUG_KMS("aux_ch native nack\n");
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return -EREMOTEIO;
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case AUX_NATIVE_REPLY_DEFER:
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case DP_AUX_NATIVE_REPLY_DEFER:
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DRM_DEBUG_KMS("aux_ch native defer\n");
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udelay(400);
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continue;
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@ -300,15 +302,15 @@ int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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return -EREMOTEIO;
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}
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switch (ack & AUX_I2C_REPLY_MASK) {
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case AUX_I2C_REPLY_ACK:
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switch ((ack >> 4) & DP_AUX_I2C_REPLY_MASK) {
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case DP_AUX_I2C_REPLY_ACK:
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if (mode == MODE_I2C_READ)
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*read_byte = reply[0];
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return ret;
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case AUX_I2C_REPLY_NACK:
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case DP_AUX_I2C_REPLY_NACK:
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DRM_DEBUG_KMS("aux_i2c nack\n");
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return -EREMOTEIO;
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case AUX_I2C_REPLY_DEFER:
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case DP_AUX_I2C_REPLY_DEFER:
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DRM_DEBUG_KMS("aux_i2c defer\n");
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udelay(400);
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break;
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@ -41,22 +41,22 @@
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* 1.2 formally includes both eDP and DPI definitions.
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*/
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#define AUX_NATIVE_WRITE 0x8
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#define AUX_NATIVE_READ 0x9
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#define AUX_I2C_WRITE 0x0
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#define AUX_I2C_READ 0x1
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#define AUX_I2C_STATUS 0x2
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#define AUX_I2C_MOT 0x4
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#define DP_AUX_I2C_WRITE 0x0
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#define DP_AUX_I2C_READ 0x1
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#define DP_AUX_I2C_STATUS 0x2
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#define DP_AUX_I2C_MOT 0x4
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#define DP_AUX_NATIVE_WRITE 0x8
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#define DP_AUX_NATIVE_READ 0x9
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#define AUX_NATIVE_REPLY_ACK (0x0 << 4)
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#define AUX_NATIVE_REPLY_NACK (0x1 << 4)
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#define AUX_NATIVE_REPLY_DEFER (0x2 << 4)
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#define AUX_NATIVE_REPLY_MASK (0x3 << 4)
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#define DP_AUX_NATIVE_REPLY_ACK (0x0 << 0)
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#define DP_AUX_NATIVE_REPLY_NACK (0x1 << 0)
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#define DP_AUX_NATIVE_REPLY_DEFER (0x2 << 0)
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#define DP_AUX_NATIVE_REPLY_MASK (0x3 << 0)
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#define AUX_I2C_REPLY_ACK (0x0 << 6)
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#define AUX_I2C_REPLY_NACK (0x1 << 6)
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#define AUX_I2C_REPLY_DEFER (0x2 << 6)
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#define AUX_I2C_REPLY_MASK (0x3 << 6)
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#define DP_AUX_I2C_REPLY_ACK (0x0 << 2)
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#define DP_AUX_I2C_REPLY_NACK (0x1 << 2)
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#define DP_AUX_I2C_REPLY_DEFER (0x2 << 2)
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#define DP_AUX_I2C_REPLY_MASK (0x3 << 2)
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/* AUX CH addresses */
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/* DPCD */
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