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Second set of new device support, cleanups etc for IIO/Counters in the 5.9 cycle 

There are two merge commits in here of immutable branches that may
 also be picked up through other trees (clocksource and input)
 
 I've put a few late breaking fixes in here that aren't worth rushing
 in before the  merge window.  One major fix for an issue introduced
 in the last set that can result in devices not having their parent set.
 
 This set is dominated by W=1 cleanups from Lee Jones. I won't list them
 all separately.  They are mostly:
 * Kernel doc fixes
 * Unused variable removal.
 * Suppression of unused stuff that is static in headers.
 
 Counters subsystem
 * atmel-tcb
   - New counter driver after various cleanups of existing tcb code and bindings.
 
 Device support
 * stk311
   - Trivial addition of ID for STK311-X variant.
 
 yaml conversions
 * kionix,kxsd9
 * ti,ads8688
 
 Features
 * jz47xx
   - Add support for touch screen channels. In this particular case the
     boards in question actually wire a joystick to them so we want them
     as simple voltage channels. The joystick driver will probably go
     via the input tree.
 
 Cleanups + fixes
 * core
   - A rebase issue in recent major refactoring dropped the assignment of
     of the device parent in the core. Put it back.
 * ad5592r
   - Fix unbalanced mutex unlocks in *_read_raw()
 * ad7124
   - Move chip ID and name to the chip_info table plus add a read of the
     revision register to check the device is working during probe.
 * ad7192
   - Ridy up ordering to put the match table near the end fo the file where it
     is used.
 * lsm6dsx
   - Reset the hardware timestamp after a resume to avoid an issue with
     missaligned timestamps after suspend.
 * jz47xx
   - Error checks on clk_enable() calls.
   - xlate callaback to find channel index.
   - Use separate chan_spec arrays for different variants rather than
     parts of a single list.  Simplifies code.
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Merge tag 'iio-for-5.9b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

Second set of new device support, cleanups etc for IIO/Counters in the 5.9 cycle

There are two merge commits in here of immutable branches that may
also be picked up through other trees (clocksource and input)

I've put a few late breaking fixes in here that aren't worth rushing
in before the  merge window.  One major fix for an issue introduced
in the last set that can result in devices not having their parent set.

This set is dominated by W=1 cleanups from Lee Jones. I won't list them
all separately.  They are mostly:
* Kernel doc fixes
* Unused variable removal.
* Suppression of unused stuff that is static in headers.

Counters subsystem
* atmel-tcb
  - New counter driver after various cleanups of existing tcb code and bindings.

Device support
* stk311
  - Trivial addition of ID for STK311-X variant.

yaml conversions
* kionix,kxsd9
* ti,ads8688

Features
* jz47xx
  - Add support for touch screen channels. In this particular case the
    boards in question actually wire a joystick to them so we want them
    as simple voltage channels. The joystick driver will probably go
    via the input tree.

Cleanups + fixes
* core
  - A rebase issue in recent major refactoring dropped the assignment of
    of the device parent in the core. Put it back.
* ad5592r
  - Fix unbalanced mutex unlocks in *_read_raw()
* ad7124
  - Move chip ID and name to the chip_info table plus add a read of the
    revision register to check the device is working during probe.
* ad7192
  - Ridy up ordering to put the match table near the end fo the file where it
    is used.
* lsm6dsx
  - Reset the hardware timestamp after a resume to avoid an issue with
    missaligned timestamps after suspend.
* jz47xx
  - Error checks on clk_enable() calls.
  - xlate callaback to find channel index.
  - Use separate chan_spec arrays for different variants rather than
    parts of a single list.  Simplifies code.

* tag 'iio-for-5.9b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (69 commits)
  iio: imu: st_lsm6dsx: reset hw ts after resume
  iio: dac: ad5592r: fix unbalanced mutex unlocks in ad5592r_read_raw()
  iio: core: fix/re-introduce back parent assignment
  iio: adc: ad7124: move chip ID & name on the chip_info table
  counter: Add microchip TCB capture counter
  dt-bindings: counter: microchip-tcb-capture counter
  dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible
  dt-bindings: atmel-tcb: convert bindings to json-schema
  ARM: at91: add atmel tcb capabilities
  IIO: Ingenic JZ47xx: Add touchscreen mode.
  dt-bindings: iio/adc: Add touchscreen idx for JZ47xx SoC ADC
  iio/adc: ingenic: Retrieve channels list from soc data struct
  IIO: Ingenic JZ47xx: Add xlate cb to retrieve correct channel idx
  IIO: Ingenic JZ47xx: Error check clk_enable calls.
  dt-bindings: iio: ti,ads8688 yaml conversion
  iio: light: stk3310: add chip id for STK3311-X variant
  dt-bindings: iio: accel: kionix,kxsd9 yaml conversion.
  iio: adc: ad7192: move ad7192_of_match table closer to the end of the file
  iio: adc: rockchip_saradc: Demote seemingly unintentional kerneldoc header
  iio: imu: st_lsm6dsx: st_lsm6dsx: Mark 'st_lsm6dsx_accel_ext_info' as __maybe_unused
  ...
This commit is contained in:
Greg Kroah-Hartman 2020-07-22 16:26:14 +02:00
Родитель 70476feb62 a1bab9396c
Коммит 6c1649f51c
69 изменённых файлов: 1354 добавлений и 372 удалений
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22
Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.txt
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@ -1,22 +0,0 @@
Kionix KXSD9 Accelerometer device tree bindings
Required properties:
- compatible: should be set to "kionix,kxsd9"
- reg: i2c slave address
Optional properties:
- vdd-supply: The input supply for VDD
- iovdd-supply: The input supply for IOVDD
- interrupts: The movement detection interrupt
- mount-matrix: See mount-matrix.txt
Example:
kxsd9@18 {
compatible = "kionix,kxsd9";
reg = <0x18>;
interrupt-parent = <&foo>;
interrupts = <57 IRQ_TYPE_EDGE_FALLING>;
iovdd-supply = <&bar>;
vdd-supply = <&baz>;
};

65
Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml Normal file
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@ -0,0 +1,65 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/accel/kionix,kxsd9.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Kionix KXSD9 Accelerometer
maintainers:
- Jonathan Cameron <jic23@kernel.org>
description: |
3 axis 12 bit accelerometer with +-8G range on all axes. Also has a
12 bit auxiliary ADC channel. Interface is either SPI or I2C.
properties:
compatible:
const: kionix,kxsd9
reg:
maxItems: 1
vdd-supply: true
iovdd-supply: true
interrupts:
maxItems: 1
mount-matrix:
description: an optional 3x3 mounting rotation matrix.
required:
- compatible
- reg
examples:
- |
# include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
accel@18 {
compatible = "kionix,kxsd9";
reg = <0x18>;
iovdd-supply = <&iovdd>;
vdd-supply = <&vdd>;
interrupts = <57 IRQ_TYPE_EDGE_FALLING>;
mount-matrix = "-0.984807753012208", "0", "-0.173648177666930",
"0", "-1", "0",
"-0.173648177666930", "0", "0.984807753012208";
};
};
- |
# include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
accel@0 {
compatible = "kionix,kxsd9";
reg = <0>;
spi-max-frequency = <10000000>;
};
};
...

45
Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml Normal file
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@ -0,0 +1,45 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,ads8688.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments' ADS8684 and ADS8688 ADC chip
maintainers:
- Sean Nyekjaer <sean@geanix.com>
description: |
SPI 16bit ADCs with 4/8 channels.
properties:
compatible:
enum:
- ti,ads8684
- ti,ads8688
reg:
maxItems: 1
vref-supply:
description: Optional external reference. If not supplied, assume
REFSEL input tied low to enable the internal reference.
required:
- compatible
- reg
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "ti,ads8688";
reg = <0>;
vref-supply = <&vdd_supply>;
spi-max-frequency = <1000000>;
};
};
...

20
Documentation/devicetree/bindings/iio/adc/ti-ads8688.txt
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@ -1,20 +0,0 @@
* Texas Instruments' ADS8684 and ADS8688 ADC chip
Required properties:
- compatible: Should be "ti,ads8684" or "ti,ads8688"
- reg: spi chip select number for the device
Recommended properties:
- spi-max-frequency: Definition as per
Documentation/devicetree/bindings/spi/spi-bus.txt
Optional properties:
- vref-supply: The regulator supply for ADC reference voltage
Example:
adc@0 {
compatible = "ti,ads8688";
reg = <0>;
vref-supply = <&vdd_supply>;
spi-max-frequency = <1000000>;
};

56
Documentation/devicetree/bindings/mfd/atmel-tcb.txt
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@ -1,56 +0,0 @@
* Device tree bindings for Atmel Timer Counter Blocks
- compatible: Should be "atmel,<chip>-tcb", "simple-mfd", "syscon".
<chip> can be "at91rm9200" or "at91sam9x5"
- reg: Should contain registers location and length
- #address-cells: has to be 1
- #size-cells: has to be 0
- interrupts: Should contain all interrupts for the TC block
Note that you can specify several interrupt cells if the TC
block has one interrupt per channel.
- clock-names: tuple listing input clock names.
Required elements: "t0_clk", "slow_clk"
Optional elements: "t1_clk", "t2_clk"
- clocks: phandles to input clocks.
The TCB can expose multiple subdevices:
* a timer
- compatible: Should be "atmel,tcb-timer"
- reg: Should contain the TCB channels to be used. If the
counter width is 16 bits (at91rm9200-tcb), two consecutive
channels are needed. Else, only one channel will be used.
Examples:
One interrupt per TC block:
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfff7c000 0x100>;
interrupts = <18 4>;
clocks = <&tcb0_clk>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>, <1>;
};
timer@2 {
compatible = "atmel,tcb-timer";
reg = <2>;
};
};
One interrupt per TC channel in a TC block:
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffdc000 0x100>;
interrupts = <26 4>, <27 4>, <28 4>;
clocks = <&tcb1_clk>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};

181
Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml Normal file
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@ -0,0 +1,181 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Atmel Timer Counter Block
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>
description: |
The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
timer has three channels with two counters each.
properties:
compatible:
items:
- enum:
- atmel,at91rm9200-tcb
- atmel,at91sam9x5-tcb
- atmel,sama5d2-tcb
- const: simple-mfd
- const: syscon
reg:
maxItems: 1
interrupts:
description:
List of interrupts. One interrupt per TCB channel if available or one
interrupt for the TC block
minItems: 1
maxItems: 3
clock-names:
description:
List of clock names. Always includes t0_clk and slow clk. Also includes
t1_clk and t2_clk if a clock per channel is available.
minItems: 2
maxItems: 4
clocks:
minItems: 2
maxItems: 4
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"^timer@[0-2]$":
description: The timer block channels that are used as timers or counters.
type: object
properties:
compatible:
items:
- enum:
- atmel,tcb-timer
- microchip,tcb-capture
reg:
description:
List of channels to use for this particular timer. In Microchip TCB capture
mode channels are registered as a counter devices, for the qdec mode TCB0's
channel <0> and <1> are required.
minItems: 1
maxItems: 3
required:
- compatible
- reg
allOf:
- if:
properties:
compatible:
contains:
const: atmel,sama5d2-tcb
then:
properties:
clocks:
minItems: 3
maxItems: 3
clock-names:
items:
- const: t0_clk
- const: gclk
- const: slow_clk
else:
properties:
clocks:
minItems: 2
maxItems: 4
clock-names:
oneOf:
- items:
- const: t0_clk
- const: slow_clk
- items:
- const: t0_clk
- const: t1_clk
- const: t2_clk
- const: slow_clk
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- '#address-cells'
- '#size-cells'
additionalProperties: false
examples:
- |
/* One interrupt per TC block: */
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfff7c000 0x100>;
interrupts = <18 4>;
clocks = <&tcb0_clk>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>, <1>;
};
timer@2 {
compatible = "atmel,tcb-timer";
reg = <2>;
};
};
/* One interrupt per TC channel in a TC block: */
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffdc000 0x100>;
interrupts = <26 4>, <27 4>, <28 4>;
clocks = <&tcb1_clk>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
/* TCB0 Capture with QDEC: */
timer@f800c000 {
compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfff7c000 0x100>;
interrupts = <18 4>;
clocks = <&tcb0_clk>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
timer@0 {
compatible = "microchip,tcb-capture";
reg = <0>, <1>;
};
timer@2 {
compatible = "atmel,tcb-timer";
reg = <2>;
};
};

11
drivers/counter/Kconfig
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@ -70,4 +70,15 @@ config FTM_QUADDEC
To compile this driver as a module, choose M here: the
module will be called ftm-quaddec.
config MICROCHIP_TCB_CAPTURE
tristate "Microchip Timer Counter Capture driver"
depends on HAS_IOMEM && OF
select REGMAP_MMIO
help
Select this option to enable the Microchip Timer Counter Block
capture driver.
To compile this driver as a module, choose M here: the
module will be called microchip-tcb-capture.
endif # COUNTER

1
drivers/counter/Makefile
Просмотреть файл

@ -10,3 +10,4 @@ obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
obj-$(CONFIG_TI_EQEP) += ti-eqep.o
obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o
obj-$(CONFIG_MICROCHIP_TCB_CAPTURE) += microchip-tcb-capture.o

397
drivers/counter/microchip-tcb-capture.c Normal file
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@ -0,0 +1,397 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
* Copyright (C) 2020 Microchip
*
* Author: Kamel Bouhara <kamel.bouhara@bootlin.com>
*/
#include <linux/clk.h>
#include <linux/counter.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <soc/at91/atmel_tcb.h>
#define ATMEL_TC_CMR_MASK (ATMEL_TC_LDRA_RISING | ATMEL_TC_LDRB_FALLING | \
ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_LDBDIS | \
ATMEL_TC_LDBSTOP)
#define ATMEL_TC_QDEN BIT(8)
#define ATMEL_TC_POSEN BIT(9)
struct mchp_tc_data {
const struct atmel_tcb_config *tc_cfg;
struct counter_device counter;
struct regmap *regmap;
int qdec_mode;
int num_channels;
int channel[2];
bool trig_inverted;
};
enum mchp_tc_count_function {
MCHP_TC_FUNCTION_INCREASE,
MCHP_TC_FUNCTION_QUADRATURE,
};
static enum counter_count_function mchp_tc_count_functions[] = {
[MCHP_TC_FUNCTION_INCREASE] = COUNTER_COUNT_FUNCTION_INCREASE,
[MCHP_TC_FUNCTION_QUADRATURE] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4,
};
enum mchp_tc_synapse_action {
MCHP_TC_SYNAPSE_ACTION_NONE = 0,
MCHP_TC_SYNAPSE_ACTION_RISING_EDGE,
MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE,
MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE
};
static enum counter_synapse_action mchp_tc_synapse_actions[] = {
[MCHP_TC_SYNAPSE_ACTION_NONE] = COUNTER_SYNAPSE_ACTION_NONE,
[MCHP_TC_SYNAPSE_ACTION_RISING_EDGE] = COUNTER_SYNAPSE_ACTION_RISING_EDGE,
[MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE] = COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
[MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE] = COUNTER_SYNAPSE_ACTION_BOTH_EDGES,
};
static struct counter_signal mchp_tc_count_signals[] = {
{
.id = 0,
.name = "Channel A",
},
{
.id = 1,
.name = "Channel B",
}
};
static struct counter_synapse mchp_tc_count_synapses[] = {
{
.actions_list = mchp_tc_synapse_actions,
.num_actions = ARRAY_SIZE(mchp_tc_synapse_actions),
.signal = &mchp_tc_count_signals[0]
},
{
.actions_list = mchp_tc_synapse_actions,
.num_actions = ARRAY_SIZE(mchp_tc_synapse_actions),
.signal = &mchp_tc_count_signals[1]
}
};
static int mchp_tc_count_function_get(struct counter_device *counter,
struct counter_count *count,
size_t *function)
{
struct mchp_tc_data *const priv = counter->priv;
if (priv->qdec_mode)
*function = MCHP_TC_FUNCTION_QUADRATURE;
else
*function = MCHP_TC_FUNCTION_INCREASE;
return 0;
}
static int mchp_tc_count_function_set(struct counter_device *counter,
struct counter_count *count,
size_t function)
{
struct mchp_tc_data *const priv = counter->priv;
u32 bmr, cmr;
regmap_read(priv->regmap, ATMEL_TC_BMR, &bmr);
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
/* Set capture mode */
cmr &= ~ATMEL_TC_WAVE;
switch (function) {
case MCHP_TC_FUNCTION_INCREASE:
priv->qdec_mode = 0;
/* Set highest rate based on whether soc has gclk or not */
bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN);
if (priv->tc_cfg->has_gclk)
cmr |= ATMEL_TC_TIMER_CLOCK2;
else
cmr |= ATMEL_TC_TIMER_CLOCK1;
/* Setup the period capture mode */
cmr |= ATMEL_TC_CMR_MASK;
cmr &= ~(ATMEL_TC_ABETRG | ATMEL_TC_XC0);
break;
case MCHP_TC_FUNCTION_QUADRATURE:
if (!priv->tc_cfg->has_qdec)
return -EINVAL;
/* In QDEC mode settings both channels 0 and 1 are required */
if (priv->num_channels < 2 || priv->channel[0] != 0 ||
priv->channel[1] != 1) {
pr_err("Invalid channels number or id for quadrature mode\n");
return -EINVAL;
}
priv->qdec_mode = 1;
bmr |= ATMEL_TC_QDEN | ATMEL_TC_POSEN;
cmr |= ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_ABETRG | ATMEL_TC_XC0;
break;
}
regmap_write(priv->regmap, ATMEL_TC_BMR, bmr);
regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), cmr);
/* Enable clock and trigger counter */
regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CCR),
ATMEL_TC_CLKEN | ATMEL_TC_SWTRG);
if (priv->qdec_mode) {
regmap_write(priv->regmap,
ATMEL_TC_REG(priv->channel[1], CMR), cmr);
regmap_write(priv->regmap,
ATMEL_TC_REG(priv->channel[1], CCR),
ATMEL_TC_CLKEN | ATMEL_TC_SWTRG);
}
return 0;
}
static int mchp_tc_count_signal_read(struct counter_device *counter,
struct counter_signal *signal,
enum counter_signal_value *val)
{
struct mchp_tc_data *const priv = counter->priv;
bool sigstatus;
u32 sr;
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);
if (priv->trig_inverted)
sigstatus = (sr & ATMEL_TC_MTIOB);
else
sigstatus = (sr & ATMEL_TC_MTIOA);
*val = sigstatus ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW;
return 0;
}
static int mchp_tc_count_action_get(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
size_t *action)
{
struct mchp_tc_data *const priv = counter->priv;
u32 cmr;
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
*action = MCHP_TC_SYNAPSE_ACTION_NONE;
if (cmr & ATMEL_TC_ETRGEDG_NONE)
*action = MCHP_TC_SYNAPSE_ACTION_NONE;
else if (cmr & ATMEL_TC_ETRGEDG_RISING)
*action = MCHP_TC_SYNAPSE_ACTION_RISING_EDGE;
else if (cmr & ATMEL_TC_ETRGEDG_FALLING)
*action = MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE;
else if (cmr & ATMEL_TC_ETRGEDG_BOTH)
*action = MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE;
return 0;
}
static int mchp_tc_count_action_set(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
size_t action)
{
struct mchp_tc_data *const priv = counter->priv;
u32 edge = ATMEL_TC_ETRGEDG_NONE;
/* QDEC mode is rising edge only */
if (priv->qdec_mode)
return -EINVAL;
switch (action) {
case MCHP_TC_SYNAPSE_ACTION_NONE:
edge = ATMEL_TC_ETRGEDG_NONE;
break;
case MCHP_TC_SYNAPSE_ACTION_RISING_EDGE:
edge = ATMEL_TC_ETRGEDG_RISING;
break;
case MCHP_TC_SYNAPSE_ACTION_FALLING_EDGE:
edge = ATMEL_TC_ETRGEDG_FALLING;
break;
case MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE:
edge = ATMEL_TC_ETRGEDG_BOTH;
break;
}
return regmap_write_bits(priv->regmap,
ATMEL_TC_REG(priv->channel[0], CMR),
ATMEL_TC_ETRGEDG, edge);
}
static int mchp_tc_count_read(struct counter_device *counter,
struct counter_count *count,
unsigned long *val)
{
struct mchp_tc_data *const priv = counter->priv;
u32 cnt;
regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CV), &cnt);
*val = cnt;
return 0;
}
static struct counter_count mchp_tc_counts[] = {
{
.id = 0,
.name = "Timer Counter",
.functions_list = mchp_tc_count_functions,
.num_functions = ARRAY_SIZE(mchp_tc_count_functions),
.synapses = mchp_tc_count_synapses,
.num_synapses = ARRAY_SIZE(mchp_tc_count_synapses),
},
};
static struct counter_ops mchp_tc_ops = {
.signal_read = mchp_tc_count_signal_read,
.count_read = mchp_tc_count_read,
.function_get = mchp_tc_count_function_get,
.function_set = mchp_tc_count_function_set,
.action_get = mchp_tc_count_action_get,
.action_set = mchp_tc_count_action_set
};
static const struct atmel_tcb_config tcb_rm9200_config = {
.counter_width = 16,
};
static const struct atmel_tcb_config tcb_sam9x5_config = {
.counter_width = 32,
};
static const struct atmel_tcb_config tcb_sama5d2_config = {
.counter_width = 32,
.has_gclk = true,
.has_qdec = true,
};
static const struct atmel_tcb_config tcb_sama5d3_config = {
.counter_width = 32,
.has_qdec = true,
};
static const struct of_device_id atmel_tc_of_match[] = {
{ .compatible = "atmel,at91rm9200-tcb", .data = &tcb_rm9200_config, },
{ .compatible = "atmel,at91sam9x5-tcb", .data = &tcb_sam9x5_config, },
{ .compatible = "atmel,sama5d2-tcb", .data = &tcb_sama5d2_config, },
{ .compatible = "atmel,sama5d3-tcb", .data = &tcb_sama5d3_config, },
{ /* sentinel */ }
};
static void mchp_tc_clk_remove(void *ptr)
{
clk_disable_unprepare((struct clk *)ptr);
}
static int mchp_tc_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
const struct atmel_tcb_config *tcb_config;
const struct of_device_id *match;
struct mchp_tc_data *priv;
char clk_name[7];
struct regmap *regmap;
struct clk *clk[3];
int channel;
int ret, i;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
platform_set_drvdata(pdev, priv);
match = of_match_node(atmel_tc_of_match, np->parent);
tcb_config = match->data;
if (!tcb_config) {
dev_err(&pdev->dev, "No matching parent node found\n");
return -ENODEV;
}
regmap = syscon_node_to_regmap(np->parent);
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);
/* max. channels number is 2 when in QDEC mode */
priv->num_channels = of_property_count_u32_elems(np, "reg");
if (priv->num_channels < 0) {
dev_err(&pdev->dev, "Invalid or missing channel\n");
return -EINVAL;
}
/* Register channels and initialize clocks */
for (i = 0; i < priv->num_channels; i++) {
ret = of_property_read_u32_index(np, "reg", i, &channel);
if (ret < 0 || channel > 2)
return -ENODEV;
priv->channel[i] = channel;
snprintf(clk_name, sizeof(clk_name), "t%d_clk", channel);
clk[i] = of_clk_get_by_name(np->parent, clk_name);
if (IS_ERR(clk[i])) {
/* Fallback to t0_clk */
clk[i] = of_clk_get_by_name(np->parent, "t0_clk");
if (IS_ERR(clk[i]))
return PTR_ERR(clk[i]);
}
ret = clk_prepare_enable(clk[i]);
if (ret)
return ret;
ret = devm_add_action_or_reset(&pdev->dev,
mchp_tc_clk_remove,
clk[i]);
if (ret)
return ret;
dev_dbg(&pdev->dev,
"Initialized capture mode on channel %d\n",
channel);
}
priv->tc_cfg = tcb_config;
priv->regmap = regmap;
priv->counter.name = dev_name(&pdev->dev);
priv->counter.parent = &pdev->dev;
priv->counter.ops = &mchp_tc_ops;
priv->counter.num_counts = ARRAY_SIZE(mchp_tc_counts);
priv->counter.counts = mchp_tc_counts;
priv->counter.num_signals = ARRAY_SIZE(mchp_tc_count_signals);
priv->counter.signals = mchp_tc_count_signals;
priv->counter.priv = priv;
return devm_counter_register(&pdev->dev, &priv->counter);
}
static const struct of_device_id mchp_tc_dt_ids[] = {
{ .compatible = "microchip,tcb-capture", },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, mchp_tc_dt_ids);
static struct platform_driver mchp_tc_driver = {
.probe = mchp_tc_probe,
.driver = {
.name = "microchip-tcb-capture",
.of_match_table = mchp_tc_dt_ids,
},
};
module_platform_driver(mchp_tc_driver);
MODULE_AUTHOR("Kamel Bouhara <kamel.bouhara@bootlin.com>");
MODULE_DESCRIPTION("Microchip TCB Capture driver");
MODULE_LICENSE("GPL v2");

2
drivers/iio/accel/bma220_spi.c
Просмотреть файл

@ -308,12 +308,14 @@ static const struct spi_device_id bma220_spi_id[] = {
{}
};
#ifdef CONFIG_ACPI
static const struct acpi_device_id bma220_acpi_id[] = {
{"BMA0220", 0},
{}
};
MODULE_DEVICE_TABLE(spi, bma220_spi_id);
#endif
static struct spi_driver bma220_driver = {
.driver = {

12
drivers/iio/accel/sca3000.c
Просмотреть файл

@ -186,9 +186,9 @@ struct sca3000_state {
* @option_mode_2_freq: option mode 2 sampling frequency
* @option_mode_2_3db_freq: 3db cutoff frequency of the low pass filter for
* the second option mode.
* @mod_det_mult_xz: Bit wise multipliers to calculate the threshold
* @mot_det_mult_xz: Bit wise multipliers to calculate the threshold
* for motion detection in the x and z axis.
* @mod_det_mult_y: Bit wise multipliers to calculate the threshold
* @mot_det_mult_y: Bit wise multipliers to calculate the threshold
* for motion detection in the y axis.
*
* This structure is used to hold information about the functionality of a given
@ -859,9 +859,9 @@ error_ret:
*/
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq);
/**
/*
* sca3000_read_event_value() - query of a threshold or period
**/
*/
static int sca3000_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
@ -1100,9 +1100,9 @@ done:
return IRQ_HANDLED;
}
/**
/*
* sca3000_read_event_config() what events are enabled
**/
*/
static int sca3000_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,

1
drivers/iio/adc/Kconfig
Просмотреть файл

@ -500,6 +500,7 @@ config INA2XX_ADC
config INGENIC_ADC
tristate "Ingenic JZ47xx SoCs ADC driver"
depends on MIPS || COMPILE_TEST
select IIO_BUFFER
help
Say yes here to build support for the Ingenic JZ47xx SoCs ADC unit.

73
drivers/iio/adc/ad7124.c
Просмотреть файл

@ -12,6 +12,7 @@
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
@ -47,6 +48,15 @@
#define AD7124_ADC_CTRL_MODE_MSK GENMASK(5, 2)
#define AD7124_ADC_CTRL_MODE(x) FIELD_PREP(AD7124_ADC_CTRL_MODE_MSK, x)
/* AD7124 ID */
#define AD7124_DEVICE_ID_MSK GENMASK(7, 4)
#define AD7124_DEVICE_ID_GET(x) FIELD_GET(AD7124_DEVICE_ID_MSK, x)
#define AD7124_SILICON_REV_MSK GENMASK(3, 0)
#define AD7124_SILICON_REV_GET(x) FIELD_GET(AD7124_SILICON_REV_MSK, x)
#define CHIPID_AD7124_4 0x0
#define CHIPID_AD7124_8 0x1
/* AD7124_CHANNEL_X */
#define AD7124_CHANNEL_EN_MSK BIT(15)
#define AD7124_CHANNEL_EN(x) FIELD_PREP(AD7124_CHANNEL_EN_MSK, x)
@ -120,6 +130,8 @@ static const char * const ad7124_ref_names[] = {
};
struct ad7124_chip_info {
const char *name;
unsigned int chip_id;
unsigned int num_inputs;
};
@ -165,9 +177,13 @@ static const struct iio_chan_spec ad7124_channel_template = {
static struct ad7124_chip_info ad7124_chip_info_tbl[] = {
[ID_AD7124_4] = {
.name = "ad7127-4",
.chip_id = CHIPID_AD7124_4,
.num_inputs = 8,
},
[ID_AD7124_8] = {
.name = "ad7127-8",
.chip_id = CHIPID_AD7124_8,
.num_inputs = 16,
},
};
@ -503,6 +519,34 @@ static int ad7124_soft_reset(struct ad7124_state *st)
return -EIO;
}
static int ad7124_check_chip_id(struct ad7124_state *st)
{
unsigned int readval, chip_id, silicon_rev;
int ret;
ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval);
if (ret < 0)
return ret;
chip_id = AD7124_DEVICE_ID_GET(readval);
silicon_rev = AD7124_SILICON_REV_GET(readval);
if (chip_id != st->chip_info->chip_id) {
dev_err(&st->sd.spi->dev,
"Chip ID mismatch: expected %u, got %u\n",
st->chip_info->chip_id, chip_id);
return -ENODEV;
}
if (silicon_rev == 0) {
dev_err(&st->sd.spi->dev,
"Silicon revision empty. Chip may not be present\n");
return -ENODEV;
}
return 0;
}
static int ad7124_init_channel_vref(struct ad7124_state *st,
unsigned int channel_number)
{
@ -665,25 +709,28 @@ static int ad7124_setup(struct ad7124_state *st)
static int ad7124_probe(struct spi_device *spi)
{
const struct spi_device_id *id;
const struct ad7124_chip_info *info;
struct ad7124_state *st;
struct iio_dev *indio_dev;
int i, ret;
info = of_device_get_match_data(&spi->dev);
if (!info)
return -ENODEV;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
id = spi_get_device_id(spi);
st->chip_info = &ad7124_chip_info_tbl[id->driver_data];
st->chip_info = info;
ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info);
spi_set_drvdata(spi, indio_dev);
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->name = st->chip_info->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &ad7124_info;
@ -721,6 +768,10 @@ static int ad7124_probe(struct spi_device *spi)
if (ret < 0)
goto error_clk_disable_unprepare;
ret = ad7124_check_chip_id(st);
if (ret)
goto error_clk_disable_unprepare;
ret = ad7124_setup(st);
if (ret < 0)
goto error_clk_disable_unprepare;
@ -768,16 +819,11 @@ static int ad7124_remove(struct spi_device *spi)
return 0;
}
static const struct spi_device_id ad7124_id_table[] = {
{ "ad7124-4", ID_AD7124_4 },
{ "ad7124-8", ID_AD7124_8 },
{}
};
MODULE_DEVICE_TABLE(spi, ad7124_id_table);
static const struct of_device_id ad7124_of_match[] = {
{ .compatible = "adi,ad7124-4" },
{ .compatible = "adi,ad7124-8" },
{ .compatible = "adi,ad7124-4",
.data = &ad7124_chip_info_tbl[ID_AD7124_4], },
{ .compatible = "adi,ad7124-8",
.data = &ad7124_chip_info_tbl[ID_AD7124_8], },
{ },
};
MODULE_DEVICE_TABLE(of, ad7124_of_match);
@ -789,7 +835,6 @@ static struct spi_driver ad71124_driver = {
},
.probe = ad7124_probe,
.remove = ad7124_remove,
.id_table = ad7124_id_table,
};
module_spi_driver(ad71124_driver);

18
drivers/iio/adc/ad7192.c
Просмотреть файл

@ -908,15 +908,6 @@ static int ad7192_channels_config(struct iio_dev *indio_dev)
return 0;
}
static const struct of_device_id ad7192_of_match[] = {
{ .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] },
{ .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] },
{ .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] },
{ .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] },
{}
};
MODULE_DEVICE_TABLE(of, ad7192_of_match);
static int ad7192_probe(struct spi_device *spi)
{
struct ad7192_state *st;
@ -1049,6 +1040,15 @@ static int ad7192_remove(struct spi_device *spi)
return 0;
}
static const struct of_device_id ad7192_of_match[] = {
{ .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] },
{ .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] },
{ .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] },
{ .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] },
{}
};
MODULE_DEVICE_TABLE(of, ad7192_of_match);
static struct spi_driver ad7192_driver = {
.driver = {
.name = "ad7192",

8
drivers/iio/adc/ad7298.c
Просмотреть файл

@ -98,9 +98,9 @@ static const struct iio_chan_spec ad7298_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(8),
};
/**
/*
* ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
**/
*/
static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *active_scan_mask)
{
@ -144,12 +144,12 @@ static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
return 0;
}
/**
/*
* ad7298_trigger_handler() bh of trigger launched polling to ring buffer
*
* Currently there is no option in this driver to disable the saving of
* timestamps within the ring.
**/
*/
static irqreturn_t ad7298_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;

2
drivers/iio/adc/ad7887.c
Просмотреть файл

@ -109,7 +109,7 @@ static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
return spi_sync(st->spi, &st->msg[AD7887_CH0]);
}
/**
/*
* ad7887_trigger_handler() bh of trigger launched polling to ring buffer
*
* Currently there is no option in this driver to disable the saving of

8
drivers/iio/adc/ad7923.c
Просмотреть файл

@ -151,9 +151,9 @@ static const struct ad7923_chip_info ad7923_chip_info[] = {
},
};
/**
/*
* ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
**/
*/
static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *active_scan_mask)
{
@ -192,12 +192,12 @@ static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
return 0;
}
/**
/*
* ad7923_trigger_handler() bh of trigger launched polling to ring buffer
*
* Currently there is no option in this driver to disable the saving of
* timestamps within the ring.
**/
*/
static irqreturn_t ad7923_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;

2
drivers/iio/adc/ad799x.c
Просмотреть файл

@ -182,7 +182,7 @@ static int ad799x_update_config(struct ad799x_state *st, u16 config)
return 0;
}
/**
/*
* ad799x_trigger_handler() bh of trigger launched polling to ring buffer
*
* Currently there is no option in this driver to disable the saving of

7
drivers/iio/adc/ad_sigma_delta.c
Просмотреть файл

@ -398,7 +398,6 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p)
unsigned int reg_size;
unsigned int data_reg;
uint8_t data[16];
int ret;
memset(data, 0x00, 16);
@ -415,14 +414,12 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p)
case 4:
case 2:
case 1:
ret = ad_sd_read_reg_raw(sigma_delta, data_reg, reg_size,
&data[0]);
ad_sd_read_reg_raw(sigma_delta, data_reg, reg_size, &data[0]);
break;
case 3:
/* We store 24 bit samples in a 32 bit word. Keep the upper
* byte set to zero. */
ret = ad_sd_read_reg_raw(sigma_delta, data_reg, reg_size,
&data[1]);
ad_sd_read_reg_raw(sigma_delta, data_reg, reg_size, &data[1]);
break;
}

4
drivers/iio/adc/at91-sama5d2_adc.c
Просмотреть файл

@ -347,7 +347,7 @@ struct at91_adc_trigger {
};
/**
* at91_adc_dma - at91-sama5d2 dma information struct
* struct at91_adc_dma - at91-sama5d2 dma information struct
* @dma_chan: the dma channel acquired
* @rx_buf: dma coherent allocated area
* @rx_dma_buf: dma handler for the buffer
@ -369,7 +369,7 @@ struct at91_adc_dma {
};
/**
* at91_adc_touch - at91-sama5d2 touchscreen information struct
* struct at91_adc_touch - at91-sama5d2 touchscreen information struct
* @sample_period_val: the value for periodic trigger interval
* @touching: is the pen touching the screen or not
* @x_pos: temporary placeholder for pressure computation

2
drivers/iio/adc/at91_adc.c
Просмотреть файл

@ -157,7 +157,7 @@
* struct at91_adc_reg_desc - Various informations relative to registers
* @channel_base: Base offset for the channel data registers
* @drdy_mask: Mask of the DRDY field in the relevant registers
(Interruptions registers mostly)
* (Interruptions registers mostly)
* @status_register: Offset of the Interrupt Status Register
* @trigger_register: Offset of the Trigger setup register
* @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register

6
drivers/iio/adc/cpcap-adc.c
Просмотреть файл

@ -82,7 +82,7 @@
#define CPCAP_ADC_MAX_RETRIES 5 /* Calibration */
/**
/*
* struct cpcap_adc_ato - timing settings for cpcap adc
*
* Unfortunately no cpcap documentation available, please document when
@ -121,7 +121,7 @@ struct cpcap_adc {
bool done;
};
/**
/*
* enum cpcap_adc_channel - cpcap adc channels
*/
enum cpcap_adc_channel {
@ -152,7 +152,7 @@ enum cpcap_adc_channel {
CPCAP_ADC_CHANNEL_NUM,
};
/**
/*
* enum cpcap_adc_timing - cpcap adc timing options
*
* CPCAP_ADC_TIMING_IMM seems to be immediate with no timings.

391
drivers/iio/adc/ingenic-adc.c
Просмотреть файл

@ -8,7 +8,9 @@
#include <dt-bindings/iio/adc/ingenic,adc.h>
#include <linux/clk.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
@ -21,19 +23,46 @@
#define JZ_ADC_REG_CFG 0x04
#define JZ_ADC_REG_CTRL 0x08
#define JZ_ADC_REG_STATUS 0x0c
#define JZ_ADC_REG_ADSAME 0x10
#define JZ_ADC_REG_ADWAIT 0x14
#define JZ_ADC_REG_ADTCH 0x18
#define JZ_ADC_REG_ADBDAT 0x1c
#define JZ_ADC_REG_ADSDAT 0x20
#define JZ_ADC_REG_ADCMD 0x24
#define JZ_ADC_REG_ADCLK 0x28
#define JZ_ADC_REG_ENABLE_PD BIT(7)
#define JZ_ADC_REG_CFG_AUX_MD (BIT(0) | BIT(1))
#define JZ_ADC_REG_CFG_BAT_MD BIT(4)
#define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10)
#define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16)
#define JZ_ADC_REG_CFG_CMD_SEL BIT(22)
#define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10))
#define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0
#define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16
#define JZ4770_ADC_REG_ADCLK_CLKDIV10US_LSB 8
#define JZ4770_ADC_REG_ADCLK_CLKDIVMS_LSB 16
#define JZ_ADC_REG_ADCMD_YNADC BIT(7)
#define JZ_ADC_REG_ADCMD_YPADC BIT(8)
#define JZ_ADC_REG_ADCMD_XNADC BIT(9)
#define JZ_ADC_REG_ADCMD_XPADC BIT(10)
#define JZ_ADC_REG_ADCMD_VREFPYP BIT(11)
#define JZ_ADC_REG_ADCMD_VREFPXP BIT(12)
#define JZ_ADC_REG_ADCMD_VREFPXN BIT(13)
#define JZ_ADC_REG_ADCMD_VREFPAUX BIT(14)
#define JZ_ADC_REG_ADCMD_VREFPVDD33 BIT(15)
#define JZ_ADC_REG_ADCMD_VREFNYN BIT(16)
#define JZ_ADC_REG_ADCMD_VREFNXP BIT(17)
#define JZ_ADC_REG_ADCMD_VREFNXN BIT(18)
#define JZ_ADC_REG_ADCMD_VREFAUX BIT(19)
#define JZ_ADC_REG_ADCMD_YNGRU BIT(20)
#define JZ_ADC_REG_ADCMD_XNGRU BIT(21)
#define JZ_ADC_REG_ADCMD_XPGRU BIT(22)
#define JZ_ADC_REG_ADCMD_YPSUP BIT(23)
#define JZ_ADC_REG_ADCMD_XNSUP BIT(24)
#define JZ_ADC_REG_ADCMD_XPSUP BIT(25)
#define JZ_ADC_AUX_VREF 3300
#define JZ_ADC_AUX_VREF_BITS 12
#define JZ_ADC_BATTERY_LOW_VREF 2500
@ -45,6 +74,14 @@
#define JZ4770_ADC_BATTERY_VREF 6600
#define JZ4770_ADC_BATTERY_VREF_BITS 12
#define JZ_ADC_IRQ_AUX BIT(0)
#define JZ_ADC_IRQ_BATTERY BIT(1)
#define JZ_ADC_IRQ_TOUCH BIT(2)
#define JZ_ADC_IRQ_PEN_DOWN BIT(3)
#define JZ_ADC_IRQ_PEN_UP BIT(4)
#define JZ_ADC_IRQ_PEN_DOWN_SLEEP BIT(5)
#define JZ_ADC_IRQ_SLEEP BIT(7)
struct ingenic_adc;
struct ingenic_adc_soc_data {
@ -56,6 +93,8 @@ struct ingenic_adc_soc_data {
size_t battery_scale_avail_size;
unsigned int battery_vref_mode: 1;
unsigned int has_aux2: 1;
const struct iio_chan_spec *channels;
unsigned int num_channels;
int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
};
@ -68,13 +107,67 @@ struct ingenic_adc {
bool low_vref_mode;
};
static void ingenic_adc_set_adcmd(struct iio_dev *iio_dev, unsigned long mask)
{
struct ingenic_adc *adc = iio_priv(iio_dev);
mutex_lock(&adc->lock);
/* Init ADCMD */
readl(adc->base + JZ_ADC_REG_ADCMD);
if (mask & 0x3) {
/* Second channel (INGENIC_ADC_TOUCH_YP): sample YP vs. GND */
writel(JZ_ADC_REG_ADCMD_XNGRU
| JZ_ADC_REG_ADCMD_VREFNXN | JZ_ADC_REG_ADCMD_VREFPVDD33
| JZ_ADC_REG_ADCMD_YPADC,
adc->base + JZ_ADC_REG_ADCMD);
/* First channel (INGENIC_ADC_TOUCH_XP): sample XP vs. GND */
writel(JZ_ADC_REG_ADCMD_YNGRU
| JZ_ADC_REG_ADCMD_VREFNYN | JZ_ADC_REG_ADCMD_VREFPVDD33
| JZ_ADC_REG_ADCMD_XPADC,
adc->base + JZ_ADC_REG_ADCMD);
}
if (mask & 0xc) {
/* Fourth channel (INGENIC_ADC_TOUCH_YN): sample YN vs. GND */
writel(JZ_ADC_REG_ADCMD_XNGRU
| JZ_ADC_REG_ADCMD_VREFNXN | JZ_ADC_REG_ADCMD_VREFPVDD33
| JZ_ADC_REG_ADCMD_YNADC,
adc->base + JZ_ADC_REG_ADCMD);
/* Third channel (INGENIC_ADC_TOUCH_XN): sample XN vs. GND */
writel(JZ_ADC_REG_ADCMD_YNGRU
| JZ_ADC_REG_ADCMD_VREFNYN | JZ_ADC_REG_ADCMD_VREFPVDD33
| JZ_ADC_REG_ADCMD_XNADC,
adc->base + JZ_ADC_REG_ADCMD);
}
if (mask & 0x30) {
/* Sixth channel (INGENIC_ADC_TOUCH_YD): sample YP vs. YN */
writel(JZ_ADC_REG_ADCMD_VREFNYN | JZ_ADC_REG_ADCMD_VREFPVDD33
| JZ_ADC_REG_ADCMD_YPADC,
adc->base + JZ_ADC_REG_ADCMD);
/* Fifth channel (INGENIC_ADC_TOUCH_XD): sample XP vs. XN */
writel(JZ_ADC_REG_ADCMD_VREFNXN | JZ_ADC_REG_ADCMD_VREFPVDD33
| JZ_ADC_REG_ADCMD_XPADC,
adc->base + JZ_ADC_REG_ADCMD);
}
/* We're done */
writel(0, adc->base + JZ_ADC_REG_ADCMD);
mutex_unlock(&adc->lock);
}
static void ingenic_adc_set_config(struct ingenic_adc *adc,
uint32_t mask,
uint32_t val)
{
uint32_t cfg;
clk_enable(adc->clk);
mutex_lock(&adc->lock);
cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
@ -82,7 +175,6 @@ static void ingenic_adc_set_config(struct ingenic_adc *adc,
writel(cfg, adc->base + JZ_ADC_REG_CFG);
mutex_unlock(&adc->lock);
clk_disable(adc->clk);
}
static void ingenic_adc_enable(struct ingenic_adc *adc,
@ -125,6 +217,8 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
long m)
{
struct ingenic_adc *adc = iio_priv(iio_dev);
struct device *dev = iio_dev->dev.parent;
int ret;
switch (m) {
case IIO_CHAN_INFO_SCALE:
@ -132,6 +226,14 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
case INGENIC_ADC_BATTERY:
if (!adc->soc_data->battery_vref_mode)
return -EINVAL;
ret = clk_enable(adc->clk);
if (ret) {
dev_err(dev, "Failed to enable clock: %d\n",
ret);
return ret;
}
if (val > JZ_ADC_BATTERY_LOW_VREF) {
ingenic_adc_set_config(adc,
JZ_ADC_REG_CFG_BAT_MD,
@ -143,6 +245,9 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
JZ_ADC_REG_CFG_BAT_MD);
adc->low_vref_mode = true;
}
clk_disable(adc->clk);
return 0;
default:
return -EINVAL;
@ -252,6 +357,127 @@ static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
return 0;
}
static const struct iio_chan_spec jz4740_channels[] = {
{
.extend_name = "aux",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_AUX,
.scan_index = -1,
},
{
.extend_name = "battery",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_BATTERY,
.scan_index = -1,
},
};
static const struct iio_chan_spec jz4770_channels[] = {
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = INGENIC_ADC_TOUCH_XP,
.scan_index = 0,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
},
},
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = INGENIC_ADC_TOUCH_YP,
.scan_index = 1,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
},
},
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = INGENIC_ADC_TOUCH_XN,
.scan_index = 2,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
},
},
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = INGENIC_ADC_TOUCH_YN,
.scan_index = 3,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
},
},
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = INGENIC_ADC_TOUCH_XD,
.scan_index = 4,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
},
},
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = INGENIC_ADC_TOUCH_YD,
.scan_index = 5,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
},
},
{
.extend_name = "aux",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_AUX,
.scan_index = -1,
},
{
.extend_name = "battery",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_BATTERY,
.scan_index = -1,
},
{
.extend_name = "aux2",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_AUX2,
.scan_index = -1,
},
};
static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {
.battery_high_vref = JZ4725B_ADC_BATTERY_HIGH_VREF,
.battery_high_vref_bits = JZ4725B_ADC_BATTERY_HIGH_VREF_BITS,
@ -261,6 +487,8 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {
.battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail),
.battery_vref_mode = true,
.has_aux2 = false,
.channels = jz4740_channels,
.num_channels = ARRAY_SIZE(jz4740_channels),
.init_clk_div = jz4725b_adc_init_clk_div,
};
@ -273,6 +501,8 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = {
.battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail),
.battery_vref_mode = true,
.has_aux2 = false,
.channels = jz4740_channels,
.num_channels = ARRAY_SIZE(jz4740_channels),
.init_clk_div = NULL, /* no ADCLK register on JZ4740 */
};
@ -285,6 +515,8 @@ static const struct ingenic_adc_soc_data jz4770_adc_soc_data = {
.battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail),
.battery_vref_mode = false,
.has_aux2 = true,
.channels = jz4770_channels,
.num_channels = ARRAY_SIZE(jz4770_channels),
.init_clk_div = jz4770_adc_init_clk_div,
};
@ -313,11 +545,19 @@ static int ingenic_adc_read_avail(struct iio_dev *iio_dev,
};
}
static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc,
static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int *val)
{
int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY);
struct ingenic_adc *adc = iio_priv(iio_dev);
ret = clk_enable(adc->clk);
if (ret) {
dev_err(iio_dev->dev.parent, "Failed to enable clock: %d\n",
ret);
return ret;
}
/* We cannot sample AUX/AUX2 in parallel. */
mutex_lock(&adc->aux_lock);
@ -326,7 +566,6 @@ static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc,
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit);
}
clk_enable(adc->clk);
ret = ingenic_adc_capture(adc, engine);
if (ret)
goto out;
@ -343,8 +582,8 @@ static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc,
ret = IIO_VAL_INT;
out:
clk_disable(adc->clk);
mutex_unlock(&adc->aux_lock);
clk_disable(adc->clk);
return ret;
}
@ -359,7 +598,7 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev,
switch (m) {
case IIO_CHAN_INFO_RAW:
return ingenic_adc_read_chan_info_raw(adc, chan, val);
return ingenic_adc_read_chan_info_raw(iio_dev, chan, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->channel) {
case INGENIC_ADC_AUX:
@ -384,6 +623,21 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev,
}
}
static int ingenic_adc_of_xlate(struct iio_dev *iio_dev,
const struct of_phandle_args *iiospec)
{
int i;
if (!iiospec->args_count)
return -EINVAL;
for (i = 0; i < iio_dev->num_channels; ++i)
if (iio_dev->channels[i].channel == iiospec->args[0])
return i;
return -EINVAL;
}
static void ingenic_adc_clk_cleanup(void *data)
{
clk_unprepare(data);
@ -393,44 +647,92 @@ static const struct iio_info ingenic_adc_info = {
.write_raw = ingenic_adc_write_raw,
.read_raw = ingenic_adc_read_raw,
.read_avail = ingenic_adc_read_avail,
.of_xlate = ingenic_adc_of_xlate,
};
static const struct iio_chan_spec ingenic_channels[] = {
{
.extend_name = "aux",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_AUX,
},
{
.extend_name = "battery",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_BATTERY,
},
{ /* Must always be last in the array. */
.extend_name = "aux2",
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
.indexed = 1,
.channel = INGENIC_ADC_AUX2,
},
static int ingenic_adc_buffer_enable(struct iio_dev *iio_dev)
{
struct ingenic_adc *adc = iio_priv(iio_dev);
int ret;
ret = clk_enable(adc->clk);
if (ret) {
dev_err(iio_dev->dev.parent, "Failed to enable clock: %d\n",
ret);
return ret;
}
/* It takes significant time for the touchscreen hw to stabilize. */
msleep(50);
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK,
JZ_ADC_REG_CFG_SAMPLE_NUM(4) |
JZ_ADC_REG_CFG_PULL_UP(4));
writew(80, adc->base + JZ_ADC_REG_ADWAIT);
writew(2, adc->base + JZ_ADC_REG_ADSAME);
writeb((u8)~JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_CTRL);
writel(0, adc->base + JZ_ADC_REG_ADTCH);
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL,
JZ_ADC_REG_CFG_CMD_SEL);
ingenic_adc_set_adcmd(iio_dev, iio_dev->active_scan_mask[0]);
ingenic_adc_enable(adc, 2, true);
return 0;
}
static int ingenic_adc_buffer_disable(struct iio_dev *iio_dev)
{
struct ingenic_adc *adc = iio_priv(iio_dev);
ingenic_adc_enable(adc, 2, false);
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL, 0);
writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
writeb(0xff, adc->base + JZ_ADC_REG_STATUS);
ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK, 0);
writew(0, adc->base + JZ_ADC_REG_ADSAME);
writew(0, adc->base + JZ_ADC_REG_ADWAIT);
clk_disable(adc->clk);
return 0;
}
static const struct iio_buffer_setup_ops ingenic_buffer_setup_ops = {
.postenable = &ingenic_adc_buffer_enable,
.predisable = &ingenic_adc_buffer_disable
};
static irqreturn_t ingenic_adc_irq(int irq, void *data)
{
struct iio_dev *iio_dev = data;
struct ingenic_adc *adc = iio_priv(iio_dev);
unsigned long mask = iio_dev->active_scan_mask[0];
unsigned int i;
u32 tdat[3];
for (i = 0; i < ARRAY_SIZE(tdat); mask >>= 2, i++) {
if (mask & 0x3)
tdat[i] = readl(adc->base + JZ_ADC_REG_ADTCH);
else
tdat[i] = 0;
}
iio_push_to_buffers(iio_dev, tdat);
writeb(JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_STATUS);
return IRQ_HANDLED;
}
static int ingenic_adc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_dev *iio_dev;
struct ingenic_adc *adc;
const struct ingenic_adc_soc_data *soc_data;
int ret;
int irq, ret;
soc_data = device_get_match_data(dev);
if (!soc_data)
@ -445,6 +747,17 @@ static int ingenic_adc_probe(struct platform_device *pdev)
mutex_init(&adc->aux_lock);
adc->soc_data = soc_data;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
ret = devm_request_irq(dev, irq, ingenic_adc_irq, 0,
dev_name(dev), iio_dev);
if (ret < 0) {
dev_err(dev, "Failed to request irq: %d\n", ret);
return ret;
}
adc->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(adc->base))
return PTR_ERR(adc->base);
@ -483,12 +796,10 @@ static int ingenic_adc_probe(struct platform_device *pdev)
}
iio_dev->name = "jz-adc";
iio_dev->modes = INDIO_DIRECT_MODE;
iio_dev->channels = ingenic_channels;
iio_dev->num_channels = ARRAY_SIZE(ingenic_channels);
/* Remove AUX2 from the list of supported channels. */
if (!adc->soc_data->has_aux2)
iio_dev->num_channels -= 1;
iio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
iio_dev->setup_ops = &ingenic_buffer_setup_ops;
iio_dev->channels = soc_data->channels;
iio_dev->num_channels = soc_data->num_channels;
iio_dev->info = &ingenic_adc_info;
ret = devm_iio_device_register(dev, iio_dev);

2
drivers/iio/adc/max1363.c
Просмотреть файл

@ -150,7 +150,7 @@ struct max1363_chip_info {
* @current_mode: the scan mode of this chip
* @requestedmask: a valid requested set of channels
* @reg: supply regulator
* @lock lock to ensure state is consistent
* @lock: lock to ensure state is consistent
* @monitor_on: whether monitor mode is enabled
* @monitor_speed: parameter corresponding to device monitor speed setting
* @mask_high: bitmask for enabled high thresholds

4
drivers/iio/adc/max9611.c
Просмотреть файл

@ -110,7 +110,7 @@ enum max9611_conf_ids {
CONF_TEMP,
};
/**
/*
* max9611_mux_conf - associate ADC mux configuration with register address
* where data shall be read from
*/
@ -133,7 +133,7 @@ enum max9611_csa_gain_params {
CSA_GAIN_OFFS_RAW,
};
/**
/*
* max9611_csa_gain_conf - associate gain multiplier with LSB and
* offset values.
*

3
drivers/iio/adc/palmas_gpadc.c
Просмотреть файл

@ -76,7 +76,7 @@ static struct palmas_gpadc_info palmas_gpadc_info[] = {
PALMAS_ADC_INFO(IN15, 0, 0, 0, 0, INVALID, INVALID, true),
};
/**
/*
* struct palmas_gpadc - the palmas_gpadc structure
* @ch0_current: channel 0 current source setting
* 0: 0 uA
@ -94,7 +94,6 @@ static struct palmas_gpadc_info palmas_gpadc_info[] = {
* This is the palmas_gpadc structure to store run-time information
* and pointers for this driver instance.
*/
struct palmas_gpadc {
struct device *dev;
struct palmas *palmas;

3
drivers/iio/adc/qcom-pm8xxx-xoadc.c
Просмотреть файл

@ -120,7 +120,7 @@
#define ADC_ARB_USRP_DATA0 0x19D
#define ADC_ARB_USRP_DATA1 0x19C
/**
/*
* Physical channels which MUST exist on all PM variants in order to provide
* proper reference points for calibration.
*
@ -388,6 +388,7 @@ struct pm8xxx_chan_info {
* struct pm8xxx_xoadc - state container for the XOADC
* @dev: pointer to device
* @map: regmap to access registers
* @variant: XOADC variant characteristics
* @vref: reference voltage regulator
* characteristics of the channels, and sensible default settings
* @nchans: number of channels, configured by the device tree

2
drivers/iio/adc/rockchip_saradc.c
Просмотреть файл

@ -207,7 +207,7 @@ static const struct of_device_id rockchip_saradc_match[] = {
};
MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
/**
/*
* Reset SARADC Controller.
*/
static void rockchip_saradc_reset_controller(struct reset_control *reset)

8
drivers/iio/adc/ti_am335x_adc.c
Просмотреть файл

@ -294,7 +294,7 @@ static int tiadc_start_dma(struct iio_dev *indio_dev)
static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
int i, fifo1count, read;
int i, fifo1count;
tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
IRQENB_FIFO1OVRRUN |
@ -303,7 +303,7 @@ static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
/* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
for (i = 0; i < fifo1count; i++)
read = tiadc_readl(adc_dev, REG_FIFO1);
tiadc_readl(adc_dev, REG_FIFO1);
return 0;
}
@ -343,7 +343,7 @@ static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
struct tiadc_dma *dma = &adc_dev->dma;
int fifo1count, i, read;
int fifo1count, i;
tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
@ -358,7 +358,7 @@ static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
/* Flush FIFO of leftover data in the time it takes to disable adc */
fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
for (i = 0; i < fifo1count; i++)
read = tiadc_readl(adc_dev, REG_FIFO1);
tiadc_readl(adc_dev, REG_FIFO1);
return 0;
}

14
drivers/iio/adc/twl4030-madc.c
Просмотреть файл

@ -153,7 +153,7 @@ enum sample_type {
* struct twl4030_madc_data - a container for madc info
* @dev: Pointer to device structure for madc
* @lock: Mutex protecting this data structure
* @regulator: Pointer to bias regulator for madc
* @usb3v1: Pointer to bias regulator for madc
* @requests: Array of request struct corresponding to SW1, SW2 and RT
* @use_second_irq: IRQ selection (main or co-processor)
* @imr: Interrupt mask register of MADC
@ -161,7 +161,7 @@ enum sample_type {
*/
struct twl4030_madc_data {
struct device *dev;
struct mutex lock; /* mutex protecting this data structure */
struct mutex lock;
struct regulator *usb3v1;
struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
bool use_second_irq;
@ -472,7 +472,7 @@ static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
struct twl4030_madc_data *madc = _madc;
const struct twl4030_madc_conversion_method *method;
u8 isr_val, imr_val;
int i, len, ret;
int i, ret;
struct twl4030_madc_request *r;
mutex_lock(&madc->lock);
@ -504,8 +504,8 @@ static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
continue;
method = &twl4030_conversion_methods[r->method];
/* Read results */
len = twl4030_madc_read_channels(madc, method->rbase,
r->channels, r->rbuf, r->raw);
twl4030_madc_read_channels(madc, method->rbase,
r->channels, r->rbuf, r->raw);
/* Free request */
r->result_pending = false;
r->active = false;
@ -525,8 +525,8 @@ err_i2c:
continue;
method = &twl4030_conversion_methods[r->method];
/* Read results */
len = twl4030_madc_read_channels(madc, method->rbase,
r->channels, r->rbuf, r->raw);
twl4030_madc_read_channels(madc, method->rbase,
r->channels, r->rbuf, r->raw);
/* Free request */
r->result_pending = false;
r->active = false;

4
drivers/iio/adc/twl6030-gpadc.c
Просмотреть файл

@ -94,9 +94,9 @@ struct twl6030_gpadc_data;
* struct twl6030_gpadc_platform_data - platform specific data
* @nchannels: number of GPADC channels
* @iio_channels: iio channels
* @twl6030_ideal: pointer to calibration parameters
* @ideal: pointer to calibration parameters
* @start_conversion: pointer to ADC start conversion function
* @channel_to_reg pointer to ADC function to convert channel to
* @channel_to_reg: pointer to ADC function to convert channel to
* register address for reading conversion result
* @calibrate: pointer to calibration function
*/

2
drivers/iio/common/ms_sensors/ms_sensors_i2c.c
Просмотреть файл

@ -165,7 +165,7 @@ static bool ms_sensors_crc_valid(u32 value)
/**
* ms_sensors_read_serial() - Serial number read function
* @cli: pointer to i2c client
* @client: pointer to i2c client
* @sn: pointer to 64-bits destination value
*
* Generic i2c serial number read function for Measurement Specialties devices.

2
drivers/iio/dac/ad5064.c
Просмотреть файл

@ -787,7 +787,7 @@ static const char * const ad5064_vref_names[] = {
"vrefD",
};
static const char * const ad5064_vref_name(struct ad5064_state *st,
static const char *ad5064_vref_name(struct ad5064_state *st,
unsigned int vref)
{
return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];

2
drivers/iio/dac/ad5360.c
Просмотреть файл

@ -67,7 +67,7 @@ struct ad5360_chip_info {
* @chip_info: chip model specific constants, available modes etc
* @vref_reg: vref supply regulators
* @ctrl: control register cache
* @lock lock to protect the data buffer during SPI ops
* @lock: lock to protect the data buffer during SPI ops
* @data: spi transfer buffers
*/

2
drivers/iio/dac/ad5380.c
Просмотреть файл

@ -51,7 +51,7 @@ struct ad5380_chip_info {
* @vref_reg: vref supply regulator
* @vref: actual reference voltage used in uA
* @pwr_down: whether the chip is currently in power down mode
* @lock lock to protect the data buffer during regmap ops
* @lock: lock to protect the data buffer during regmap ops
*/
struct ad5380_state {

2
drivers/iio/dac/ad5421.c
Просмотреть файл

@ -62,7 +62,7 @@
* @current_range: current range which the device is configured for
* @data: spi transfer buffers
* @fault_mask: software masking of events
* @lock lock to protect the data buffer during SPI ops
* @lock: lock to protect the data buffer during SPI ops
*/
struct ad5421_state {
struct spi_device *spi;

11
drivers/iio/dac/ad5446.c
Просмотреть файл

@ -29,11 +29,14 @@
/**
* struct ad5446_state - driver instance specific data
* @spi: spi_device
* @dev: this device
* @chip_info: chip model specific constants, available modes etc
* @reg: supply regulator
* @vref_mv: actual reference voltage used
* @lock lock to protect the data buffer during write ops
* @cached_val: store/retrieve values during power down
* @pwr_down_mode: power down mode (1k, 100k or tristate)
* @pwr_down: true if the device is in power down
* @lock: lock to protect the data buffer during write ops
*/
struct ad5446_state {
@ -311,7 +314,7 @@ static int ad5660_write(struct ad5446_state *st, unsigned val)
return spi_write(spi, data, sizeof(data));
}
/**
/*
* ad5446_supported_spi_device_ids:
* The AD5620/40/60 parts are available in different fixed internal reference
* voltage options. The actual part numbers may look differently
@ -533,7 +536,7 @@ static int ad5622_write(struct ad5446_state *st, unsigned val)
return i2c_master_send(client, (char *)&data, sizeof(data));
}
/**
/*
* ad5446_supported_i2c_device_ids:
* The AD5620/40/60 parts are available in different fixed internal reference
* voltage options. The actual part numbers may look differently

2
drivers/iio/dac/ad5449.c
Просмотреть файл

@ -56,7 +56,7 @@ struct ad5449_chip_info {
* @has_sdo: whether the SDO line is connected
* @dac_cache: Cache for the DAC values
* @data: spi transfer buffers
* @lock lock to protect the data buffer during SPI ops
* @lock: lock to protect the data buffer during SPI ops
*/
struct ad5449 {
struct spi_device *spi;

7
drivers/iio/dac/ad5504.c
Просмотреть файл

@ -43,8 +43,8 @@
* @spi: spi_device
* @reg: supply regulator
* @vref_mv: actual reference voltage used
* @pwr_down_mask power down mask
* @pwr_down_mode current power down mode
* @pwr_down_mask: power down mask
* @pwr_down_mode: current power down mode
* @data: transfer buffer
*/
struct ad5504_state {
@ -57,10 +57,9 @@ struct ad5504_state {
__be16 data[2] ____cacheline_aligned;
};
/**
/*
* ad5504_supported_device_ids:
*/
enum ad5504_supported_device_ids {
ID_AD5504,
ID_AD5501,

4
drivers/iio/dac/ad5592r-base.c
Просмотреть файл

@ -413,7 +413,7 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev,
s64 tmp = *val * (3767897513LL / 25LL);
*val = div_s64_rem(tmp, 1000000000LL, val2);
ret = IIO_VAL_INT_PLUS_MICRO;
return IIO_VAL_INT_PLUS_MICRO;
} else {
int mult;
@ -444,7 +444,7 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev,
ret = IIO_VAL_INT;
break;
default:
ret = -EINVAL;
return -EINVAL;
}
unlock:

2
drivers/iio/dac/ad5755.c
Просмотреть файл

@ -82,7 +82,7 @@ struct ad5755_chip_info {
* @pwr_down: bitmask which contains hether a channel is powered down or not
* @ctrl: software shadow of the channel ctrl registers
* @channels: iio channel spec for the device
* @lock lock to protect the data buffer during SPI ops
* @lock: lock to protect the data buffer during SPI ops
* @data: spi transfer buffers
*/
struct ad5755_state {

26
drivers/iio/dac/ad5758.c
Просмотреть файл

@ -92,24 +92,24 @@
#define AD5758_FULL_SCALE_MICRO 65535000000ULL
/**
* struct ad5758_state - driver instance specific data
* @spi: spi_device
* @lock: mutex lock
* @out_range: struct which stores the output range
* @dc_dc_mode: variable which stores the mode of operation
* @dc_dc_ilim: variable which stores the dc-to-dc converter current limit
* @slew_time: variable which stores the target slew time
* @pwr_down: variable which contains whether a channel is powered down or not
* @data: spi transfer buffers
*/
struct ad5758_range {
int reg;
int min;
int max;
};
/**
* struct ad5758_state - driver instance specific data
* @spi: spi_device
* @lock: mutex lock
* @gpio_reset: gpio descriptor for the reset line
* @out_range: struct which stores the output range
* @dc_dc_mode: variable which stores the mode of operation
* @dc_dc_ilim: variable which stores the dc-to-dc converter current limit
* @slew_time: variable which stores the target slew time
* @pwr_down: variable which contains whether a channel is powered down or not
* @d32: spi transfer buffers
*/
struct ad5758_state {
struct spi_device *spi;
struct mutex lock;
@ -122,7 +122,7 @@ struct ad5758_state {
__be32 d32[3];
};
/**
/*
* Output ranges corresponding to bits [3:0] from DAC_CONFIG register
* 0000: 0 V to 5 V voltage range
* 0001: 0 V to 10 V voltage range

2
drivers/iio/dac/ad5761.c
Просмотреть файл

@ -57,7 +57,7 @@ enum ad5761_supported_device_ids {
* @use_intref: true when the internal voltage reference is used
* @vref: actual voltage reference in mVolts
* @range: output range mode used
* @lock lock to protect the data buffer during SPI ops
* @lock: lock to protect the data buffer during SPI ops
* @data: cache aligned spi buffer
*/
struct ad5761_state {

5
drivers/iio/dac/ad5764.c
Просмотреть файл

@ -33,9 +33,8 @@
* struct ad5764_chip_info - chip specific information
* @int_vref: Value of the internal reference voltage in uV - 0 if external
* reference voltage is used
* @channel channel specification
* @channels: channel specification
*/
struct ad5764_chip_info {
unsigned long int_vref;
const struct iio_chan_spec *channels;
@ -46,7 +45,7 @@ struct ad5764_chip_info {
* @spi: spi_device
* @chip_info: chip info
* @vref_reg: vref supply regulators
* @lock lock to protect the data buffer during SPI ops
* @lock: lock to protect the data buffer during SPI ops
* @data: spi transfer buffers
*/

10
drivers/iio/dac/ad5791.c
Просмотреть файл

@ -76,9 +76,11 @@ struct ad5791_chip_info {
* @chip_info: chip model specific constants
* @vref_mv: actual reference voltage used
* @vref_neg_mv: voltage of the negative supply
* @pwr_down_mode current power down mode
* @ctrl: control regster cache
* @pwr_down_mode: current power down mode
* @pwr_down: true if device is powered down
* @data: spi transfer buffers
*/
struct ad5791_state {
struct spi_device *spi;
struct regulator *reg_vdd;
@ -96,10 +98,6 @@ struct ad5791_state {
} data[3] ____cacheline_aligned;
};
/**
* ad5791_supported_device_ids:
*/
enum ad5791_supported_device_ids {
ID_AD5760,
ID_AD5780,

6
drivers/iio/dac/ltc2632.c
Просмотреть файл

@ -38,9 +38,9 @@ struct ltc2632_chip_info {
/**
* struct ltc2632_state - driver instance specific data
* @spi_dev: pointer to the spi_device struct
* @powerdown_cache_mask used to show current channel powerdown state
* @vref_mv used reference voltage (internal or external)
* @vref_reg regulator for the reference voltage
* @powerdown_cache_mask: used to show current channel powerdown state
* @vref_mv: used reference voltage (internal or external)
* @vref_reg: regulator for the reference voltage
*/
struct ltc2632_state {
struct spi_device *spi_dev;

7
drivers/iio/dummy/iio_simple_dummy.c
Просмотреть файл

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Copyright (c) 2011 Jonathan Cameron
*
* A reference industrial I/O driver to illustrate the functionality available.
@ -553,7 +553,7 @@ static int iio_dummy_init_device(struct iio_dev *indio_dev)
/**
* iio_dummy_probe() - device instance probe
* @index: an id number for this instance.
* @name: name of this instance.
*
* Arguments are bus type specific.
* I2C: iio_dummy_probe(struct i2c_client *client,
@ -689,7 +689,8 @@ static int iio_dummy_remove(struct iio_sw_device *swd)
return 0;
}
/**
/*
* module_iio_sw_device_driver() - device driver registration
*
* Varies depending on bus type of the device. As there is no device

4
drivers/iio/dummy/iio_simple_dummy_buffer.c
Просмотреть файл

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Copyright (c) 2011 Jonathan Cameron
*
* Buffer handling elements of industrial I/O reference driver.
@ -165,7 +165,7 @@ error_ret:
/**
* iio_simple_dummy_unconfigure_buffer() - release buffer resources
* @indo_dev: device instance state
* @indio_dev: device instance state
*/
void iio_simple_dummy_unconfigure_buffer(struct iio_dev *indio_dev)
{

4
drivers/iio/dummy/iio_simple_dummy_events.c
Просмотреть файл

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Copyright (c) 2011 Jonathan Cameron
*
* Event handling elements of industrial I/O reference driver.
@ -107,6 +107,7 @@ int iio_simple_dummy_write_event_config(struct iio_dev *indio_dev,
* @dir: direction of the vent whose value is being read
* @info: info type of the event whose value is being read
* @val: value for the event code.
* @val2: unused
*
* Many devices provide a large set of events of which only a subset may
* be enabled at a time, with value registers whose meaning changes depending
@ -136,6 +137,7 @@ int iio_simple_dummy_read_event_value(struct iio_dev *indio_dev,
* @dir: direction of the vent whose value is being set
* @info: info type of the event whose value is being set
* @val: the value to be set.
* @val2: unused
*/
int iio_simple_dummy_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,

66
drivers/iio/gyro/fxas21002c.h
Просмотреть файл

@ -76,72 +76,6 @@ enum fxas21002c_fields {
F_MAX_FIELDS,
};
static const struct reg_field fxas21002c_reg_fields[] = {
[F_DR_STATUS] = REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
[F_OUT_X_MSB] = REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
[F_OUT_X_LSB] = REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
[F_OUT_Y_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
[F_OUT_Y_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
[F_OUT_Z_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
[F_OUT_Z_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
[F_ZYX_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
[F_Z_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
[F_Y_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
[F_X_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 4, 4),
[F_ZYX_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 3, 3),
[F_Z_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 2, 2),
[F_Y_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 1, 1),
[F_X_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 0, 0),
[F_OVF] = REG_FIELD(FXAS21002C_REG_F_STATUS, 7, 7),
[F_WMKF] = REG_FIELD(FXAS21002C_REG_F_STATUS, 6, 6),
[F_CNT] = REG_FIELD(FXAS21002C_REG_F_STATUS, 0, 5),
[F_MODE] = REG_FIELD(FXAS21002C_REG_F_SETUP, 6, 7),
[F_WMRK] = REG_FIELD(FXAS21002C_REG_F_SETUP, 0, 5),
[F_EVENT] = REG_FIELD(FXAS21002C_REG_F_EVENT, 5, 5),
[FE_TIME] = REG_FIELD(FXAS21002C_REG_F_EVENT, 0, 4),
[F_BOOTEND] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 3, 3),
[F_SRC_FIFO] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 2, 2),
[F_SRC_RT] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 1, 1),
[F_SRC_DRDY] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 0, 0),
[F_WHO_AM_I] = REG_FIELD(FXAS21002C_REG_WHO_AM_I, 0, 7),
[F_BW] = REG_FIELD(FXAS21002C_REG_CTRL0, 6, 7),
[F_SPIW] = REG_FIELD(FXAS21002C_REG_CTRL0, 5, 5),
[F_SEL] = REG_FIELD(FXAS21002C_REG_CTRL0, 3, 4),
[F_HPF_EN] = REG_FIELD(FXAS21002C_REG_CTRL0, 2, 2),
[F_FS] = REG_FIELD(FXAS21002C_REG_CTRL0, 0, 1),
[F_ELE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 3, 3),
[F_ZTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 2, 2),
[F_YTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 1, 1),
[F_XTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 0, 0),
[F_EA] = REG_FIELD(FXAS21002C_REG_RT_SRC, 6, 6),
[F_ZRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 5, 5),
[F_ZRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 4, 4),
[F_YRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 3, 3),
[F_YRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 2, 2),
[F_XRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 1, 1),
[F_XRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 0),
[F_DBCNTM] = REG_FIELD(FXAS21002C_REG_RT_THS, 7, 7),
[F_THS] = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 6),
[F_RT_COUNT] = REG_FIELD(FXAS21002C_REG_RT_COUNT, 0, 7),
[F_TEMP] = REG_FIELD(FXAS21002C_REG_TEMP, 0, 7),
[F_RST] = REG_FIELD(FXAS21002C_REG_CTRL1, 6, 6),
[F_ST] = REG_FIELD(FXAS21002C_REG_CTRL1, 5, 5),
[F_DR] = REG_FIELD(FXAS21002C_REG_CTRL1, 2, 4),
[F_ACTIVE] = REG_FIELD(FXAS21002C_REG_CTRL1, 1, 1),
[F_READY] = REG_FIELD(FXAS21002C_REG_CTRL1, 0, 0),
[F_INT_CFG_FIFO] = REG_FIELD(FXAS21002C_REG_CTRL2, 7, 7),
[F_INT_EN_FIFO] = REG_FIELD(FXAS21002C_REG_CTRL2, 6, 6),
[F_INT_CFG_RT] = REG_FIELD(FXAS21002C_REG_CTRL2, 5, 5),
[F_INT_EN_RT] = REG_FIELD(FXAS21002C_REG_CTRL2, 4, 4),
[F_INT_CFG_DRDY] = REG_FIELD(FXAS21002C_REG_CTRL2, 3, 3),
[F_INT_EN_DRDY] = REG_FIELD(FXAS21002C_REG_CTRL2, 2, 2),
[F_IPOL] = REG_FIELD(FXAS21002C_REG_CTRL2, 1, 1),
[F_PP_OD] = REG_FIELD(FXAS21002C_REG_CTRL2, 0, 0),
[F_WRAPTOONE] = REG_FIELD(FXAS21002C_REG_CTRL3, 3, 3),
[F_EXTCTRLEN] = REG_FIELD(FXAS21002C_REG_CTRL3, 2, 2),
[F_FS_DOUBLE] = REG_FIELD(FXAS21002C_REG_CTRL3, 0, 0),
};
extern const struct dev_pm_ops fxas21002c_pm_ops;
int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,

66
drivers/iio/gyro/fxas21002c_core.c
Просмотреть файл

@ -42,6 +42,72 @@ enum fxas21002c_mode_state {
#define FXAS21002C_AXIS_TO_REG(axis) (FXAS21002C_REG_OUT_X_MSB + ((axis) * 2))
static const struct reg_field fxas21002c_reg_fields[] = {
[F_DR_STATUS] = REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
[F_OUT_X_MSB] = REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
[F_OUT_X_LSB] = REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
[F_OUT_Y_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
[F_OUT_Y_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
[F_OUT_Z_MSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
[F_OUT_Z_LSB] = REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
[F_ZYX_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
[F_Z_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
[F_Y_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
[F_X_OW] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 4, 4),
[F_ZYX_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 3, 3),
[F_Z_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 2, 2),
[F_Y_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 1, 1),
[F_X_DR] = REG_FIELD(FXAS21002C_REG_DR_STATUS, 0, 0),
[F_OVF] = REG_FIELD(FXAS21002C_REG_F_STATUS, 7, 7),
[F_WMKF] = REG_FIELD(FXAS21002C_REG_F_STATUS, 6, 6),
[F_CNT] = REG_FIELD(FXAS21002C_REG_F_STATUS, 0, 5),
[F_MODE] = REG_FIELD(FXAS21002C_REG_F_SETUP, 6, 7),
[F_WMRK] = REG_FIELD(FXAS21002C_REG_F_SETUP, 0, 5),
[F_EVENT] = REG_FIELD(FXAS21002C_REG_F_EVENT, 5, 5),
[FE_TIME] = REG_FIELD(FXAS21002C_REG_F_EVENT, 0, 4),
[F_BOOTEND] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 3, 3),
[F_SRC_FIFO] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 2, 2),
[F_SRC_RT] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 1, 1),
[F_SRC_DRDY] = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 0, 0),
[F_WHO_AM_I] = REG_FIELD(FXAS21002C_REG_WHO_AM_I, 0, 7),
[F_BW] = REG_FIELD(FXAS21002C_REG_CTRL0, 6, 7),
[F_SPIW] = REG_FIELD(FXAS21002C_REG_CTRL0, 5, 5),
[F_SEL] = REG_FIELD(FXAS21002C_REG_CTRL0, 3, 4),
[F_HPF_EN] = REG_FIELD(FXAS21002C_REG_CTRL0, 2, 2),
[F_FS] = REG_FIELD(FXAS21002C_REG_CTRL0, 0, 1),
[F_ELE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 3, 3),
[F_ZTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 2, 2),
[F_YTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 1, 1),
[F_XTEFE] = REG_FIELD(FXAS21002C_REG_RT_CFG, 0, 0),
[F_EA] = REG_FIELD(FXAS21002C_REG_RT_SRC, 6, 6),
[F_ZRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 5, 5),
[F_ZRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 4, 4),
[F_YRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 3, 3),
[F_YRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 2, 2),
[F_XRT] = REG_FIELD(FXAS21002C_REG_RT_SRC, 1, 1),
[F_XRT_POL] = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 0),
[F_DBCNTM] = REG_FIELD(FXAS21002C_REG_RT_THS, 7, 7),
[F_THS] = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 6),
[F_RT_COUNT] = REG_FIELD(FXAS21002C_REG_RT_COUNT, 0, 7),
[F_TEMP] = REG_FIELD(FXAS21002C_REG_TEMP, 0, 7),
[F_RST] = REG_FIELD(FXAS21002C_REG_CTRL1, 6, 6),
[F_ST] = REG_FIELD(FXAS21002C_REG_CTRL1, 5, 5),
[F_DR] = REG_FIELD(FXAS21002C_REG_CTRL1, 2, 4),
[F_ACTIVE] = REG_FIELD(FXAS21002C_REG_CTRL1, 1, 1),
[F_READY] = REG_FIELD(FXAS21002C_REG_CTRL1, 0, 0),
[F_INT_CFG_FIFO] = REG_FIELD(FXAS21002C_REG_CTRL2, 7, 7),
[F_INT_EN_FIFO] = REG_FIELD(FXAS21002C_REG_CTRL2, 6, 6),
[F_INT_CFG_RT] = REG_FIELD(FXAS21002C_REG_CTRL2, 5, 5),
[F_INT_EN_RT] = REG_FIELD(FXAS21002C_REG_CTRL2, 4, 4),
[F_INT_CFG_DRDY] = REG_FIELD(FXAS21002C_REG_CTRL2, 3, 3),
[F_INT_EN_DRDY] = REG_FIELD(FXAS21002C_REG_CTRL2, 2, 2),
[F_IPOL] = REG_FIELD(FXAS21002C_REG_CTRL2, 1, 1),
[F_PP_OD] = REG_FIELD(FXAS21002C_REG_CTRL2, 0, 0),
[F_WRAPTOONE] = REG_FIELD(FXAS21002C_REG_CTRL3, 3, 3),
[F_EXTCTRLEN] = REG_FIELD(FXAS21002C_REG_CTRL3, 2, 2),
[F_FS_DOUBLE] = REG_FIELD(FXAS21002C_REG_CTRL3, 0, 0),
};
static const int fxas21002c_odr_values[] = {
800, 400, 200, 100, 50, 25, 12, 12
};

14
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
Просмотреть файл

@ -433,7 +433,7 @@ static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
return regmap_write(st->map, st->reg->gyro_config, data);
}
/**
/*
* inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
*
* MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
@ -467,7 +467,7 @@ static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
return regmap_write(st->map, st->reg->accel_lpf, val);
}
/**
/*
* inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
*
* Initial configuration:
@ -847,7 +847,7 @@ error_write_raw_unlock:
return result;
}
/**
/*
* inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
*
* Based on the Nyquist principle, the bandwidth of the low
@ -884,7 +884,7 @@ static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
return 0;
}
/**
/*
* inv_mpu6050_fifo_rate_store() - Set fifo rate.
*/
static ssize_t
@ -945,7 +945,7 @@ fifo_rate_fail_unlock:
return count;
}
/**
/*
* inv_fifo_rate_show() - Get the current sampling rate.
*/
static ssize_t
@ -962,7 +962,7 @@ inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
}
/**
/*
* inv_attr_show() - calling this function will show current
* parameters.
*
@ -1275,7 +1275,7 @@ static const struct iio_info mpu_info = {
.debugfs_reg_access = &inv_mpu6050_reg_access,
};
/**
/*
* inv_check_and_setup_chip() - check and setup chip.
*/
static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)

2
drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c
Просмотреть файл

@ -111,7 +111,7 @@ reset_fifo_fail:
return result;
}
/**
/*
* inv_mpu6050_read_fifo() - Transfer data from hardware FIFO to KFIFO.
*/
irqreturn_t inv_mpu6050_read_fifo(int irq, void *p)

14
drivers/iio/imu/kmx61.c
Просмотреть файл

@ -312,10 +312,10 @@ static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
/**
* kmx61_set_mode() - set KMX61 device operating mode
* @data - kmx61 device private data pointer
* @mode - bitmask, indicating operating mode for @device
* @device - bitmask, indicating device for which @mode needs to be set
* @update - update stby bits stored in device's private @data
* @data: kmx61 device private data pointer
* @mode: bitmask, indicating operating mode for @device
* @device: bitmask, indicating device for which @mode needs to be set
* @update: update stby bits stored in device's private @data
*
* For each sensor (accelerometer/magnetometer) there are two operating modes
* STANDBY and OPERATION. Neither accel nor magn can be disabled independently
@ -718,9 +718,9 @@ static int kmx61_setup_any_motion_interrupt(struct kmx61_data *data,
/**
* kmx61_set_power_state() - set power state for kmx61 @device
* @data - kmx61 device private pointer
* @on - power state to be set for @device
* @device - bitmask indicating device for which @on state needs to be set
* @data: kmx61 device private pointer
* @on: power state to be set for @device
* @device: bitmask indicating device for which @on state needs to be set
*
* Notice that when ACC power state needs to be set to ON and MAG is in
* OPERATION then we know that kmx61_runtime_resume was already called

8
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
Просмотреть файл

@ -436,8 +436,7 @@ int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor,
u16 watermark);
int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable);
int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw);
int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw,
enum st_lsm6dsx_fifo_mode fifo_mode);
int st_lsm6dsx_resume_fifo(struct st_lsm6dsx_hw *hw);
int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw);
int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw);
int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val);
@ -484,7 +483,7 @@ st_lsm6dsx_write_locked(struct st_lsm6dsx_hw *hw, unsigned int addr,
return err;
}
static const inline struct iio_mount_matrix *
static inline const struct iio_mount_matrix *
st_lsm6dsx_get_mount_matrix(const struct iio_dev *iio_dev,
const struct iio_chan_spec *chan)
{
@ -494,7 +493,8 @@ st_lsm6dsx_get_mount_matrix(const struct iio_dev *iio_dev,
return &hw->orientation;
}
static const struct iio_chan_spec_ext_info st_lsm6dsx_accel_ext_info[] = {
static const
struct iio_chan_spec_ext_info __maybe_unused st_lsm6dsx_accel_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, st_lsm6dsx_get_mount_matrix),
{ }
};

23
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
Просмотреть файл

@ -184,8 +184,8 @@ static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw)
return err;
}
int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw,
enum st_lsm6dsx_fifo_mode fifo_mode)
static int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw,
enum st_lsm6dsx_fifo_mode fifo_mode)
{
unsigned int data;
@ -302,6 +302,18 @@ static int st_lsm6dsx_reset_hw_ts(struct st_lsm6dsx_hw *hw)
return 0;
}
int st_lsm6dsx_resume_fifo(struct st_lsm6dsx_hw *hw)
{
int err;
/* reset hw ts counter */
err = st_lsm6dsx_reset_hw_ts(hw);
if (err < 0)
return err;
return st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
}
/*
* Set max bulk read to ST_LSM6DSX_MAX_WORD_LEN/ST_LSM6DSX_MAX_TAGGED_WORD_LEN
* in order to avoid a kmalloc for each bus access
@ -675,12 +687,7 @@ int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable)
goto out;
if (fifo_mask) {
/* reset hw ts counter */
err = st_lsm6dsx_reset_hw_ts(hw);
if (err < 0)
goto out;
err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
err = st_lsm6dsx_resume_fifo(hw);
if (err < 0)
goto out;
}

2
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
Просмотреть файл

@ -2457,7 +2457,7 @@ static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
}
if (hw->fifo_mask)
err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
err = st_lsm6dsx_resume_fifo(hw);
return err;
}

8
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c
Просмотреть файл

@ -163,7 +163,7 @@ static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw)
msleep((2000000U / odr) + 1);
}
/**
/*
* st_lsm6dsx_shub_read_output - read i2c controller register
*
* Read st_lsm6dsx i2c controller register
@ -195,7 +195,7 @@ out:
return err;
}
/**
/*
* st_lsm6dsx_shub_write_reg - write i2c controller register
*
* Write st_lsm6dsx i2c controller register
@ -273,7 +273,7 @@ out:
return err;
}
/**
/*
* st_lsm6dsx_shub_read - read data from slave device register
*
* Read data from slave device register. SLV0 is used for
@ -323,7 +323,7 @@ st_lsm6dsx_shub_read(struct st_lsm6dsx_sensor *sensor, u8 addr,
sizeof(config));
}
/**
/*
* st_lsm6dsx_shub_write - write data to slave device register
*
* Write data from slave device register. SLV0 is used for

1
drivers/iio/industrialio-core.c
Просмотреть файл

@ -1545,6 +1545,7 @@ struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv)
dev->priv = (char *)iio_dev_opaque +
ALIGN(sizeof(struct iio_dev_opaque), IIO_ALIGN);
dev->dev.parent = parent;
dev->dev.groups = dev->groups;
dev->dev.type = &iio_device_type;
dev->dev.bus = &iio_bus_type;

8
drivers/iio/light/cm32181.c
Просмотреть файл

@ -93,10 +93,10 @@ static int cm32181_read_als_it(struct cm32181_chip *cm32181, int *val2);
#ifdef CONFIG_ACPI
/**
* cm32181_acpi_get_cpm() - Get CPM object from ACPI
* @client pointer of struct i2c_client.
* @obj_name pointer of ACPI object name.
* @count maximum size of return array.
* @vals pointer of array for return elements.
* @dev: pointer of struct device.
* @obj_name: pointer of ACPI object name.
* @values: pointer of array for return elements.
* @count: maximum size of return array.
*
* Convert ACPI CPM table to array.
*

6
drivers/iio/light/si1145.c
Просмотреть файл

@ -181,7 +181,7 @@ struct si1145_data {
int meas_rate;
};
/**
/*
* __si1145_command_reset() - Send CMD_NOP and wait for response 0
*
* Does not modify data->rsp_seq
@ -215,7 +215,7 @@ static int __si1145_command_reset(struct si1145_data *data)
}
}
/**
/*
* si1145_command() - Execute a command and poll the response register
*
* All conversion overflows are reported as -EOVERFLOW
@ -1174,7 +1174,7 @@ static const struct iio_buffer_setup_ops si1145_buffer_setup_ops = {
.validate_scan_mask = si1145_validate_scan_mask,
};
/**
/*
* si1145_trigger_set_state() - Set trigger state
*
* When not using triggers interrupts are disabled and measurement rate is

2
drivers/iio/light/stk3310.c
Просмотреть файл

@ -37,6 +37,7 @@
#define STK3310_CHIP_ID_VAL 0x13
#define STK3311_CHIP_ID_VAL 0x1D
#define STK3311X_CHIP_ID_VAL 0x12
#define STK3335_CHIP_ID_VAL 0x51
#define STK3310_PSINT_EN 0x01
#define STK3310_PS_MAX_VAL 0xFFFF
@ -453,6 +454,7 @@ static int stk3310_init(struct iio_dev *indio_dev)
if (chipid != STK3310_CHIP_ID_VAL &&
chipid != STK3311_CHIP_ID_VAL &&
chipid != STK3311X_CHIP_ID_VAL &&
chipid != STK3335_CHIP_ID_VAL) {
dev_err(&client->dev, "invalid chip id: 0x%x\n", chipid);
return -ENODEV;

8
drivers/iio/light/us5182d.c
Просмотреть файл

@ -446,8 +446,8 @@ static int us5182d_read_raw(struct iio_dev *indio_dev,
/**
* us5182d_update_dark_th - update Darh_Th registers
* @data us5182d_data structure
* @index index in us5182d_dark_ths array to use for the updated value
* @data: us5182d_data structure
* @index: index in us5182d_dark_ths array to use for the updated value
*
* Function needs to be called with a lock held because it needs two i2c write
* byte operations as these registers (0x27 0x28) don't work in word mode
@ -469,8 +469,8 @@ static int us5182d_update_dark_th(struct us5182d_data *data, int index)
/**
* us5182d_apply_scale - update the ALS scale
* @data us5182d_data structure
* @index index in us5182d_scales array to use for the updated value
* @data: us5182d_data structure
* @index: index in us5182d_scales array to use for the updated value
*
* Function needs to be called with a lock held as we're having more than one
* i2c operation.

1
drivers/iio/magnetometer/ak8974.c
Просмотреть файл

@ -180,6 +180,7 @@
* @drdy_irq: uses the DRDY IRQ line
* @drdy_complete: completion for DRDY
* @drdy_active_low: the DRDY IRQ is active low
* @scan: timestamps
*/
struct ak8974 {
struct i2c_client *i2c;

6
drivers/iio/magnetometer/hmc5843.h
Просмотреть файл

@ -52,9 +52,9 @@ int hmc5843_common_suspend(struct device *dev);
int hmc5843_common_resume(struct device *dev);
#ifdef CONFIG_PM_SLEEP
static SIMPLE_DEV_PM_OPS(hmc5843_pm_ops,
hmc5843_common_suspend,
hmc5843_common_resume);
static __maybe_unused SIMPLE_DEV_PM_OPS(hmc5843_pm_ops,
hmc5843_common_suspend,
hmc5843_common_resume);
#define HMC5843_PM_OPS (&hmc5843_pm_ops)
#else
#define HMC5843_PM_OPS NULL

2
drivers/iio/magnetometer/mmc35240.c
Просмотреть файл

@ -301,7 +301,7 @@ static int mmc35240_read_measurement(struct mmc35240_data *data, __le16 buf[3])
/**
* mmc35240_raw_to_mgauss - convert raw readings to milli gauss. Also apply
compensation for output value.
* compensation for output value.
*
* @data: device private data
* @index: axis index for which we want the conversion

4
drivers/iio/temperature/mlx90632.c
Просмотреть файл

@ -164,8 +164,8 @@ static s32 mlx90632_pwr_continuous(struct regmap *regmap)
}
/**
* mlx90632_perform_measurement - Trigger and retrieve current measurement cycle
* @*data: pointer to mlx90632_data object containing regmap information
* mlx90632_perform_measurement() - Trigger and retrieve current measurement cycle
* @data: pointer to mlx90632_data object containing regmap information
*
* Perform a measurement and return latest measurement cycle position reported
* by sensor. This is a blocking function for 500ms, as that is default sensor

6
include/dt-bindings/iio/adc/ingenic,adc.h
Просмотреть файл

@ -7,5 +7,11 @@
#define INGENIC_ADC_AUX 0
#define INGENIC_ADC_BATTERY 1
#define INGENIC_ADC_AUX2 2
#define INGENIC_ADC_TOUCH_XP 3
#define INGENIC_ADC_TOUCH_YP 4
#define INGENIC_ADC_TOUCH_XN 5
#define INGENIC_ADC_TOUCH_YN 6
#define INGENIC_ADC_TOUCH_XD 7
#define INGENIC_ADC_TOUCH_YD 8
#endif

5
include/soc/at91/atmel_tcb.h
Просмотреть файл

@ -36,9 +36,14 @@ struct clk;
/**
* struct atmel_tcb_config - SoC data for a Timer/Counter Block
* @counter_width: size in bits of a timer counter register
* @has_gclk: boolean indicating if a timer counter has a generic clock
* @has_qdec: boolean indicating if a timer counter has a quadrature
* decoder.
*/
struct atmel_tcb_config {
size_t counter_width;
bool has_gclk;
bool has_qdec;
};
/**