ARM: dts: rockchip: add QoS register compatibles for rk3288

With the conversion of syscon.yaml minItems for compatibles
was set to 2. Current Rockchip dtsi files only use "syscon" for
QoS registers. Add Rockchip QoS compatibles for rk3288
to reduce notifications produced with:

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201206103711.7465-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Johan Jonker 2020-12-06 11:37:09 +01:00 коммит произвёл Heiko Stuebner
Родитель b39d9683c7
Коммит 6cc35e5edb
1 изменённых файлов: 14 добавлений и 14 удалений

Просмотреть файл

@ -1329,72 +1329,72 @@
}; };
qos_gpu_r: qos@ffaa0000 { qos_gpu_r: qos@ffaa0000 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffaa0000 0x0 0x20>; reg = <0x0 0xffaa0000 0x0 0x20>;
}; };
qos_gpu_w: qos@ffaa0080 { qos_gpu_w: qos@ffaa0080 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffaa0080 0x0 0x20>; reg = <0x0 0xffaa0080 0x0 0x20>;
}; };
qos_vio1_vop: qos@ffad0000 { qos_vio1_vop: qos@ffad0000 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0000 0x0 0x20>; reg = <0x0 0xffad0000 0x0 0x20>;
}; };
qos_vio1_isp_w0: qos@ffad0100 { qos_vio1_isp_w0: qos@ffad0100 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0100 0x0 0x20>; reg = <0x0 0xffad0100 0x0 0x20>;
}; };
qos_vio1_isp_w1: qos@ffad0180 { qos_vio1_isp_w1: qos@ffad0180 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0180 0x0 0x20>; reg = <0x0 0xffad0180 0x0 0x20>;
}; };
qos_vio0_vop: qos@ffad0400 { qos_vio0_vop: qos@ffad0400 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0400 0x0 0x20>; reg = <0x0 0xffad0400 0x0 0x20>;
}; };
qos_vio0_vip: qos@ffad0480 { qos_vio0_vip: qos@ffad0480 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0480 0x0 0x20>; reg = <0x0 0xffad0480 0x0 0x20>;
}; };
qos_vio0_iep: qos@ffad0500 { qos_vio0_iep: qos@ffad0500 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0500 0x0 0x20>; reg = <0x0 0xffad0500 0x0 0x20>;
}; };
qos_vio2_rga_r: qos@ffad0800 { qos_vio2_rga_r: qos@ffad0800 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0800 0x0 0x20>; reg = <0x0 0xffad0800 0x0 0x20>;
}; };
qos_vio2_rga_w: qos@ffad0880 { qos_vio2_rga_w: qos@ffad0880 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0880 0x0 0x20>; reg = <0x0 0xffad0880 0x0 0x20>;
}; };
qos_vio1_isp_r: qos@ffad0900 { qos_vio1_isp_r: qos@ffad0900 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffad0900 0x0 0x20>; reg = <0x0 0xffad0900 0x0 0x20>;
}; };
qos_video: qos@ffae0000 { qos_video: qos@ffae0000 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffae0000 0x0 0x20>; reg = <0x0 0xffae0000 0x0 0x20>;
}; };
qos_hevc_r: qos@ffaf0000 { qos_hevc_r: qos@ffaf0000 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffaf0000 0x0 0x20>; reg = <0x0 0xffaf0000 0x0 0x20>;
}; };
qos_hevc_w: qos@ffaf0080 { qos_hevc_w: qos@ffaf0080 {
compatible = "syscon"; compatible = "rockchip,rk3288-qos", "syscon";
reg = <0x0 0xffaf0080 0x0 0x20>; reg = <0x0 0xffaf0080 0x0 0x20>;
}; };