One fix here, for syncing the last register in a cache block when the
 register map has a stride.  This is a fairly unusual hardware
 configuration and the fact that it only affects the last register in a
 block makes the issue rarer still.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJTCXrVAAoJELSic+t+oim9a3sP/0w6p0B2w5FghFUVCK3x2Bk/
 U7CjDLwbCPnRkjZLQpPTj0y3rXsX6OGZbGcfM0xbnZI3XQ84A8EFzk5FiCFHLDPE
 4qnfihvq6NrgK42/A0AIfL3Zu58VKXcIA22UXQvgRNmqZT8UB7qL4u9tNd+7TKok
 hpL5sznx/NMp2eQpAWAkyUNm90YpDuQbsLF2k9mlaDRh6BvN+DR4nShDNnxuPhLh
 Dl7m591jEgpVjmVJccssC5JqMYWWq5tjC4BqxzzCewpTiifyfZ3vRXlTLFnh1ykF
 RcfrURJtFzviX43wUKsKI8S5s1Tczy0YyVmuj8Ym++u5LcGJienWKlqjVNJyrIRg
 etbc7+uAKLkpsAFpv+35difzelDOLdQIO0xMRlgPJ5NV5ylkkb2dzBZG0Rpvho+1
 IXGnicGh9Bd7tBp3JuCtGEWmNDlJvX5Dc8jhQ6MwOFtqSsmJAghxRoodDOvT5Kwu
 d1oS7MDWV2TmA3XuamrO08i42fd3bUBRNtW2FsnzzU+v3+AkxhfRT9x5+vLK5SZI
 6T/KpdRnn0ro5PpoogDGA4nxDx3aubkqkl+Y4saoeNiZhVW5WYlto8prpMbq+oaq
 t65k2dNQoCpQhhEgKuHbVmC+p4cCDE0w9XnH/vFTklh67JGcnwOIm5dtQFxTfRjY
 DLNiji1K6aiPnQPPRFF1
 =AasC
 -----END PGP SIGNATURE-----

Merge tag 'regmap-v3.14-rc4' into regmap-linus

regmap: Fix for v3.14

One fix here, for syncing the last register in a cache block when the
register map has a stride.  This is a fairly unusual hardware
configuration and the fact that it only affects the last register in a
block makes the issue rarer still.

# gpg: Signature made Sun 23 Feb 2014 04:36:37 GMT using RSA key ID 7EA229BD
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"
This commit is contained in:
Mark Brown 2014-03-28 11:50:39 +00:00
Родитель b098d6726b 78ba73eecd
Коммит 6ce6d9c214
1 изменённых файлов: 2 добавлений и 2 удалений

Просмотреть файл

@ -636,10 +636,10 @@ static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
if (*data == NULL)
return 0;
count = cur - base;
count = (cur - base) / map->reg_stride;
dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
count * val_bytes, count, base, cur - 1);
count * val_bytes, count, base, cur - map->reg_stride);
map->cache_bypass = 1;