Renesas ARM Based SoC DT Updates for v4.5
* henninger: Remove as it is now replaced by silk * koelsch: Move SPI partitions to subnode * porter: Add CAN0 and HS-USB support * r8a7793/gose: Add QSPI, PFC support * r8a7793: Add GPIO, DMAC, theral, IPMMU support * r8a7794/alt: Add DU support * r8a7794: Disable all IPMMU nodes by default * r8a779[0134]: Use Use SoC specific binding for rcar-dmac * r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with wakeup-source property * r8a779[14]: Correct "gpio-ranges" properties * r8a779[14]: Remove bogus imp_clk node * silk: Add SDHI1 support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWTnFmAAoJENfPZGlqN0++JaYP/RPq8zvAt/x7QXNfo/9OPbpk lYjJpeBnTunK6UZBjG74ZOEL0SJh4F3Ti1N+7jmjN73Kp5OE2p8/z5bRsiElLyez LwHDx4FwksOGF/90zRAFX+WGWEInKlwVKopp9DIgHc1MS98/7VsxM5v9g3ZsCp0U GLpvaMnNoC6es6qi2O8Qc5lwI1g2XWRptzozOtjo04bjzUshEomOUXQ78Xj17T95 +KxJmIyIuUvHX4kNen7GLpUheR9AgqMn7NTjFzXDo3q2DeTLMrMPQZlXIWCn17cD AaJGK3geaRXy9t40Cqo38u5lKUr65SJUsjikmNNWGf0xpLWR+m8uHYnKUuljtiUS H5tDuRVv9euzSTp0xs9XgcOuUg966iaO8IoX95GGukQ9+dW8UicGCg+5lKCJh+K0 d7ev+Z9UuAmNcrwk30VSgY0rq1iWAJSdngZisJKCjo38Een6RnZm7Kgg6ZEib6qX z4d+ZPjvhOWRVC+k9XlnrqRNBqiK0H0wzBunY+2/cH056MfIqVy5gdGCK6CtHrdK qx9G38kwyQB7FHGvvVS4X/KikQJPetyCl4tWFmMjBTmGlaoQSsDgRvBbJExzN/Hq ERG2syGkB687DU+fhKCQryvDY1igKbKjUEAM1Ar/4ULLPNCZ0kB0wWmWlV9xobM7 EDocF4nkl69jyIGoUweD =snxp -----END PGP SIGNATURE----- Merge tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v4.5" from Simon Horman: * henninger: Remove as it is now replaced by silk * koelsch: Move SPI partitions to subnode * porter: Add CAN0 and HS-USB support * r8a7793/gose: Add QSPI, PFC support * r8a7793: Add GPIO, DMAC, theral, IPMMU support * r8a7794/alt: Add DU support * r8a7794: Disable all IPMMU nodes by default * r8a779[0134]: Use Use SoC specific binding for rcar-dmac * r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with wakeup-source property * r8a779[14]: Correct "gpio-ranges" properties * r8a779[14]: Remove bogus imp_clk node * silk: Add SDHI1 support * tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits) ARM: shmobile: alt: add VIN0, ADV7180 DT support ARM: shmobile: alt: add I2C1 DT support ARM: shmobile: alt: Add pfc pins to DT ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes ARM: shmobile: r8a7793: Add GPIO nodes to device tree ARM: shmobile: r8a7794: alt: Enable VGA port ARM: shmobile: r8a7794: Add DU node to device tree ARM: shmobile: r8a7794: Add DU0 clock ARM: shmobile: gose: Add QSPI device to DT ARM: shmobile: r8a7793: Add QSPI device to DT ARM: shmobile: r8a7793: Add DMAC devices to DT ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode ARM: shmobile: gose: Configure PFC in DT ARM: shmobile: r8a7793: Add PFC to DT ARM: shmobile: r8a7793: Add thermal device to DT ARM: shmobile: henninger: remove board DT ARM: shmobile: porter: add CAN0 DT support ...
This commit is contained in:
Arnd Bergmann
Коммит
6da06083f4
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@ -547,7 +547,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
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r8a7778-bockw.dtb \
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r8a7779-marzen.dtb \
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r8a7790-lager.dtb \
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r8a7791-henninger.dtb \
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r8a7791-koelsch.dtb \
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r8a7791-porter.dtb \
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r8a7793-gose.dtb \
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@ -110,7 +110,7 @@
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gpios = <&pfc 324 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_0>;
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label = "S16";
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gpio-key,wakeup;
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wakeup-source;
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};
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menu-key {
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@ -85,7 +85,7 @@
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gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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label = "SW3";
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gpio-key,wakeup;
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wakeup-source;
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};
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back-key {
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@ -77,28 +77,28 @@
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button@1 {
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linux,code = <KEY_1>;
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label = "SW2-1";
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gpio-key,wakeup;
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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button@2 {
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linux,code = <KEY_2>;
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label = "SW2-2";
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gpio-key,wakeup;
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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};
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button@3 {
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linux,code = <KEY_3>;
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label = "SW2-3";
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gpio-key,wakeup;
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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};
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button@4 {
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linux,code = <KEY_4>;
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label = "SW2-4";
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gpio-key,wakeup;
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
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};
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@ -143,7 +143,7 @@
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interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 32 32>;
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gpio-ranges = <&pfc 0 32 30>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
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@ -156,7 +156,7 @@
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interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 64 32>;
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gpio-ranges = <&pfc 0 64 30>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
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@ -266,7 +266,7 @@
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};
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dmac0: dma-controller@e6700000 {
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compatible = "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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reg = <0 0xe6700000 0 0x20000>;
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interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
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0 200 IRQ_TYPE_LEVEL_HIGH
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@ -297,7 +297,7 @@
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};
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dmac1: dma-controller@e6720000 {
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compatible = "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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reg = <0 0xe6720000 0 0x20000>;
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interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
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0 216 IRQ_TYPE_LEVEL_HIGH
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@ -328,7 +328,7 @@
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};
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audma0: dma-controller@ec700000 {
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compatible = "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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reg = <0 0xec700000 0 0x10000>;
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interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
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0 320 IRQ_TYPE_LEVEL_HIGH
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@ -357,7 +357,7 @@
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};
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audma1: dma-controller@ec720000 {
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compatible = "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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reg = <0 0xec720000 0 0x10000>;
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interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
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0 333 IRQ_TYPE_LEVEL_HIGH
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@ -1,320 +0,0 @@
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/*
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* Device Tree Source for the Henninger board
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*
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* Copyright (C) 2014 Renesas Solutions Corp.
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* Copyright (C) 2014 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r8a7791.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Henninger";
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compatible = "renesas,henninger", "renesas,r8a7791";
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aliases {
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serial0 = &scif0;
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};
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chosen {
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bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = &scif0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x40000000>;
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};
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vcc_sdhi0: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccq_sdhi0: regulator@1 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vcc_sdhi2: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccq_sdhi2: regulator@3 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&pfc {
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scif0_pins: serial0 {
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renesas,groups = "scif0_data_d";
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renesas,function = "scif0";
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};
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ether_pins: ether {
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renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
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renesas,function = "eth";
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};
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phy1_pins: phy1 {
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renesas,groups = "intc_irq0";
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renesas,function = "intc";
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};
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sdhi0_pins: sd0 {
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renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
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renesas,function = "sdhi0";
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};
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sdhi2_pins: sd2 {
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renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
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renesas,function = "sdhi2";
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};
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i2c2_pins: i2c2 {
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renesas,groups = "i2c2";
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renesas,function = "i2c2";
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};
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qspi_pins: spi0 {
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renesas,groups = "qspi_ctrl", "qspi_data4";
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renesas,function = "qspi";
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};
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msiof0_pins: spi1 {
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renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
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"msiof0_tx";
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renesas,function = "msiof0";
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};
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usb0_pins: usb0 {
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renesas,groups = "usb0";
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renesas,function = "usb0";
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};
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usb1_pins: usb1 {
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renesas,groups = "usb1";
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renesas,function = "usb1";
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};
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vin0_pins: vin0 {
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renesas,groups = "vin0_data8", "vin0_clk";
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renesas,function = "vin0";
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};
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can0_pins: can0 {
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renesas,groups = "can0_data";
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renesas,function = "can0";
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};
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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ðer {
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pinctrl-0 = <ðer_pins &phy1_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "okay";
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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};
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};
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&sata0 {
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status = "okay";
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&sdhi2 {
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi2>;
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vqmmc-supply = <&vccq_sdhi2>;
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cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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composite-in@20 {
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compatible = "adi,adv7180";
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reg = <0x20>;
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remote = <&vin0>;
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port {
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adv7180: endpoint {
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bus-width = <8>;
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remote-endpoint = <&vin0ep>;
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};
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};
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};
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};
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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#address-cells = <1>;
|
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#size-cells = <1>;
|
||||
compatible = "spansion,s25fl512s", "jedec,spi-nor";
|
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reg = <0>;
|
||||
spi-max-frequency = <30000000>;
|
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spi-tx-bus-width = <4>;
|
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spi-rx-bus-width = <4>;
|
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m25p,fast-read;
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partition@0 {
|
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label = "loader_prg";
|
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reg = <0x00000000 0x00040000>;
|
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read-only;
|
||||
};
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partition@40000 {
|
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label = "user_prg";
|
||||
reg = <0x00040000 0x00400000>;
|
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read-only;
|
||||
};
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partition@440000 {
|
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label = "flash_fs";
|
||||
reg = <0x00440000 0x03bc0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&msiof0 {
|
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pinctrl-0 = <&msiof0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
pmic@0 {
|
||||
compatible = "renesas,r2a11302ft";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <6000000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
};
|
||||
};
|
||||
|
||||
&pci0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&pci1 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&hsusb {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_bus_clk {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* composite video input */
|
||||
&vin0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&vin0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vin0ep: endpoint {
|
||||
remote-endpoint = <&adv7180>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&can0 {
|
||||
pinctrl-0 = <&can0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -79,77 +79,77 @@
|
|||
gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_1>;
|
||||
label = "SW2-1";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-2 {
|
||||
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_2>;
|
||||
label = "SW2-2";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-3 {
|
||||
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_3>;
|
||||
label = "SW2-3";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-4 {
|
||||
gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_4>;
|
||||
label = "SW2-4";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-a {
|
||||
gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_A>;
|
||||
label = "SW30";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-b {
|
||||
gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_B>;
|
||||
label = "SW31";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-c {
|
||||
gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_C>;
|
||||
label = "SW32";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-d {
|
||||
gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_D>;
|
||||
label = "SW33";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-e {
|
||||
gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_E>;
|
||||
label = "SW34";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-f {
|
||||
gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_F>;
|
||||
label = "SW35";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-g {
|
||||
gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_G>;
|
||||
label = "SW36";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
};
|
||||
|
|
@ -479,8 +479,6 @@
|
|||
status = "okay";
|
||||
|
||||
flash: flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25fl512s", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <30000000>;
|
||||
|
|
@ -490,19 +488,24 @@
|
|||
spi-cpol;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@0 {
|
||||
label = "loader";
|
||||
reg = <0x00000000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
partition@80000 {
|
||||
label = "user";
|
||||
reg = <0x00080000 0x00580000>;
|
||||
read-only;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "flash";
|
||||
reg = <0x00600000 0x03a00000>;
|
||||
partitions {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "loader";
|
||||
reg = <0x00000000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
partition@80000 {
|
||||
label = "user";
|
||||
reg = <0x00080000 0x00580000>;
|
||||
read-only;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "flash";
|
||||
reg = <0x00600000 0x03a00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -134,6 +134,11 @@
|
|||
renesas,groups = "vin0_data8", "vin0_clk";
|
||||
renesas,function = "vin0";
|
||||
};
|
||||
|
||||
can0_pins: can0 {
|
||||
renesas,groups = "can0_data";
|
||||
renesas,function = "can0";
|
||||
};
|
||||
};
|
||||
|
||||
&scif0 {
|
||||
|
|
@ -269,6 +274,14 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&hsusb {
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -280,3 +293,10 @@
|
|||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can0 {
|
||||
pinctrl-0 = <&can0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -100,7 +100,7 @@
|
|||
interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 32 32>;
|
||||
gpio-ranges = <&pfc 0 32 26>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
|
||||
|
|
@ -255,7 +255,7 @@
|
|||
};
|
||||
|
||||
dmac0: dma-controller@e6700000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
|
||||
0 200 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -286,7 +286,7 @@
|
|||
};
|
||||
|
||||
dmac1: dma-controller@e6720000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
|
||||
0 216 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -317,7 +317,7 @@
|
|||
};
|
||||
|
||||
audma0: dma-controller@ec700000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
|
||||
0 320 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -346,7 +346,7 @@
|
|||
};
|
||||
|
||||
audma1: dma-controller@ec720000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
|
||||
0 333 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -1163,14 +1163,6 @@
|
|||
clock-mult = <1>;
|
||||
clock-output-names = "m2";
|
||||
};
|
||||
imp_clk: imp_clk {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
|
||||
#clock-cells = <0>;
|
||||
clock-div = <4>;
|
||||
clock-mult = <1>;
|
||||
clock-output-names = "imp";
|
||||
};
|
||||
rclk_clk: rclk_clk {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
|
||||
|
|
|
|||
|
|
@ -37,7 +37,37 @@
|
|||
clock-frequency = <20000000>;
|
||||
};
|
||||
|
||||
&pfc {
|
||||
scif0_pins: serial0 {
|
||||
renesas,groups = "scif0_data_d";
|
||||
renesas,function = "scif0";
|
||||
};
|
||||
|
||||
scif1_pins: serial1 {
|
||||
renesas,groups = "scif1_data_d";
|
||||
renesas,function = "scif1";
|
||||
};
|
||||
|
||||
ether_pins: ether {
|
||||
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
|
||||
renesas,function = "eth";
|
||||
};
|
||||
|
||||
phy1_pins: phy1 {
|
||||
renesas,groups = "intc_irq0";
|
||||
renesas,function = "intc";
|
||||
};
|
||||
|
||||
qspi_pins: spi0 {
|
||||
renesas,groups = "qspi_ctrl", "qspi_data4";
|
||||
renesas,function = "qspi";
|
||||
};
|
||||
};
|
||||
|
||||
ðer {
|
||||
pinctrl-0 = <ðer_pins &phy1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy-handle = <&phy1>;
|
||||
renesas,ether-link-active-low;
|
||||
status = "okay";
|
||||
|
|
@ -55,9 +85,53 @@
|
|||
};
|
||||
|
||||
&scif0 {
|
||||
pinctrl-0 = <&scif0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&scif1 {
|
||||
pinctrl-0 = <&scif1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-0 = <&qspi_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "spansion,s25fl512s", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <30000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
m25p,fast-read;
|
||||
|
||||
partitions {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "loader";
|
||||
reg = <0x00000000 0x00040000>;
|
||||
read-only;
|
||||
};
|
||||
partition@40000 {
|
||||
label = "user";
|
||||
reg = <0x00040000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
partition@440000 {
|
||||
label = "flash";
|
||||
reg = <0x00440000 0x03bc0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,6 +18,10 @@
|
|||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
spi0 = &qspi;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -53,6 +57,118 @@
|
|||
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
gpio0: gpio@e6050000 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6050000 0 0x50>;
|
||||
interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 0 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio1: gpio@e6051000 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6051000 0 0x50>;
|
||||
interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 32 26>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio2: gpio@e6052000 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6052000 0 0x50>;
|
||||
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 64 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio3: gpio@e6053000 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6053000 0 0x50>;
|
||||
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 96 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio4: gpio@e6054000 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6054000 0 0x50>;
|
||||
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 128 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio5: gpio@e6055000 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6055000 0 0x50>;
|
||||
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 160 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio6: gpio@e6055400 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6055400 0 0x50>;
|
||||
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 192 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
gpio7: gpio@e6055800 {
|
||||
compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
|
||||
reg = <0 0xe6055800 0 0x50>;
|
||||
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 224 26>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
thermal@e61f0000 {
|
||||
compatible = "renesas,thermal-r8a7793", "renesas,rcar-thermal";
|
||||
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
|
||||
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
|
||||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
|
|
@ -114,6 +230,74 @@
|
|||
power-domains = <&cpg_clocks>;
|
||||
};
|
||||
|
||||
pfc: pfc@e6060000 {
|
||||
compatible = "renesas,pfc-r8a7793";
|
||||
reg = <0 0xe6060000 0 0x250>;
|
||||
#gpio-range-cells = <3>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@e6700000 {
|
||||
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
|
||||
0 200 IRQ_TYPE_LEVEL_HIGH
|
||||
0 201 IRQ_TYPE_LEVEL_HIGH
|
||||
0 202 IRQ_TYPE_LEVEL_HIGH
|
||||
0 203 IRQ_TYPE_LEVEL_HIGH
|
||||
0 204 IRQ_TYPE_LEVEL_HIGH
|
||||
0 205 IRQ_TYPE_LEVEL_HIGH
|
||||
0 206 IRQ_TYPE_LEVEL_HIGH
|
||||
0 207 IRQ_TYPE_LEVEL_HIGH
|
||||
0 208 IRQ_TYPE_LEVEL_HIGH
|
||||
0 209 IRQ_TYPE_LEVEL_HIGH
|
||||
0 210 IRQ_TYPE_LEVEL_HIGH
|
||||
0 211 IRQ_TYPE_LEVEL_HIGH
|
||||
0 212 IRQ_TYPE_LEVEL_HIGH
|
||||
0 213 IRQ_TYPE_LEVEL_HIGH
|
||||
0 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
"ch8", "ch9", "ch10", "ch11",
|
||||
"ch12", "ch13", "ch14";
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&cpg_clocks>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <15>;
|
||||
};
|
||||
|
||||
dmac1: dma-controller@e6720000 {
|
||||
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
|
||||
0 216 IRQ_TYPE_LEVEL_HIGH
|
||||
0 217 IRQ_TYPE_LEVEL_HIGH
|
||||
0 218 IRQ_TYPE_LEVEL_HIGH
|
||||
0 219 IRQ_TYPE_LEVEL_HIGH
|
||||
0 308 IRQ_TYPE_LEVEL_HIGH
|
||||
0 309 IRQ_TYPE_LEVEL_HIGH
|
||||
0 310 IRQ_TYPE_LEVEL_HIGH
|
||||
0 311 IRQ_TYPE_LEVEL_HIGH
|
||||
0 312 IRQ_TYPE_LEVEL_HIGH
|
||||
0 313 IRQ_TYPE_LEVEL_HIGH
|
||||
0 314 IRQ_TYPE_LEVEL_HIGH
|
||||
0 315 IRQ_TYPE_LEVEL_HIGH
|
||||
0 316 IRQ_TYPE_LEVEL_HIGH
|
||||
0 317 IRQ_TYPE_LEVEL_HIGH
|
||||
0 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
"ch8", "ch9", "ch10", "ch11",
|
||||
"ch12", "ch13", "ch14";
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&cpg_clocks>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <15>;
|
||||
};
|
||||
|
||||
scif0: serial@e6e60000 {
|
||||
compatible = "renesas,scif-r8a7793", "renesas,scif";
|
||||
reg = <0 0xe6e60000 0 64>;
|
||||
|
|
@ -146,6 +330,20 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi: spi@e6b10000 {
|
||||
compatible = "renesas,qspi-r8a7793", "renesas,qspi";
|
||||
reg = <0 0xe6b10000 0 0x2c>;
|
||||
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
|
||||
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
num-cs = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
|
@ -299,6 +497,16 @@
|
|||
"tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
|
||||
"vsp1-du0", "vsps";
|
||||
};
|
||||
mstp2_clks: mstp2_clks@e6150138 {
|
||||
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
|
||||
clocks = <&zs_clk>, <&zs_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
|
||||
>;
|
||||
clock-output-names = "sys-dmac1", "sys-dmac0";
|
||||
};
|
||||
mstp3_clks: mstp3_clks@e615013c {
|
||||
compatible = "renesas,r8a7793-mstp-clocks",
|
||||
"renesas,cpg-mstp-clocks";
|
||||
|
|
@ -329,6 +537,14 @@
|
|||
clock-indices = <R8A7793_CLK_IRQC>;
|
||||
clock-output-names = "irqc";
|
||||
};
|
||||
mstp5_clks: mstp5_clks@e6150144 {
|
||||
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
|
||||
clocks = <&extal_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <R8A7793_CLK_THERMAL>;
|
||||
clock-output-names = "thermal";
|
||||
};
|
||||
mstp7_clks: mstp7_clks@e615014c {
|
||||
compatible = "renesas,r8a7793-mstp-clocks",
|
||||
"renesas,cpg-mstp-clocks";
|
||||
|
|
@ -369,6 +585,84 @@
|
|||
"ipmmu_sgx", "vin2", "vin1", "vin0", "ether",
|
||||
"sata1", "sata0";
|
||||
};
|
||||
mstp9_clks: mstp9_clks@e6150994 {
|
||||
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
|
||||
clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
|
||||
<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
|
||||
<&cpg_clocks R8A7793_CLK_QSPI>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6
|
||||
R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
|
||||
R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
|
||||
R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
|
||||
R8A7793_CLK_QSPI_MOD
|
||||
>;
|
||||
clock-output-names =
|
||||
"gpio7", "gpio6", "gpio5", "gpio4",
|
||||
"gpio3", "gpio2", "gpio1", "gpio0",
|
||||
"qspi_mod";
|
||||
};
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 221 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 261 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -33,12 +33,100 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
vga-encoder {
|
||||
compatible = "adi,adv7123";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
adv7123_in: endpoint {
|
||||
remote-endpoint = <&du_out_rgb1>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
adv7123_out: endpoint {
|
||||
remote-endpoint = <&vga_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vga {
|
||||
compatible = "vga-connector";
|
||||
|
||||
port {
|
||||
vga_in: endpoint {
|
||||
remote-endpoint = <&adv7123_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
x2_clk: x2-clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <74250000>;
|
||||
};
|
||||
|
||||
x13_clk: x13-clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <148500000>;
|
||||
};
|
||||
};
|
||||
|
||||
&du {
|
||||
status = "okay";
|
||||
|
||||
clocks = <&mstp7_clks R8A7794_CLK_DU0>,
|
||||
<&mstp7_clks R8A7794_CLK_DU0>,
|
||||
<&x13_clk>, <&x2_clk>;
|
||||
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
endpoint {
|
||||
remote-endpoint = <&adv7123_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&extal_clk {
|
||||
clock-frequency = <20000000>;
|
||||
};
|
||||
|
||||
&pfc {
|
||||
scif2_pins: serial2 {
|
||||
renesas,groups = "scif2_data";
|
||||
renesas,function = "scif2";
|
||||
};
|
||||
|
||||
ether_pins: ether {
|
||||
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
|
||||
renesas,function = "eth";
|
||||
};
|
||||
|
||||
ether_b_pins: ether {
|
||||
renesas,groups = "eth_link_b", "eth_mdio_b", "eth_rmii_b";
|
||||
renesas,function = "eth";
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1 {
|
||||
renesas,groups = "i2c1";
|
||||
renesas,function = "i2c1";
|
||||
};
|
||||
|
||||
vin0_pins: vin0 {
|
||||
renesas,groups = "vin0_data8", "vin0_clk";
|
||||
renesas,function = "vin0";
|
||||
};
|
||||
};
|
||||
|
||||
&cmt0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -56,6 +144,43 @@
|
|||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
composite-in@20 {
|
||||
compatible = "adi,adv7180";
|
||||
reg = <0x20>;
|
||||
remote = <&vin0>;
|
||||
|
||||
port {
|
||||
adv7180: endpoint {
|
||||
bus-width = <8>;
|
||||
remote-endpoint = <&vin0ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&vin0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&vin0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vin0ep: endpoint {
|
||||
remote-endpoint = <&adv7180>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&scif2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
/dts-v1/;
|
||||
#include "r8a7794.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "SILK";
|
||||
|
|
@ -39,6 +40,30 @@
|
|||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vcc_sdhi1: regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "SDHI1 Vcc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
vccq_sdhi1: regulator@4 {
|
||||
compatible = "regulator-gpio";
|
||||
|
||||
regulator-name = "SDHI1 VccQ";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&extal_clk {
|
||||
|
|
@ -71,6 +96,11 @@
|
|||
renesas,function = "mmc";
|
||||
};
|
||||
|
||||
sdhi1_pins: sd1 {
|
||||
renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
|
||||
renesas,function = "sdhi1";
|
||||
};
|
||||
|
||||
qspi_pins: spi0 {
|
||||
renesas,groups = "qspi_ctrl", "qspi_data4";
|
||||
renesas,function = "qspi";
|
||||
|
|
@ -147,6 +177,16 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhi1 {
|
||||
pinctrl-0 = <&sdhi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
vmmc-supply = <&vcc_sdhi1>;
|
||||
vqmmc-supply = <&vccq_sdhi1>;
|
||||
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-0 = <&qspi_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -221,7 +221,7 @@
|
|||
};
|
||||
|
||||
dmac0: dma-controller@e6700000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
|
||||
0 200 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -252,7 +252,7 @@
|
|||
};
|
||||
|
||||
dmac1: dma-controller@e6720000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
|
||||
0 216 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -750,6 +750,34 @@
|
|||
};
|
||||
};
|
||||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7794";
|
||||
reg = <0 0xfeb00000 0 0x40000>;
|
||||
reg-names = "du";
|
||||
interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7794_CLK_DU0>,
|
||||
<&mstp7_clks R8A7794_CLK_DU0>;
|
||||
clock-names = "du.0", "du.1";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
du_out_rgb0: endpoint {
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_rgb1: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
|
@ -879,14 +907,6 @@
|
|||
clock-mult = <1>;
|
||||
clock-output-names = "m2";
|
||||
};
|
||||
imp_clk: imp_clk {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
|
||||
#clock-cells = <0>;
|
||||
clock-div = <4>;
|
||||
clock-mult = <1>;
|
||||
clock-output-names = "imp";
|
||||
};
|
||||
rclk_clk: rclk_clk {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
|
||||
|
|
@ -1025,19 +1045,20 @@
|
|||
reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
|
||||
clocks = <&mp_clk>, <&mp_clk>,
|
||||
<&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
|
||||
<&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
|
||||
<&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
|
||||
<&zx_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
|
||||
R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
|
||||
R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
|
||||
R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
|
||||
R8A7794_CLK_SCIF0
|
||||
R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
|
||||
>;
|
||||
clock-output-names =
|
||||
"ehci", "hsusb",
|
||||
"hscif2", "scif5", "scif4", "hscif1", "hscif0",
|
||||
"scif3", "scif2", "scif1", "scif0";
|
||||
"scif3", "scif2", "scif1", "scif0", "du0";
|
||||
};
|
||||
mstp8_clks: mstp8_clks@e6150990 {
|
||||
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
|
|
@ -1105,6 +1126,7 @@
|
|||
interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
|
|
@ -1121,6 +1143,7 @@
|
|||
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 221 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
|
|
|
|||
|
|
@ -147,7 +147,7 @@
|
|||
gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_HOME>;
|
||||
label = "SW1";
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,7 @@
|
|||
#define R8A7794_CLK_SCIF2 19
|
||||
#define R8A7794_CLK_SCIF1 20
|
||||
#define R8A7794_CLK_SCIF0 21
|
||||
#define R8A7794_CLK_DU0 24
|
||||
|
||||
/* MSTP8 */
|
||||
#define R8A7794_CLK_VIN1 10
|
||||
|
|
|
|||
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