Keystone DTS updates for 3.15
- Add watchdog timer, timer64 and gpio device nodes - Add LED device nodes - Fixes for debugss, msmc clock nodes - Add support for Keystone Lamarr and Edision SOC/EVM support - Add NAND and AEMIF device nodes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJTFtD1AAoJEHJsHOdBp5c/WTsP/36FISirYDIhQcemxZlRw5U1 o5CVZBy+aZyFrSY03gcQtw8MUHVCrJVJIepI37wlpyYlWoSMMfBKmAGMu1c9W0DT 35FDygHuc34H+RRGO0eLu+NFoVfUCzp3ijo7IMMvbjdyQCA/8wtrBh61U8RtkN+2 Teu/NAM5hHP01rpr38z0MgffK0TFRh/zjJiTDI9+UOeD0COK3+XpWrEhvB8fuYkE aFpc5/wKRVX/oUpcGYx85g/4WxCuga5jXXlb5r8fIXHxxp4Qyeo2wV1qon6ncKtj yV0EYDMSv32ksYOboOZfsqQJML4bD3eNSTHv7fkqvvePYcLzulG2DhqGNqA47fTR uDi/48CdLn7bmT+Ms5ikzAfQtDouZg8g1vMN9GxReFrer3BZBurPUbQhOQju58dp M3xVvbPb2vVKo0iLuYvZdwIae5mxhqB0ig2jzchbqPTM+MS6LpYmiBb5hr/ZO7J7 9lWr5SLE9SjsGyCOTAB/V3fSSuBk/AOvmNwMV6B0RLChHDVjCag4olMmYuQMglOn 3X87LVk8jdQU7zA89chVp0h/rKl/4G4HKoDxmYoijBRRJPhuBvuymSz9sOO3urHM Wey7GQ/FtRKQ3LbxLjxNvfdlU6fPlR/ag3YfZ9NszuCaru4p6iAg4+1J2Llz4CUT G0QbZRON71R6BR/czk6o =sp/v -----END PGP SIGNATURE----- Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Keystone DTS updates for 3.15 from Santosh Shilimkar: - Add watchdog timer, timer64 and gpio device nodes - Add LED device nodes - Fixes for debugss, msmc clock nodes - Add support for Keystone Lamarr and Edision SOC/EVM support - Add NAND and AEMIF device nodes * tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone: add AEMIF/NAND device entry ARM: dts: keystone: add support for k2 Edison SoC and EVM ARM: dts: keystone: add support for K2 Lamarr SoC and EVM ARM: dts: keystone: preparatory patch to support K2L and K2E SOCs ARM: dts: keystone: update for supporting K2L/K2E EVMs ARM: dts: keystone: fix domain id for clkdebugsstrc ARM: dts: keystone: drop msmcsram clock node ARM: dts: k2hk-evm: rename clock node to clocks ARM: dts: k2hk-evm: add leds supports ARM: dts: keystone: add gpio device entry ARM: dts: keystone: add keystone timer entry ARM: dts: keystone: add watchdog entry Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
6e4b9bfd62
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@ -8,3 +8,13 @@ Required properties:
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- compatible: All TI specific devices present in Keystone SOC should be in
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the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
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type UART should use the specified compatible for those devices.
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Boards:
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||||
- Keystone 2 Hawking/Kepler EVM
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compatible = "ti,k2hk-evm"
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- Keystone 2 Lamarr EVM
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compatible = "ti,k2l-evm"
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- Keystone 2 Edison EVM
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compatible = "ti,k2e-evm"
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@ -0,0 +1,78 @@
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/*
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* Copyright 2014 Texas Instruments, Inc.
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*
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* Keystone 2 Edison SoC specific device tree
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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clocks {
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mainpllclk: mainpllclk@2310110 {
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#clock-cells = <0>;
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compatible = "ti,keystone,main-pll-clock";
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clocks = <&refclksys>;
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reg = <0x02620350 4>, <0x02310110 4>;
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reg-names = "control", "multiplier";
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fixed-postdiv = <2>;
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};
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papllclk: papllclk@2620358 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkpass>;
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clock-output-names = "pa-pll-clk";
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reg = <0x02620358 4>;
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reg-names = "control";
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};
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ddr3apllclk: ddr3apllclk@2620360 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkddr3a>;
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clock-output-names = "ddr-3a-pll-clk";
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reg = <0x02620360 4>;
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reg-names = "control";
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};
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clkusb1: clkusb1 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "usb";
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reg = <0x02350004 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkhyperlink0: clkhyperlink0 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "hyperlink-0";
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reg = <0x02350030 0xb00>, <0x02350014 0x400>;
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reg-names = "control", "domain";
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domain-id = <5>;
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};
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clkpcie1: clkpcie1 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "pcie";
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reg = <0x0235006c 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <18>;
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};
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clkxge: clkxge {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk13>;
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clock-output-names = "xge";
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reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
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reg-names = "control", "domain";
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domain-id = <29>;
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};
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};
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@ -0,0 +1,60 @@
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/*
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* Copyright 2013-2014 Texas Instruments, Inc.
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*
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* Keystone 2 Edison EVM device tree
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "keystone.dtsi"
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#include "k2e.dtsi"
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/ {
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compatible = "ti,k2e-evm";
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model = "Texas Instruments Keystone 2 Edison EVM";
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soc {
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clocks {
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refclksys: refclksys {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-sys";
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};
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refclkpass: refclkpass {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-pass";
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};
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refclkddr3a: refclkddr3a {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-ddr3a";
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};
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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@ -0,0 +1,80 @@
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/*
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* Copyright 2013-2014 Texas Instruments, Inc.
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*
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* Keystone 2 Edison soc device tree
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&gic>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <1>;
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};
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cpu@2 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <2>;
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};
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cpu@3 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <3>;
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};
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};
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soc {
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/include/ "k2e-clocks.dtsi"
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usb: usb@2680000 {
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interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
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dwc3@2690000 {
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interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
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};
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};
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usb1_phy: usb_phy@2620750 {
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compatible = "ti,keystone-usbphy";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2620750 24>;
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status = "disabled";
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};
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usb1: usb@25000000 {
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compatible = "ti,keystone-dwc3";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x25000000 0x10000>;
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clocks = <&clkusb1>;
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clock-names = "usb";
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interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
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ranges;
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status = "disabled";
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dwc3@25010000 {
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compatible = "synopsys,dwc3";
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reg = <0x25010000 0x70000>;
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interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
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usb-phy = <&usb1_phy>, <&usb1_phy>;
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};
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};
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};
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};
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@ -0,0 +1,426 @@
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/*
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* Copyright 2013-2014 Texas Instruments, Inc.
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*
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* Keystone 2 Kepler/Hawking SoC clock nodes
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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clocks {
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armpllclk: armpllclk@2620370 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkarm>;
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clock-output-names = "arm-pll-clk";
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reg = <0x02620370 4>;
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reg-names = "control";
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};
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mainpllclk: mainpllclk@2310110 {
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#clock-cells = <0>;
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compatible = "ti,keystone,main-pll-clock";
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clocks = <&refclksys>;
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reg = <0x02620350 4>, <0x02310110 4>;
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reg-names = "control", "multiplier";
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fixed-postdiv = <2>;
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};
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papllclk: papllclk@2620358 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkpass>;
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clock-output-names = "pa-pll-clk";
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reg = <0x02620358 4>;
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reg-names = "control";
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};
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ddr3apllclk: ddr3apllclk@2620360 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkddr3a>;
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clock-output-names = "ddr-3a-pll-clk";
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reg = <0x02620360 4>;
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reg-names = "control";
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};
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ddr3bpllclk: ddr3bpllclk@2620368 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkddr3b>;
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clock-output-names = "ddr-3b-pll-clk";
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reg = <0x02620368 4>;
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reg-names = "control";
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};
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clktsip: clktsip {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "tsip";
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reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clksrio: clksrio {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk1rstiso13>;
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clock-output-names = "srio";
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reg = <0x0235002c 0xb00>, <0x02350010 0x400>;
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reg-names = "control", "domain";
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domain-id = <4>;
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};
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clkhyperlink0: clkhyperlink0 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "hyperlink-0";
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reg = <0x02350030 0xb00>, <0x02350014 0x400>;
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reg-names = "control", "domain";
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domain-id = <5>;
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};
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|
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clkgem1: clkgem1 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk1>;
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clock-output-names = "gem1";
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reg = <0x02350040 0xb00>, <0x02350024 0x400>;
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reg-names = "control", "domain";
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domain-id = <9>;
|
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};
|
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|
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clkgem2: clkgem2 {
|
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#clock-cells = <0>;
|
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compatible = "ti,keystone,psc-clock";
|
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clocks = <&chipclk1>;
|
||||
clock-output-names = "gem2";
|
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reg = <0x02350044 0xb00>, <0x02350028 0x400>;
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reg-names = "control", "domain";
|
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domain-id = <10>;
|
||||
};
|
||||
|
||||
clkgem3: clkgem3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem3";
|
||||
reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <11>;
|
||||
};
|
||||
|
||||
clkgem4: clkgem4 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem4";
|
||||
reg = <0x0235004c 0xb00>, <0x02350030 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <12>;
|
||||
};
|
||||
|
||||
clkgem5: clkgem5 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem5";
|
||||
reg = <0x02350050 0xb00>, <0x02350034 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <13>;
|
||||
};
|
||||
|
||||
clkgem6: clkgem6 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem6";
|
||||
reg = <0x02350054 0xb00>, <0x02350038 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <14>;
|
||||
};
|
||||
|
||||
clkgem7: clkgem7 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem7";
|
||||
reg = <0x02350058 0xb00>, <0x0235003c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <15>;
|
||||
};
|
||||
|
||||
clkddr31: clkddr31 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "ddr3-1";
|
||||
reg = <0x02350060 0xb00>, <0x02350040 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <16>;
|
||||
};
|
||||
|
||||
clktac: clktac {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tac";
|
||||
reg = <0x02350064 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <17>;
|
||||
};
|
||||
|
||||
clkrac01: clkrac01 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "rac-01";
|
||||
reg = <0x02350068 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <17>;
|
||||
};
|
||||
|
||||
clkrac23: clkrac23 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "rac-23";
|
||||
reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <18>;
|
||||
};
|
||||
|
||||
clkfftc0: clkfftc0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-0";
|
||||
reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <19>;
|
||||
};
|
||||
|
||||
clkfftc1: clkfftc1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-1";
|
||||
reg = <0x02350074 0xb00>, <0x023504c0 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <19>;
|
||||
};
|
||||
|
||||
clkfftc2: clkfftc2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-2";
|
||||
reg = <0x02350078 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkfftc3: clkfftc3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-3";
|
||||
reg = <0x0235007c 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkfftc4: clkfftc4 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-4";
|
||||
reg = <0x02350080 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkfftc5: clkfftc5 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-5";
|
||||
reg = <0x02350084 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkaif: clkaif {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "aif";
|
||||
reg = <0x02350088 0xb00>, <0x02350054 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <21>;
|
||||
};
|
||||
|
||||
clktcp3d0: clktcp3d0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-0";
|
||||
reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <22>;
|
||||
};
|
||||
|
||||
clktcp3d1: clktcp3d1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-1";
|
||||
reg = <0x02350090 0xb00>, <0x02350058 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <22>;
|
||||
};
|
||||
|
||||
clktcp3d2: clktcp3d2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-2";
|
||||
reg = <0x02350094 0xb00>, <0x0235005c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <23>;
|
||||
};
|
||||
|
||||
clktcp3d3: clktcp3d3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-3";
|
||||
reg = <0x02350098 0xb00>, <0x0235005c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <23>;
|
||||
};
|
||||
|
||||
clkvcp0: clkvcp0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-0";
|
||||
reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp1: clkvcp1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-1";
|
||||
reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp2: clkvcp2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-2";
|
||||
reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp3: clkvcp3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-3";
|
||||
reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp4: clkvcp4 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-4";
|
||||
reg = <0x023500ac 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkvcp5: clkvcp5 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-5";
|
||||
reg = <0x023500b0 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkvcp6: clkvcp6 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-6";
|
||||
reg = <0x023500b4 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkvcp7: clkvcp7 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-7";
|
||||
reg = <0x023500b8 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkbcp: clkbcp {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "bcp";
|
||||
reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <26>;
|
||||
};
|
||||
|
||||
clkdxb: clkdxb {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "dxb";
|
||||
reg = <0x023500c0 0xb00>, <0x0235006c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <27>;
|
||||
};
|
||||
|
||||
clkhyperlink1: clkhyperlink1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk12>;
|
||||
clock-output-names = "hyperlink-1";
|
||||
reg = <0x023500c4 0xb00>, <0x02350070 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <28>;
|
||||
};
|
||||
|
||||
clkxge: clkxge {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "xge";
|
||||
reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <29>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright 2013 Texas Instruments, Inc.
|
||||
* Copyright 2013-2014 Texas Instruments, Inc.
|
||||
*
|
||||
* Keystone 2 Kepler/Hawking EVM device tree
|
||||
*
|
||||
|
|
@ -10,12 +10,14 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "keystone.dtsi"
|
||||
#include "k2hk.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,keystone-evm";
|
||||
compatible = "ti,k2hk-evm";
|
||||
model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
|
||||
|
||||
soc {
|
||||
clock {
|
||||
clocks {
|
||||
refclksys: refclksys {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
|
|
@ -52,6 +54,29 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
debug1_1 {
|
||||
label = "keystone:green:debug1";
|
||||
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
|
||||
};
|
||||
|
||||
debug1_2 {
|
||||
label = "keystone:red:debug1";
|
||||
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
|
||||
};
|
||||
|
||||
debug2 {
|
||||
label = "keystone:blue:debug2";
|
||||
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
|
||||
};
|
||||
|
||||
debug3 {
|
||||
label = "keystone:blue:debug3";
|
||||
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
|
|
@ -61,3 +86,55 @@
|
|||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aemif {
|
||||
cs0 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
clock-ranges;
|
||||
ranges;
|
||||
|
||||
ti,cs-chipselect = <0>;
|
||||
/* all timings in nanoseconds */
|
||||
ti,cs-min-turnaround-ns = <12>;
|
||||
ti,cs-read-hold-ns = <6>;
|
||||
ti,cs-read-strobe-ns = <23>;
|
||||
ti,cs-read-setup-ns = <9>;
|
||||
ti,cs-write-hold-ns = <8>;
|
||||
ti,cs-write-strobe-ns = <23>;
|
||||
ti,cs-write-setup-ns = <8>;
|
||||
|
||||
nand@0,0 {
|
||||
compatible = "ti,keystone-nand","ti,davinci-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0 0 0x4000000
|
||||
1 0 0x0000100>;
|
||||
|
||||
ti,davinci-chipselect = <0>;
|
||||
ti,davinci-mask-ale = <0x2000>;
|
||||
ti,davinci-mask-cle = <0x4000>;
|
||||
ti,davinci-mask-chipsel = <0>;
|
||||
nand-ecc-mode = "hw";
|
||||
ti,davinci-ecc-bits = <4>;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "params";
|
||||
reg = <0x100000 0x80000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
label = "ubifs";
|
||||
reg = <0x180000 0x7E80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* Copyright 2013-2014 Texas Instruments, Inc.
|
||||
*
|
||||
* Keystone 2 Kepler/Hawking soc specific device tree
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
/include/ "k2hk-clocks.dtsi"
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,267 @@
|
|||
/*
|
||||
* Copyright 2013-2014 Texas Instruments, Inc.
|
||||
*
|
||||
* Keystone 2 lamarr SoC clock nodes
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
clocks {
|
||||
armpllclk: armpllclk@2620370 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclksys>;
|
||||
clock-output-names = "arm-pll-clk";
|
||||
reg = <0x02620370 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
mainpllclk: mainpllclk@2310110 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,main-pll-clock";
|
||||
clocks = <&refclksys>;
|
||||
reg = <0x02620350 4>, <0x02310110 4>;
|
||||
reg-names = "control", "multiplier";
|
||||
fixed-postdiv = <2>;
|
||||
};
|
||||
|
||||
papllclk: papllclk@2620358 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclksys>;
|
||||
clock-output-names = "pa-pll-clk";
|
||||
reg = <0x02620358 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
ddr3apllclk: ddr3apllclk@2620360 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclksys>;
|
||||
clock-output-names = "ddr-3a-pll-clk";
|
||||
reg = <0x02620360 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
clkdfeiqnsys: clkdfeiqnsys {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk12>;
|
||||
clock-output-names = "dfe";
|
||||
reg-names = "control", "domain";
|
||||
reg = <0x02350004 0xb00>, <0x02350000 0x400>;
|
||||
domain-id = <0>;
|
||||
};
|
||||
|
||||
clkpcie1: clkpcie1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk12>;
|
||||
clock-output-names = "pcie";
|
||||
reg = <0x0235002c 0xb00>, <0x02350000 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <4>;
|
||||
};
|
||||
|
||||
clkgem1: clkgem1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem1";
|
||||
reg = <0x02350040 0xb00>, <0x02350024 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <9>;
|
||||
};
|
||||
|
||||
clkgem2: clkgem2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem2";
|
||||
reg = <0x02350044 0xb00>, <0x02350028 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <10>;
|
||||
};
|
||||
|
||||
clkgem3: clkgem3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem3";
|
||||
reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <11>;
|
||||
};
|
||||
|
||||
clktac: clktac {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tac";
|
||||
reg = <0x02350064 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <17>;
|
||||
};
|
||||
|
||||
clkrac: clkrac {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "rac";
|
||||
reg = <0x02350068 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <17>;
|
||||
};
|
||||
|
||||
clkdfepd0: clkdfepd0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "dfe-pd0";
|
||||
reg = <0x0235006c 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <18>;
|
||||
};
|
||||
|
||||
clkfftc0: clkfftc0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-0";
|
||||
reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <19>;
|
||||
};
|
||||
|
||||
clkosr: clkosr {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "osr";
|
||||
reg = <0x02350088 0xb00>, <0x0235004c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <21>;
|
||||
};
|
||||
|
||||
clktcp3d0: clktcp3d0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-0";
|
||||
reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <22>;
|
||||
};
|
||||
|
||||
clktcp3d1: clktcp3d1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-1";
|
||||
reg = <0x02350094 0xb00>, <0x02350058 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <23>;
|
||||
};
|
||||
|
||||
clkvcp0: clkvcp0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-0";
|
||||
reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp1: clkvcp1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-1";
|
||||
reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp2: clkvcp2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-2";
|
||||
reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp3: clkvcp3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-3";
|
||||
reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkbcp: clkbcp {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "bcp";
|
||||
reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <26>;
|
||||
};
|
||||
|
||||
clkdfepd1: clkdfepd1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "dfe-pd1";
|
||||
reg = <0x023500c0 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <27>;
|
||||
};
|
||||
|
||||
clkfftc1: clkfftc1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-1";
|
||||
reg = <0x023500c4 0xb00>, <0x023504c0 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <28>;
|
||||
};
|
||||
|
||||
clkiqnail: clkiqnail {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "iqn-ail";
|
||||
reg = <0x023500c8 0xb00>, <0x0235004c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <29>;
|
||||
};
|
||||
|
||||
clkuart2: clkuart2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&clkmodrst0>;
|
||||
clock-output-names = "uart2";
|
||||
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <0>;
|
||||
};
|
||||
|
||||
clkuart3: clkuart3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&clkmodrst0>;
|
||||
clock-output-names = "uart3";
|
||||
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright 2014 Texas Instruments, Inc.
|
||||
*
|
||||
* Keystone 2 Lamarr EVM device tree
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "keystone.dtsi"
|
||||
#include "k2l.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,k2l-evm";
|
||||
model = "Texas Instruments Keystone 2 Lamarr EVM";
|
||||
|
||||
soc {
|
||||
clocks {
|
||||
refclksys: refclksys {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <122880000>;
|
||||
clock-output-names = "refclk-sys";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
/*
|
||||
* Copyright 2014 Texas Instruments, Inc.
|
||||
*
|
||||
* Keystone 2 Lamarr SoC specific device tree
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
|
||||
/include/ "k2l-clocks.dtsi"
|
||||
|
||||
uart2: serial@02348400 {
|
||||
compatible = "ns16550a";
|
||||
current-speed = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
reg = <0x02348400 0x100>;
|
||||
clocks = <&clkuart2>;
|
||||
interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
uart3: serial@02348800 {
|
||||
compatible = "ns16550a";
|
||||
current-speed = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
reg = <0x02348800 0x100>;
|
||||
clocks = <&clkuart3>;
|
||||
interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -13,51 +13,6 @@ clocks {
|
|||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
mainpllclk: mainpllclk@2310110 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,main-pll-clock";
|
||||
clocks = <&refclksys>;
|
||||
reg = <0x02620350 4>, <0x02310110 4>;
|
||||
reg-names = "control", "multiplier";
|
||||
fixed-postdiv = <2>;
|
||||
};
|
||||
|
||||
papllclk: papllclk@2620358 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclkpass>;
|
||||
clock-output-names = "pa-pll-clk";
|
||||
reg = <0x02620358 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
ddr3apllclk: ddr3apllclk@2620360 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclkddr3a>;
|
||||
clock-output-names = "ddr-3a-pll-clk";
|
||||
reg = <0x02620360 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
ddr3bpllclk: ddr3bpllclk@2620368 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclkddr3b>;
|
||||
clock-output-names = "ddr-3b-pll-clk";
|
||||
reg = <0x02620368 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
armpllclk: armpllclk@2620370 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-clock";
|
||||
clocks = <&refclkarm>;
|
||||
clock-output-names = "arm-pll-clk";
|
||||
reg = <0x02620370 4>;
|
||||
reg-names = "control";
|
||||
};
|
||||
|
||||
mainmuxclk: mainmuxclk@2310108 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,pll-mux-clock";
|
||||
|
|
@ -244,7 +199,7 @@ clocks {
|
|||
clock-output-names = "debugss-trc";
|
||||
reg = <0x02350014 0xb00>, <0x02350000 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <0>;
|
||||
domain-id = <1>;
|
||||
};
|
||||
|
||||
clktetbtrc: clktetbtrc {
|
||||
|
|
@ -297,26 +252,6 @@ clocks {
|
|||
domain-id = <3>;
|
||||
};
|
||||
|
||||
clksrio: clksrio {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1rstiso13>;
|
||||
clock-output-names = "srio";
|
||||
reg = <0x0235002c 0xb00>, <0x02350010 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <4>;
|
||||
};
|
||||
|
||||
clkhyperlink0: clkhyperlink0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk12>;
|
||||
clock-output-names = "hyperlink-0";
|
||||
reg = <0x02350030 0xb00>, <0x02350014 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <5>;
|
||||
};
|
||||
|
||||
clksr: clksr {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
|
|
@ -327,16 +262,6 @@ clocks {
|
|||
domain-id = <6>;
|
||||
};
|
||||
|
||||
clkmsmcsram: clkmsmcsram {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "msmcsram";
|
||||
reg = <0x02350038 0xb00>, <0x0235001c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <7>;
|
||||
};
|
||||
|
||||
clkgem0: clkgem0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
|
|
@ -347,76 +272,6 @@ clocks {
|
|||
domain-id = <8>;
|
||||
};
|
||||
|
||||
clkgem1: clkgem1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem1";
|
||||
reg = <0x02350040 0xb00>, <0x02350024 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <9>;
|
||||
};
|
||||
|
||||
clkgem2: clkgem2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem2";
|
||||
reg = <0x02350044 0xb00>, <0x02350028 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <10>;
|
||||
};
|
||||
|
||||
clkgem3: clkgem3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem3";
|
||||
reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <11>;
|
||||
};
|
||||
|
||||
clkgem4: clkgem4 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem4";
|
||||
reg = <0x0235004c 0xb00>, <0x02350030 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <12>;
|
||||
};
|
||||
|
||||
clkgem5: clkgem5 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem5";
|
||||
reg = <0x02350050 0xb00>, <0x02350034 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <13>;
|
||||
};
|
||||
|
||||
clkgem6: clkgem6 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem6";
|
||||
reg = <0x02350054 0xb00>, <0x02350038 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <14>;
|
||||
};
|
||||
|
||||
clkgem7: clkgem7 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk1>;
|
||||
clock-output-names = "gem7";
|
||||
reg = <0x02350058 0xb00>, <0x0235003c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <15>;
|
||||
};
|
||||
|
||||
clkddr30: clkddr30 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
|
|
@ -427,276 +282,6 @@ clocks {
|
|||
domain-id = <16>;
|
||||
};
|
||||
|
||||
clkddr31: clkddr31 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "ddr3-1";
|
||||
reg = <0x02350060 0xb00>, <0x02350040 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <16>;
|
||||
};
|
||||
|
||||
clktac: clktac {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tac";
|
||||
reg = <0x02350064 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <17>;
|
||||
};
|
||||
|
||||
clkrac01: clktac01 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "rac-01";
|
||||
reg = <0x02350068 0xb00>, <0x02350044 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <17>;
|
||||
};
|
||||
|
||||
clkrac23: clktac23 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "rac-23";
|
||||
reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <18>;
|
||||
};
|
||||
|
||||
clkfftc0: clkfftc0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-0";
|
||||
reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <19>;
|
||||
};
|
||||
|
||||
clkfftc1: clkfftc1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-1";
|
||||
reg = <0x02350074 0xb00>, <0x023504c0 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <19>;
|
||||
};
|
||||
|
||||
clkfftc2: clkfftc2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-2";
|
||||
reg = <0x02350078 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkfftc3: clkfftc3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-3";
|
||||
reg = <0x0235007c 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkfftc4: clkfftc4 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-4";
|
||||
reg = <0x02350080 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkfftc5: clkfftc5 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "fftc-5";
|
||||
reg = <0x02350084 0xb00>, <0x02350050 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <20>;
|
||||
};
|
||||
|
||||
clkaif: clkaif {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "aif";
|
||||
reg = <0x02350088 0xb00>, <0x02350054 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <21>;
|
||||
};
|
||||
|
||||
clktcp3d0: clktcp3d0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-0";
|
||||
reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <22>;
|
||||
};
|
||||
|
||||
clktcp3d1: clktcp3d1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-1";
|
||||
reg = <0x02350090 0xb00>, <0x02350058 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <22>;
|
||||
};
|
||||
|
||||
clktcp3d2: clktcp3d2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-2";
|
||||
reg = <0x02350094 0xb00>, <0x0235005c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <23>;
|
||||
};
|
||||
|
||||
clktcp3d3: clktcp3d3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "tcp3d-3";
|
||||
reg = <0x02350098 0xb00>, <0x0235005c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <23>;
|
||||
};
|
||||
|
||||
clkvcp0: clkvcp0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-0";
|
||||
reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp1: clkvcp1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-1";
|
||||
reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp2: clkvcp2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-2";
|
||||
reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp3: clkvcp3 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-3";
|
||||
reg = <0x0235000a8 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
||||
clkvcp4: clkvcp4 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-4";
|
||||
reg = <0x023500ac 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkvcp5: clkvcp5 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-5";
|
||||
reg = <0x023500b0 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkvcp6: clkvcp6 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-6";
|
||||
reg = <0x023500b4 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkvcp7: clkvcp7 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-7";
|
||||
reg = <0x023500b8 0xb00>, <0x02350064 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <25>;
|
||||
};
|
||||
|
||||
clkbcp: clkbcp {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "bcp";
|
||||
reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <26>;
|
||||
};
|
||||
|
||||
clkdxb: clkdxb {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "dxb";
|
||||
reg = <0x023500c0 0xb00>, <0x0235006c 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <27>;
|
||||
};
|
||||
|
||||
clkhyperlink1: clkhyperlink1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk12>;
|
||||
clock-output-names = "hyperlink-1";
|
||||
reg = <0x023500c4 0xb00>, <0x02350070 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <28>;
|
||||
};
|
||||
|
||||
clkxge: clkxge {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "xge";
|
||||
reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <29>;
|
||||
};
|
||||
|
||||
clkwdtimer0: clkwdtimer0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
|
|
@ -737,6 +322,16 @@ clocks {
|
|||
domain-id = <0>;
|
||||
};
|
||||
|
||||
clktimer15: clktimer15 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&clkmodrst0>;
|
||||
clock-output-names = "timer15";
|
||||
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <0>;
|
||||
};
|
||||
|
||||
clkuart0: clkuart0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,keystone,psc-clock";
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
|
|
@ -24,37 +25,6 @@
|
|||
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller {
|
||||
compatible = "arm,cortex-a15-gic";
|
||||
#interrupt-cells = <3>;
|
||||
|
|
@ -208,5 +178,75 @@
|
|||
usb-phy = <&usb_phy>, <&usb_phy>;
|
||||
};
|
||||
};
|
||||
|
||||
wdt: wdt@022f0080 {
|
||||
compatible = "ti,keystone-wdt","ti,davinci-wdt";
|
||||
reg = <0x022f0080 0x80>;
|
||||
clocks = <&clkwdtimer0>;
|
||||
};
|
||||
|
||||
clock_event: timer@22f0000 {
|
||||
compatible = "ti,keystone-timer";
|
||||
reg = <0x022f0000 0x80>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clktimer15>;
|
||||
};
|
||||
|
||||
gpio0: gpio@260bf00 {
|
||||
compatible = "ti,keystone-gpio";
|
||||
reg = <0x0260bf00 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
/* HW Interrupts mapped to GPIO pins */
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clkgpio>;
|
||||
clock-names = "gpio";
|
||||
ti,ngpio = <32>;
|
||||
ti,davinci-gpio-unbanked = <32>;
|
||||
};
|
||||
|
||||
aemif: aemif@21000A00 {
|
||||
compatible = "ti,keystone-aemif", "ti,davinci-aemif";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clkaemif>;
|
||||
clock-names = "aemif";
|
||||
clock-ranges;
|
||||
|
||||
reg = <0x21000A00 0x00000100>;
|
||||
ranges = <0 0 0x30000000 0x10000000
|
||||
1 0 0x21000A00 0x00000100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -47,6 +47,9 @@ static void __init keystone_init(void)
|
|||
|
||||
static const char *keystone_match[] __initconst = {
|
||||
"ti,keystone-evm",
|
||||
"ti,k2hk-evm",
|
||||
"ti,k2l-evm",
|
||||
"ti,k2e-evm",
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче