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ASoC: tlv320aic31xx: Add divs for bclk as clk_in 

Add divisors for rates needed when the clk_in is set to BCLK.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Link: https://lore.kernel.org/r/20211119153248.419802-4-ariel.dalessandro@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Ariel D'Alessandro 2021-11-19 12:32:46 -03:00 коммит произвёл Mark Brown
Родитель 2664b24a8c
Коммит 6e6752a9c7
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Идентификатор ключа GPG: 24D68B725D5487D0
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sound/soc/codecs/tlv320aic31xx.c
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@ -195,46 +195,66 @@ struct aic31xx_rate_divs {
static const struct aic31xx_rate_divs aic31xx_divs[] = {
/* mclk/p rate pll: r j d dosr ndac mdac aors nadc madc */
/* 8k rate */
{ 512000, 8000, 4, 48, 0, 128, 48, 2, 128, 48, 2},
{12000000, 8000, 1, 8, 1920, 128, 48, 2, 128, 48, 2},
{12000000, 8000, 1, 8, 1920, 128, 32, 3, 128, 32, 3},
{12500000, 8000, 1, 7, 8643, 128, 48, 2, 128, 48, 2},
/* 11.025k rate */
{ 705600, 11025, 3, 48, 0, 128, 24, 3, 128, 24, 3},
{12000000, 11025, 1, 7, 5264, 128, 32, 2, 128, 32, 2},
{12000000, 11025, 1, 8, 4672, 128, 24, 3, 128, 24, 3},
{12500000, 11025, 1, 7, 2253, 128, 32, 2, 128, 32, 2},
/* 16k rate */
{ 512000, 16000, 4, 48, 0, 128, 16, 3, 128, 16, 3},
{ 1024000, 16000, 2, 48, 0, 128, 16, 3, 128, 16, 3},
{12000000, 16000, 1, 8, 1920, 128, 24, 2, 128, 24, 2},
{12000000, 16000, 1, 8, 1920, 128, 16, 3, 128, 16, 3},
{12500000, 16000, 1, 7, 8643, 128, 24, 2, 128, 24, 2},
/* 22.05k rate */
{ 705600, 22050, 4, 36, 0, 128, 12, 3, 128, 12, 3},
{ 1411200, 22050, 2, 36, 0, 128, 12, 3, 128, 12, 3},
{12000000, 22050, 1, 7, 5264, 128, 16, 2, 128, 16, 2},
{12000000, 22050, 1, 8, 4672, 128, 12, 3, 128, 12, 3},
{12500000, 22050, 1, 7, 2253, 128, 16, 2, 128, 16, 2},
/* 32k rate */
{ 1024000, 32000, 2, 48, 0, 128, 12, 2, 128, 12, 2},
{ 2048000, 32000, 1, 48, 0, 128, 12, 2, 128, 12, 2},
{12000000, 32000, 1, 8, 1920, 128, 12, 2, 128, 12, 2},
{12000000, 32000, 1, 8, 1920, 128, 8, 3, 128, 8, 3},
{12500000, 32000, 1, 7, 8643, 128, 12, 2, 128, 12, 2},
/* 44.1k rate */
{ 1411200, 44100, 2, 32, 0, 128, 8, 2, 128, 8, 2},
{ 2822400, 44100, 1, 32, 0, 128, 8, 2, 128, 8, 2},
{12000000, 44100, 1, 7, 5264, 128, 8, 2, 128, 8, 2},
{12000000, 44100, 1, 8, 4672, 128, 6, 3, 128, 6, 3},
{12500000, 44100, 1, 7, 2253, 128, 8, 2, 128, 8, 2},
/* 48k rate */
{ 1536000, 48000, 2, 32, 0, 128, 8, 2, 128, 8, 2},
{ 3072000, 48000, 1, 32, 0, 128, 8, 2, 128, 8, 2},
{12000000, 48000, 1, 8, 1920, 128, 8, 2, 128, 8, 2},
{12000000, 48000, 1, 7, 6800, 96, 5, 4, 96, 5, 4},
{12500000, 48000, 1, 7, 8643, 128, 8, 2, 128, 8, 2},
/* 88.2k rate */
{ 2822400, 88200, 2, 16, 0, 64, 8, 2, 64, 8, 2},
{ 5644800, 88200, 1, 16, 0, 64, 8, 2, 64, 8, 2},
{12000000, 88200, 1, 7, 5264, 64, 8, 2, 64, 8, 2},
{12000000, 88200, 1, 8, 4672, 64, 6, 3, 64, 6, 3},
{12500000, 88200, 1, 7, 2253, 64, 8, 2, 64, 8, 2},
/* 96k rate */
{ 3072000, 96000, 2, 16, 0, 64, 8, 2, 64, 8, 2},
{ 6144000, 96000, 1, 16, 0, 64, 8, 2, 64, 8, 2},
{12000000, 96000, 1, 8, 1920, 64, 8, 2, 64, 8, 2},
{12000000, 96000, 1, 7, 6800, 48, 5, 4, 48, 5, 4},
{12500000, 96000, 1, 7, 8643, 64, 8, 2, 64, 8, 2},
/* 176.4k rate */
{ 5644800, 176400, 2, 8, 0, 32, 8, 2, 32, 8, 2},
{11289600, 176400, 1, 8, 0, 32, 8, 2, 32, 8, 2},
{12000000, 176400, 1, 7, 5264, 32, 8, 2, 32, 8, 2},
{12000000, 176400, 1, 8, 4672, 32, 6, 3, 32, 6, 3},
{12500000, 176400, 1, 7, 2253, 32, 8, 2, 32, 8, 2},
/* 192k rate */
{ 6144000, 192000, 2, 8, 0, 32, 8, 2, 32, 8, 2},
{12288000, 192000, 1, 8, 0, 32, 8, 2, 32, 8, 2},
{12000000, 192000, 1, 8, 1920, 32, 8, 2, 32, 8, 2},
{12000000, 192000, 1, 7, 6800, 24, 5, 4, 24, 5, 4},
{12500000, 192000, 1, 7, 8643, 32, 8, 2, 32, 8, 2},