Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Nothing major, one core oops fixes, some radeon oops fixes, some sti driver fixups, msm driver fixes and a minor Kconfig update for the ww mutex debugging" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/ast: Add missing entry to dclk_table[] drm: fix division-by-zero on dumb_create() ww-mutex: clarify help text for DEBUG_WW_MUTEX_SLOWPATH radeon: Test for PCI root bus before assuming bus->self drm/radeon: handle broken disabled rb mask gracefully (6xx/7xx) (v2) drm/radeon: save/restore the PD addr on suspend/resume drm/msm: Fix missing unlock on error in msm_fbdev_create() drm/msm: fix compile error for non-dt builds drm/msm/mdp4: request vblank during modeset drm/msm: avoid flood of kernel logs on faults drm: sti: Add missing dependency on RESET_CONTROLLER drm: sti: Make of_device_id array const drm: sti: Fix return value check in sti_drm_platform_probe() drm: sti: hda: fix return value check in sti_hda_probe() drm: sti: hdmi: fix return value check in sti_hdmi_probe() drm: sti: tvout: fix return value check in sti_tvout_probe()
This commit is contained in:
Коммит
6e8f7b09e4
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@ -99,6 +99,7 @@ static struct ast_vbios_dclk_info dclk_table[] = {
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{0x25, 0x65, 0x80}, /* 16: VCLK88.75 */
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{0x77, 0x58, 0x80}, /* 17: VCLK119 */
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{0x32, 0x67, 0x80}, /* 18: VCLK85_5 */
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{0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */
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};
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static struct ast_vbios_stdtable vbios_stdtable[] = {
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@ -4696,8 +4696,9 @@ int drm_mode_create_dumb_ioctl(struct drm_device *dev,
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return -EINVAL;
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/* overflow checks for 32bit size calculations */
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/* NOTE: DIV_ROUND_UP() can overflow */
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cpp = DIV_ROUND_UP(args->bpp, 8);
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if (cpp > 0xffffffffU / args->width)
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if (!cpp || cpp > 0xffffffffU / args->width)
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return -EINVAL;
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stride = cpp * args->width;
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if (args->height > 0xffffffffU / stride)
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@ -397,6 +397,7 @@ static void mdp4_crtc_prepare(struct drm_crtc *crtc)
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struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
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DBG("%s", mdp4_crtc->name);
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/* make sure we hold a ref to mdp clks while setting up mode: */
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drm_crtc_vblank_get(crtc);
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mdp4_enable(get_kms(crtc));
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mdp4_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
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}
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@ -407,6 +408,7 @@ static void mdp4_crtc_commit(struct drm_crtc *crtc)
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crtc_flush(crtc);
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/* drop the ref to mdp clk's that we got in prepare: */
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mdp4_disable(get_kms(crtc));
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drm_crtc_vblank_put(crtc);
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}
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static int mdp4_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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@ -974,12 +974,11 @@ static int msm_pdev_probe(struct platform_device *pdev)
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for (i = 0; i < ARRAY_SIZE(devnames); i++) {
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struct device *dev;
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int ret;
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dev = bus_find_device_by_name(&platform_bus_type,
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NULL, devnames[i]);
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if (!dev) {
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dev_info(master, "still waiting for %s\n", devnames[i]);
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dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]);
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return -EPROBE_DEFER;
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}
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@ -143,7 +143,7 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
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ret = msm_gem_get_iova_locked(fbdev->bo, 0, &paddr);
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if (ret) {
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dev_err(dev->dev, "failed to get buffer obj iova: %d\n", ret);
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goto fail;
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goto fail_unlock;
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}
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fbi = framebuffer_alloc(0, dev->dev);
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@ -27,8 +27,8 @@ struct msm_iommu {
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static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev,
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unsigned long iova, int flags, void *arg)
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{
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DBG("*** fault: iova=%08lx, flags=%d", iova, flags);
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return -ENOSYS;
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pr_warn_ratelimited("*** fault: iova=%08lx, flags=%d\n", iova, flags);
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return 0;
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}
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static int msm_iommu_attach(struct msm_mmu *mmu, const char **names, int cnt)
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@ -5749,20 +5749,17 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(0x15D8, 0);
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WREG32(0x15DC, 0);
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/* empty context1-15 */
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/* FIXME start with 4G, once using 2 level pt switch to full
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* vm size space
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*/
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/* restore context1-15 */
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/* set vm size, must be a multiple of 4 */
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WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
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WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn);
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for (i = 1; i < 16; i++) {
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if (i < 8)
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
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rdev->gart.table_addr >> 12);
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rdev->vm_manager.saved_table_addr[i]);
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else
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WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2),
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rdev->gart.table_addr >> 12);
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rdev->vm_manager.saved_table_addr[i]);
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}
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/* enable context1-15 */
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@ -5827,6 +5824,17 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
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*/
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static void cik_pcie_gart_disable(struct radeon_device *rdev)
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{
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unsigned i;
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for (i = 1; i < 16; ++i) {
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uint32_t reg;
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if (i < 8)
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reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2);
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else
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reg = VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2);
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rdev->vm_manager.saved_table_addr[i] = RREG32(reg);
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}
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/* Disable all tables */
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WREG32(VM_CONTEXT0_CNTL, 0);
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WREG32(VM_CONTEXT1_CNTL, 0);
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@ -9555,6 +9563,9 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
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int ret, i;
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u16 tmp16;
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if (pci_is_root_bus(rdev->pdev->bus))
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return;
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if (radeon_pcie_gen2 == 0)
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return;
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@ -9781,7 +9792,8 @@ static void cik_program_aspm(struct radeon_device *rdev)
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if (orig != data)
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WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, data);
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if (!disable_clkreq) {
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if (!disable_clkreq &&
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!pci_is_root_bus(rdev->pdev->bus)) {
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struct pci_dev *root = rdev->pdev->bus->self;
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u32 lnkcap;
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@ -1271,7 +1271,7 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);
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WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), rdev->vm_manager.max_pfn);
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
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rdev->gart.table_addr >> 12);
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rdev->vm_manager.saved_table_addr[i]);
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}
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/* enable context1-7 */
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@ -1303,6 +1303,13 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
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static void cayman_pcie_gart_disable(struct radeon_device *rdev)
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{
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unsigned i;
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for (i = 1; i < 8; ++i) {
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rdev->vm_manager.saved_table_addr[i] = RREG32(
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VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2));
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}
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/* Disable all tables */
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WREG32(VM_CONTEXT0_CNTL, 0);
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WREG32(VM_CONTEXT1_CNTL, 0);
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@ -1812,7 +1812,6 @@ static void r600_gpu_init(struct radeon_device *rdev)
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{
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u32 tiling_config;
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u32 ramcfg;
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u32 cc_rb_backend_disable;
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u32 cc_gc_shader_pipe_config;
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u32 tmp;
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int i, j;
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@ -1939,29 +1938,20 @@ static void r600_gpu_init(struct radeon_device *rdev)
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}
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tiling_config |= BANK_SWAPS(1);
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cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) & 0x00ff0000;
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tmp = R6XX_MAX_BACKENDS -
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r600_count_pipe_bits((cc_rb_backend_disable >> 16) & R6XX_MAX_BACKENDS_MASK);
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if (tmp < rdev->config.r600.max_backends) {
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rdev->config.r600.max_backends = tmp;
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}
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cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0x00ffff00;
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tmp = R6XX_MAX_PIPES -
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r600_count_pipe_bits((cc_gc_shader_pipe_config >> 8) & R6XX_MAX_PIPES_MASK);
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if (tmp < rdev->config.r600.max_pipes) {
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rdev->config.r600.max_pipes = tmp;
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}
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tmp = R6XX_MAX_SIMDS -
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r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R6XX_MAX_SIMDS_MASK);
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if (tmp < rdev->config.r600.max_simds) {
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rdev->config.r600.max_simds = tmp;
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}
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tmp = rdev->config.r600.max_simds -
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r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R6XX_MAX_SIMDS_MASK);
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rdev->config.r600.active_simds = tmp;
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disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) >> 16) & R6XX_MAX_BACKENDS_MASK;
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tmp = 0;
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for (i = 0; i < rdev->config.r600.max_backends; i++)
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tmp |= (1 << i);
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/* if all the backends are disabled, fix it up here */
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if ((disabled_rb_mask & tmp) == tmp) {
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for (i = 0; i < rdev->config.r600.max_backends; i++)
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disabled_rb_mask &= ~(1 << i);
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}
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tmp = (tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT;
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tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.r600.max_backends,
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R6XX_MAX_BACKENDS, disabled_rb_mask);
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@ -915,6 +915,8 @@ struct radeon_vm_manager {
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u64 vram_base_offset;
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/* is vm enabled? */
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bool enabled;
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/* for hw to save the PD addr on suspend/resume */
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uint32_t saved_table_addr[RADEON_NUM_VM];
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};
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/*
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|
|
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@ -1177,7 +1177,6 @@ static void rv770_gpu_init(struct radeon_device *rdev)
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u32 hdp_host_path_cntl;
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u32 sq_dyn_gpr_size_simd_ab_0;
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u32 gb_tiling_config = 0;
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u32 cc_rb_backend_disable = 0;
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u32 cc_gc_shader_pipe_config = 0;
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u32 mc_arb_ramcfg;
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u32 db_debug4, tmp;
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@ -1311,21 +1310,7 @@ static void rv770_gpu_init(struct radeon_device *rdev)
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WREG32(SPI_CONFIG_CNTL, 0);
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}
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cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) & 0x00ff0000;
|
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tmp = R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_rb_backend_disable >> 16);
|
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if (tmp < rdev->config.rv770.max_backends) {
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rdev->config.rv770.max_backends = tmp;
|
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}
|
||||
|
||||
cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0xffffff00;
|
||||
tmp = R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config >> 8) & R7XX_MAX_PIPES_MASK);
|
||||
if (tmp < rdev->config.rv770.max_pipes) {
|
||||
rdev->config.rv770.max_pipes = tmp;
|
||||
}
|
||||
tmp = R7XX_MAX_SIMDS - r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R7XX_MAX_SIMDS_MASK);
|
||||
if (tmp < rdev->config.rv770.max_simds) {
|
||||
rdev->config.rv770.max_simds = tmp;
|
||||
}
|
||||
tmp = rdev->config.rv770.max_simds -
|
||||
r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R7XX_MAX_SIMDS_MASK);
|
||||
rdev->config.rv770.active_simds = tmp;
|
||||
|
@ -1348,6 +1333,14 @@ static void rv770_gpu_init(struct radeon_device *rdev)
|
|||
rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes;
|
||||
|
||||
disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) >> 16) & R7XX_MAX_BACKENDS_MASK;
|
||||
tmp = 0;
|
||||
for (i = 0; i < rdev->config.rv770.max_backends; i++)
|
||||
tmp |= (1 << i);
|
||||
/* if all the backends are disabled, fix it up here */
|
||||
if ((disabled_rb_mask & tmp) == tmp) {
|
||||
for (i = 0; i < rdev->config.rv770.max_backends; i++)
|
||||
disabled_rb_mask &= ~(1 << i);
|
||||
}
|
||||
tmp = (gb_tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT;
|
||||
tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.rv770.max_backends,
|
||||
R7XX_MAX_BACKENDS, disabled_rb_mask);
|
||||
|
|
|
@ -4290,10 +4290,10 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
|
|||
for (i = 1; i < 16; i++) {
|
||||
if (i < 8)
|
||||
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
|
||||
rdev->gart.table_addr >> 12);
|
||||
rdev->vm_manager.saved_table_addr[i]);
|
||||
else
|
||||
WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2),
|
||||
rdev->gart.table_addr >> 12);
|
||||
rdev->vm_manager.saved_table_addr[i]);
|
||||
}
|
||||
|
||||
/* enable context1-15 */
|
||||
|
@ -4325,6 +4325,17 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
|
|||
|
||||
static void si_pcie_gart_disable(struct radeon_device *rdev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
for (i = 1; i < 16; ++i) {
|
||||
uint32_t reg;
|
||||
if (i < 8)
|
||||
reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2);
|
||||
else
|
||||
reg = VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2);
|
||||
rdev->vm_manager.saved_table_addr[i] = RREG32(reg);
|
||||
}
|
||||
|
||||
/* Disable all tables */
|
||||
WREG32(VM_CONTEXT0_CNTL, 0);
|
||||
WREG32(VM_CONTEXT1_CNTL, 0);
|
||||
|
@ -7177,6 +7188,9 @@ static void si_pcie_gen3_enable(struct radeon_device *rdev)
|
|||
int ret, i;
|
||||
u16 tmp16;
|
||||
|
||||
if (pci_is_root_bus(rdev->pdev->bus))
|
||||
return;
|
||||
|
||||
if (radeon_pcie_gen2 == 0)
|
||||
return;
|
||||
|
||||
|
@ -7454,7 +7468,8 @@ static void si_program_aspm(struct radeon_device *rdev)
|
|||
if (orig != data)
|
||||
WREG32_PIF_PHY1(PB1_PIF_CNTL, data);
|
||||
|
||||
if (!disable_clkreq) {
|
||||
if (!disable_clkreq &&
|
||||
!pci_is_root_bus(rdev->pdev->bus)) {
|
||||
struct pci_dev *root = rdev->pdev->bus->self;
|
||||
u32 lnkcap;
|
||||
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
config DRM_STI
|
||||
tristate "DRM Support for STMicroelectronics SoC stiH41x Series"
|
||||
depends on DRM && (SOC_STIH415 || SOC_STIH416 || ARCH_MULTIPLATFORM)
|
||||
select RESET_CONTROLLER
|
||||
select DRM_KMS_HELPER
|
||||
select DRM_GEM_CMA_HELPER
|
||||
select DRM_KMS_CMA_HELPER
|
||||
|
|
|
@ -201,8 +201,8 @@ static int sti_drm_platform_probe(struct platform_device *pdev)
|
|||
master = platform_device_register_resndata(dev,
|
||||
DRIVER_NAME "__master", -1,
|
||||
NULL, 0, NULL, 0);
|
||||
if (!master)
|
||||
return -EINVAL;
|
||||
if (IS_ERR(master))
|
||||
return PTR_ERR(master);
|
||||
|
||||
platform_set_drvdata(pdev, master);
|
||||
return 0;
|
||||
|
|
|
@ -730,16 +730,16 @@ static int sti_hda_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
}
|
||||
hda->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
|
||||
if (IS_ERR(hda->regs))
|
||||
return PTR_ERR(hda->regs);
|
||||
if (!hda->regs)
|
||||
return -ENOMEM;
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
"video-dacs-ctrl");
|
||||
if (res) {
|
||||
hda->video_dacs_ctrl = devm_ioremap_nocache(dev, res->start,
|
||||
resource_size(res));
|
||||
if (IS_ERR(hda->video_dacs_ctrl))
|
||||
return PTR_ERR(hda->video_dacs_ctrl);
|
||||
if (!hda->video_dacs_ctrl)
|
||||
return -ENOMEM;
|
||||
} else {
|
||||
/* If no existing video-dacs-ctrl resource continue the probe */
|
||||
DRM_DEBUG_DRIVER("No video-dacs-ctrl resource\n");
|
||||
|
@ -770,7 +770,7 @@ static int sti_hda_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id hda_of_match[] = {
|
||||
static const struct of_device_id hda_of_match[] = {
|
||||
{ .compatible = "st,stih416-hda", },
|
||||
{ .compatible = "st,stih407-hda", },
|
||||
{ /* end node */ }
|
||||
|
|
|
@ -677,7 +677,7 @@ static const struct component_ops sti_hdmi_ops = {
|
|||
.unbind = sti_hdmi_unbind,
|
||||
};
|
||||
|
||||
static struct of_device_id hdmi_of_match[] = {
|
||||
static const struct of_device_id hdmi_of_match[] = {
|
||||
{
|
||||
.compatible = "st,stih416-hdmi",
|
||||
.data = &tx3g0c55phy_ops,
|
||||
|
@ -713,8 +713,8 @@ static int sti_hdmi_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
}
|
||||
hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
|
||||
if (IS_ERR(hdmi->regs))
|
||||
return PTR_ERR(hdmi->regs);
|
||||
if (!hdmi->regs)
|
||||
return -ENOMEM;
|
||||
|
||||
if (of_device_is_compatible(np, "st,stih416-hdmi")) {
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
|
@ -725,8 +725,8 @@ static int sti_hdmi_probe(struct platform_device *pdev)
|
|||
}
|
||||
hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
|
||||
resource_size(res));
|
||||
if (IS_ERR(hdmi->syscfg))
|
||||
return PTR_ERR(hdmi->syscfg);
|
||||
if (!hdmi->syscfg)
|
||||
return -ENOMEM;
|
||||
|
||||
}
|
||||
|
||||
|
|
|
@ -591,8 +591,8 @@ static int sti_tvout_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
}
|
||||
tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
|
||||
if (IS_ERR(tvout->regs))
|
||||
return PTR_ERR(tvout->regs);
|
||||
if (!tvout->regs)
|
||||
return -ENOMEM;
|
||||
|
||||
/* get reset resources */
|
||||
tvout->reset = devm_reset_control_get(dev, "tvout");
|
||||
|
@ -624,7 +624,7 @@ static int sti_tvout_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id tvout_of_match[] = {
|
||||
static const struct of_device_id tvout_of_match[] = {
|
||||
{ .compatible = "st,stih416-tvout", },
|
||||
{ .compatible = "st,stih407-tvout", },
|
||||
{ /* end node */ }
|
||||
|
|
|
@ -892,6 +892,10 @@ config DEBUG_WW_MUTEX_SLOWPATH
|
|||
the full mutex checks enabled with (CONFIG_PROVE_LOCKING) this
|
||||
will test all possible w/w mutex interface abuse with the
|
||||
exception of simply not acquiring all the required locks.
|
||||
Note that this feature can introduce significant overhead, so
|
||||
it really should not be enabled in a production or distro kernel,
|
||||
even a debug kernel. If you are a driver writer, enable it. If
|
||||
you are a distro, do not.
|
||||
|
||||
config DEBUG_LOCK_ALLOC
|
||||
bool "Lock debugging: detect incorrect freeing of live locks"
|
||||
|
|
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