linux-watchdog 4.19-rc1 tag
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iEYEABECAAYFAlt2pvIACgkQ+iyteGJfRspSxgCggHiSqO+sb1F+h4QyWlh45o9S laAAoJL0ZAXSrlA/rAt5FCKCeSZiNZG2 =hCTY -----END PGP SIGNATURE----- Merge tag 'linux-watchdog-4.19-rc1' of git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - add MEN 16z069 IP-Core driver - renesas-wdt: add support for the R8A77990 wdt - stm32_iwdg: Add stm32mp1 support and pclk feature - sp805_wdt, orion_wdt, sprd_wdt: several improvements - imx2_wdt, stmp3xxx: switch to SPDX identifier * tag 'linux-watchdog-4.19-rc1' of git://www.linux-watchdog.org/linux-watchdog: watchdog: fix dependencies of menz69_wdt.o watchdog: sp805: Add clock-frequency property watchdog: add driver for the MEN 16z069 IP-Core watchdog: sprd_wdt: Remove redundant dev_err call in sprd_wdt_probe() watchdog: stmp3xxx: Switch to SPDX identifier watchdog: imx2_wdt: Switch to SPDX identifier watchdog: sp805: set WDOG_HW_RUNNING when appropriate watchdog: sp805: add 'timeout-sec' DT property support dt-bindings: watchdog: Add optional 'timeout-sec' property for sp805 dt-bindings: watchdog: Consolidate SP805 binding docs watchdog: orion_wdt: Mark watchdog as active when running at probe watchdog: stm32: add pclk feature for stm32mp1 dt-bindings: watchdog: add stm32mp1 support dt-bindings: watchdog: renesas-wdt: Add support for the R8A77990 wdt
This commit is contained in:
Коммит
6eaac34ff3
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@ -1,17 +1,32 @@
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ARM AMBA Primecell SP805 Watchdog
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SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
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can be used to identify the peripheral type, vendor, and revision.
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This value can be used for driver matching.
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As SP805 WDT is a primecell IP, it follows the base bindings specified in
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'arm/primecell.txt'
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Required properties:
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- compatible: Should be "arm,sp805" & "arm,primecell"
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- reg: Should contain location and length for watchdog timer register.
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- interrupts: Should contain the list of watchdog timer interrupts.
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- clocks: clocks driving the watchdog timer hardware. This list should be 2
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clocks. With 2 clocks, the order is wdogclk clock, apb_pclk.
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- compatible: Should be "arm,sp805" & "arm,primecell"
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- reg: Should contain location and length for watchdog timer register
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- clocks: Clocks driving the watchdog timer hardware. This list should be
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2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk
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wdog_clk can be equal to or be a sub-multiple of the apb_pclk
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frequency
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- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the
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second one
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Optional properties:
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- interrupts: Should specify WDT interrupt number
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- timeout-sec: Should specify default WDT timeout in seconds. If unset, the
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default timeout is determined by the driver
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Example:
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watchdog@66090000 {
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compatible = "arm,sp805", "arm,primecell";
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reg = <0x66090000 0x1000>;
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interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&apb_pclk>,<&apb_pclk>;
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clock-names = "wdogclk", "apb_pclk";
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clocks = <&wdt_clk>, <&apb_pclk>;
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clock-names = "wdog_clk", "apb_pclk";
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};
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@ -16,6 +16,7 @@ Required properties:
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- "renesas,r8a7796-wdt" (R-Car M3-W)
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- "renesas,r8a77965-wdt" (R-Car M3-N)
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- "renesas,r8a77970-wdt" (R-Car V3M)
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- "renesas,r8a77990-wdt" (R-Car E3)
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- "renesas,r8a77995-wdt" (R-Car D3)
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- "renesas,r7s72100-wdt" (RZ/A1)
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The generic compatible string must be:
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@ -1,31 +0,0 @@
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* ARM SP805 Watchdog Timer (WDT) Controller
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SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
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can be used to identify the peripheral type, vendor, and revision.
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This value can be used for driver matching.
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As SP805 WDT is a primecell IP, it follows the base bindings specified in
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'arm/primecell.txt'
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Required properties:
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- compatible : Should be "arm,sp805-wdt", "arm,primecell"
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- reg : Base address and size of the watchdog timer registers.
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- clocks : From common clock binding.
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First clock is PCLK and the second is WDOGCLK.
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WDOGCLK can be equal to or be a sub-multiple of the PCLK frequency.
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- clock-names : From common clock binding.
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Shall be "apb_pclk" for first clock and "wdog_clk" for the
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second one.
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Optional properties:
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- interrupts : Should specify WDT interrupt number.
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Examples:
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cluster1_core0_watchdog: wdt@c000000 {
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compatible = "arm,sp805-wdt", "arm,primecell";
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reg = <0x0 0xc000000 0x0 0x1000>;
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clocks = <&clockgen 4 3>, <&clockgen 4 3>;
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clock-names = "apb_pclk", "wdog_clk";
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};
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@ -2,9 +2,15 @@ STM32 Independent WatchDoG (IWDG)
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---------------------------------
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Required properties:
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- compatible: "st,stm32-iwdg"
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- reg: physical base address and length of the registers set for the device
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- clocks: must contain a single entry describing the clock input
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- compatible: Should be either:
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- "st,stm32-iwdg"
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- "st,stm32mp1-iwdg"
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- reg: Physical base address and length of the registers set for the device
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- clocks: Reference to the clock entry lsi. Additional pclk clock entry
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is required only for st,stm32mp1-iwdg.
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- clock-names: Name of the clocks used.
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"lsi" for st,stm32-iwdg
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"lsi", "pclk" for st,stm32mp1-iwdg
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Optional Properties:
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- timeout-sec: Watchdog timeout value in seconds.
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@ -15,5 +21,6 @@ iwdg: watchdog@40003000 {
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compatible = "st,stm32-iwdg";
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reg = <0x40003000 0x400>;
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clocks = <&clk_lsi>;
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clock-names = "lsi";
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timeout-sec = <32>;
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};
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@ -9427,6 +9427,12 @@ F: drivers/leds/leds-menf21bmc.c
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F: drivers/hwmon/menf21bmc_hwmon.c
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F: Documentation/hwmon/menf21bmc
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MEN Z069 WATCHDOG DRIVER
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M: Johannes Thumshirn <jth@kernel.org>
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L: linux-watchdog@vger.kernel.org
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S: Maintained
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F: drivers/watchdog/menz069_wdt.c
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MESON AO CEC DRIVER FOR AMLOGIC SOCS
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M: Neil Armstrong <narmstrong@baylibre.com>
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L: linux-media@lists.freedesktop.org
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@ -161,6 +161,16 @@ config MENF21BMC_WATCHDOG
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This driver can also be built as a module. If so the module
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will be called menf21bmc_wdt.
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config MENZ069_WATCHDOG
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tristate "MEN 16Z069 Watchdog"
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depends on MCB
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select WATCHDOG_CORE
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help
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Say Y here to include support for the MEN 16Z069 Watchdog.
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This driver can also be built as a module. If so the module
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will be called menz069_wdt.
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config TANGOX_WATCHDOG
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tristate "Sigma Designs SMP86xx/SMP87xx watchdog"
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select WATCHDOG_CORE
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@ -215,4 +215,5 @@ obj-$(CONFIG_MAX77620_WATCHDOG) += max77620_wdt.o
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obj-$(CONFIG_ZIIRAVE_WATCHDOG) += ziirave_wdt.o
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obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
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obj-$(CONFIG_MENF21BMC_WATCHDOG) += menf21bmc_wdt.o
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obj-$(CONFIG_MENZ069_WATCHDOG) += menz69_wdt.o
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obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Watchdog driver for IMX2 and later processors
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*
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@ -7,10 +8,6 @@
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* some parts adapted by similar drivers from Darius Augulis and Vladimir
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* Zapolskiy, additional improvements by Wim Van Sebroeck.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* NOTE: MX1 has a slightly different Watchdog than MX2 and later:
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*
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* MX1: MX2+:
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@ -0,0 +1,170 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Watchdog driver for the MEN z069 IP-Core
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*
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* Copyright (C) 2018 Johannes Thumshirn <jth@kernel.org>
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mcb.h>
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#include <linux/module.h>
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#include <linux/watchdog.h>
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struct men_z069_drv {
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struct watchdog_device wdt;
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void __iomem *base;
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struct resource *mem;
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};
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#define MEN_Z069_WTR 0x10
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#define MEN_Z069_WTR_WDEN BIT(15)
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#define MEN_Z069_WTR_WDET_MASK 0x7fff
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#define MEN_Z069_WVR 0x14
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#define MEN_Z069_TIMER_FREQ 500 /* 500 Hz */
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#define MEN_Z069_WDT_COUNTER_MIN 1
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#define MEN_Z069_WDT_COUNTER_MAX 0x7fff
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#define MEN_Z069_DEFAULT_TIMEOUT 30
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static int men_z069_wdt_start(struct watchdog_device *wdt)
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{
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struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
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u16 val;
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val = readw(drv->base + MEN_Z069_WTR);
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val |= MEN_Z069_WTR_WDEN;
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writew(val, drv->base + MEN_Z069_WTR);
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return 0;
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}
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static int men_z069_wdt_stop(struct watchdog_device *wdt)
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{
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struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
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u16 val;
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val = readw(drv->base + MEN_Z069_WTR);
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val &= ~MEN_Z069_WTR_WDEN;
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writew(val, drv->base + MEN_Z069_WTR);
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return 0;
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}
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static int men_z069_wdt_ping(struct watchdog_device *wdt)
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{
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struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
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u16 val;
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/* The watchdog trigger value toggles between 0x5555 and 0xaaaa */
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val = readw(drv->base + MEN_Z069_WVR);
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val ^= 0xffff;
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writew(val, drv->base + MEN_Z069_WVR);
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return 0;
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}
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static int men_z069_wdt_set_timeout(struct watchdog_device *wdt,
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unsigned int timeout)
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{
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struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
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u16 reg, val, ena;
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wdt->timeout = timeout;
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val = timeout * MEN_Z069_TIMER_FREQ;
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reg = readw(drv->base + MEN_Z069_WVR);
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ena = reg & MEN_Z069_WTR_WDEN;
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reg = ena | val;
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writew(reg, drv->base + MEN_Z069_WTR);
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return 0;
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}
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static const struct watchdog_info men_z069_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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.identity = "MEN z069 Watchdog",
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};
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static const struct watchdog_ops men_z069_ops = {
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.owner = THIS_MODULE,
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.start = men_z069_wdt_start,
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.stop = men_z069_wdt_stop,
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.ping = men_z069_wdt_ping,
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.set_timeout = men_z069_wdt_set_timeout,
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};
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static struct watchdog_device men_z069_wdt = {
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.info = &men_z069_info,
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.ops = &men_z069_ops,
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.timeout = MEN_Z069_DEFAULT_TIMEOUT,
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.min_timeout = 1,
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.max_timeout = MEN_Z069_WDT_COUNTER_MAX / MEN_Z069_TIMER_FREQ,
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};
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static int men_z069_probe(struct mcb_device *dev,
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const struct mcb_device_id *id)
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{
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struct men_z069_drv *drv;
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struct resource *mem;
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drv = devm_kzalloc(&dev->dev, sizeof(struct men_z069_drv), GFP_KERNEL);
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if (!drv)
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return -ENOMEM;
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mem = mcb_request_mem(dev, "z069-wdt");
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if (IS_ERR(mem))
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return PTR_ERR(mem);
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drv->base = devm_ioremap(&dev->dev, mem->start, resource_size(mem));
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if (drv->base == NULL)
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goto release_mem;
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drv->mem = mem;
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drv->wdt = men_z069_wdt;
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watchdog_init_timeout(&drv->wdt, 0, &dev->dev);
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watchdog_set_nowayout(&drv->wdt, nowayout);
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watchdog_set_drvdata(&drv->wdt, drv);
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drv->wdt.parent = &dev->dev;
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mcb_set_drvdata(dev, drv);
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return watchdog_register_device(&men_z069_wdt);
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release_mem:
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mcb_release_mem(mem);
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return -ENOMEM;
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}
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static void men_z069_remove(struct mcb_device *dev)
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{
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struct men_z069_drv *drv = mcb_get_drvdata(dev);
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watchdog_unregister_device(&drv->wdt);
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mcb_release_mem(drv->mem);
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}
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static const struct mcb_device_id men_z069_ids[] = {
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{ .device = 0x45 },
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{ }
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};
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MODULE_DEVICE_TABLE(mcb, men_z069_ids);
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static struct mcb_driver men_z069_driver = {
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.driver = {
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.name = "z069-wdt",
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.owner = THIS_MODULE,
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},
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.probe = men_z069_probe,
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.remove = men_z069_remove,
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.id_table = men_z069_ids,
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};
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module_mcb_driver(men_z069_driver);
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MODULE_AUTHOR("Johannes Thumshirn <jth@kernel.org>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("mcb:16z069");
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@ -581,6 +581,8 @@ static int orion_wdt_probe(struct platform_device *pdev)
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*/
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if (!orion_wdt_enabled(&dev->wdt))
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orion_wdt_stop(&dev->wdt);
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else
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set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
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/* Request the IRQ only after the watchdog is disabled */
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irq = platform_get_irq(pdev, 0);
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|
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@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/acpi.h>
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#include <linux/device.h>
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#include <linux/resource.h>
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#include <linux/amba/bus.h>
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|
@ -22,6 +23,7 @@
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#include <linux/math64.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of.h>
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#include <linux/pm.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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|
@ -42,6 +44,7 @@
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/* control register masks */
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#define INT_ENABLE (1 << 0)
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#define RESET_ENABLE (1 << 1)
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#define ENABLE_MASK (INT_ENABLE | RESET_ENABLE)
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#define WDTINTCLR 0x00C
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#define WDTRIS 0x010
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#define WDTMIS 0x014
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|
@ -65,6 +68,7 @@ struct sp805_wdt {
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spinlock_t lock;
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void __iomem *base;
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struct clk *clk;
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u64 rate;
|
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struct amba_device *adev;
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unsigned int load_val;
|
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};
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|
@ -74,13 +78,22 @@ module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout,
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"Set to 1 to keep watchdog running after device release");
|
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|
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/* returns true if wdt is running; otherwise returns false */
|
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static bool wdt_is_running(struct watchdog_device *wdd)
|
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{
|
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struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
|
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u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
|
||||
|
||||
return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
|
||||
}
|
||||
|
||||
/* This routine finds load value that will reset system in required timout */
|
||||
static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
|
||||
{
|
||||
struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
|
||||
u64 load, rate;
|
||||
|
||||
rate = clk_get_rate(wdt->clk);
|
||||
rate = wdt->rate;
|
||||
|
||||
/*
|
||||
* sp805 runs counter with given value twice, after the end of first
|
||||
|
@ -106,9 +119,7 @@ static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
|
|||
static unsigned int wdt_timeleft(struct watchdog_device *wdd)
|
||||
{
|
||||
struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
|
||||
u64 load, rate;
|
||||
|
||||
rate = clk_get_rate(wdt->clk);
|
||||
u64 load;
|
||||
|
||||
spin_lock(&wdt->lock);
|
||||
load = readl_relaxed(wdt->base + WDTVALUE);
|
||||
|
@ -118,7 +129,7 @@ static unsigned int wdt_timeleft(struct watchdog_device *wdd)
|
|||
load += wdt->load_val + 1;
|
||||
spin_unlock(&wdt->lock);
|
||||
|
||||
return div_u64(load, rate);
|
||||
return div_u64(load, wdt->rate);
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -228,11 +239,25 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
|
|||
if (IS_ERR(wdt->base))
|
||||
return PTR_ERR(wdt->base);
|
||||
|
||||
wdt->clk = devm_clk_get(&adev->dev, NULL);
|
||||
if (IS_ERR(wdt->clk)) {
|
||||
dev_warn(&adev->dev, "Clock not found\n");
|
||||
ret = PTR_ERR(wdt->clk);
|
||||
goto err;
|
||||
if (adev->dev.of_node) {
|
||||
wdt->clk = devm_clk_get(&adev->dev, NULL);
|
||||
if (IS_ERR(wdt->clk)) {
|
||||
dev_err(&adev->dev, "Clock not found\n");
|
||||
return PTR_ERR(wdt->clk);
|
||||
}
|
||||
wdt->rate = clk_get_rate(wdt->clk);
|
||||
} else if (has_acpi_companion(&adev->dev)) {
|
||||
/*
|
||||
* When Driver probe with ACPI device, clock devices
|
||||
* are not available, so watchdog rate get from
|
||||
* clock-frequency property given in _DSD object.
|
||||
*/
|
||||
device_property_read_u64(&adev->dev, "clock-frequency",
|
||||
&wdt->rate);
|
||||
if (!wdt->rate) {
|
||||
dev_err(&adev->dev, "no clock-frequency property\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
wdt->adev = adev;
|
||||
|
@ -244,7 +269,23 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
|
|||
watchdog_set_nowayout(&wdt->wdd, nowayout);
|
||||
watchdog_set_drvdata(&wdt->wdd, wdt);
|
||||
watchdog_set_restart_priority(&wdt->wdd, 128);
|
||||
wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
|
||||
|
||||
/*
|
||||
* If 'timeout-sec' devicetree property is specified, use that.
|
||||
* Otherwise, use DEFAULT_TIMEOUT
|
||||
*/
|
||||
wdt->wdd.timeout = DEFAULT_TIMEOUT;
|
||||
watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
|
||||
wdt_setload(&wdt->wdd, wdt->wdd.timeout);
|
||||
|
||||
/*
|
||||
* If HW is already running, enable/reset the wdt and set the running
|
||||
* bit to tell the wdt subsystem
|
||||
*/
|
||||
if (wdt_is_running(&wdt->wdd)) {
|
||||
wdt_enable(&wdt->wdd);
|
||||
set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
|
||||
}
|
||||
|
||||
ret = watchdog_register_device(&wdt->wdd);
|
||||
if (ret) {
|
||||
|
|
|
@ -279,10 +279,8 @@ static int sprd_wdt_probe(struct platform_device *pdev)
|
|||
|
||||
wdt_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
wdt->base = devm_ioremap_resource(&pdev->dev, wdt_res);
|
||||
if (IS_ERR(wdt->base)) {
|
||||
dev_err(&pdev->dev, "failed to map memory resource\n");
|
||||
if (IS_ERR(wdt->base))
|
||||
return PTR_ERR(wdt->base);
|
||||
}
|
||||
|
||||
wdt->enable = devm_clk_get(&pdev->dev, "enable");
|
||||
if (IS_ERR(wdt->enable)) {
|
||||
|
|
|
@ -11,12 +11,13 @@
|
|||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/iopoll.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/watchdog.h>
|
||||
|
||||
|
@ -54,11 +55,15 @@
|
|||
#define TIMEOUT_US 100000
|
||||
#define SLEEP_US 1000
|
||||
|
||||
#define HAS_PCLK true
|
||||
|
||||
struct stm32_iwdg {
|
||||
struct watchdog_device wdd;
|
||||
void __iomem *regs;
|
||||
struct clk *clk;
|
||||
struct clk *clk_lsi;
|
||||
struct clk *clk_pclk;
|
||||
unsigned int rate;
|
||||
bool has_pclk;
|
||||
};
|
||||
|
||||
static inline u32 reg_read(void __iomem *base, u32 reg)
|
||||
|
@ -133,6 +138,44 @@ static int stm32_iwdg_set_timeout(struct watchdog_device *wdd,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int stm32_iwdg_clk_init(struct platform_device *pdev,
|
||||
struct stm32_iwdg *wdt)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
wdt->clk_lsi = devm_clk_get(&pdev->dev, "lsi");
|
||||
if (IS_ERR(wdt->clk_lsi)) {
|
||||
dev_err(&pdev->dev, "Unable to get lsi clock\n");
|
||||
return PTR_ERR(wdt->clk_lsi);
|
||||
}
|
||||
|
||||
/* optional peripheral clock */
|
||||
if (wdt->has_pclk) {
|
||||
wdt->clk_pclk = devm_clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(wdt->clk_pclk)) {
|
||||
dev_err(&pdev->dev, "Unable to get pclk clock\n");
|
||||
return PTR_ERR(wdt->clk_pclk);
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(wdt->clk_pclk);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Unable to prepare pclk clock\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(wdt->clk_lsi);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Unable to prepare lsi clock\n");
|
||||
clk_disable_unprepare(wdt->clk_pclk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wdt->rate = clk_get_rate(wdt->clk_lsi);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct watchdog_info stm32_iwdg_info = {
|
||||
.options = WDIOF_SETTIMEOUT |
|
||||
WDIOF_MAGICCLOSE |
|
||||
|
@ -147,49 +190,42 @@ static const struct watchdog_ops stm32_iwdg_ops = {
|
|||
.set_timeout = stm32_iwdg_set_timeout,
|
||||
};
|
||||
|
||||
static const struct of_device_id stm32_iwdg_of_match[] = {
|
||||
{ .compatible = "st,stm32-iwdg", .data = (void *)!HAS_PCLK },
|
||||
{ .compatible = "st,stm32mp1-iwdg", .data = (void *)HAS_PCLK },
|
||||
{ /* end node */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, stm32_iwdg_of_match);
|
||||
|
||||
static int stm32_iwdg_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct watchdog_device *wdd;
|
||||
const struct of_device_id *match;
|
||||
struct stm32_iwdg *wdt;
|
||||
struct resource *res;
|
||||
void __iomem *regs;
|
||||
struct clk *clk;
|
||||
int ret;
|
||||
|
||||
match = of_match_device(stm32_iwdg_of_match, &pdev->dev);
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
|
||||
if (!wdt)
|
||||
return -ENOMEM;
|
||||
|
||||
wdt->has_pclk = match->data;
|
||||
|
||||
/* This is the timer base. */
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(regs)) {
|
||||
wdt->regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(wdt->regs)) {
|
||||
dev_err(&pdev->dev, "Could not get resource\n");
|
||||
return PTR_ERR(regs);
|
||||
return PTR_ERR(wdt->regs);
|
||||
}
|
||||
|
||||
clk = devm_clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(&pdev->dev, "Unable to get clock\n");
|
||||
return PTR_ERR(clk);
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Unable to prepare clock %p\n", clk);
|
||||
ret = stm32_iwdg_clk_init(pdev, wdt);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate our watchdog driver data, which has the
|
||||
* struct watchdog_device nested within it.
|
||||
*/
|
||||
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
|
||||
if (!wdt) {
|
||||
ret = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* Initialize struct stm32_iwdg. */
|
||||
wdt->regs = regs;
|
||||
wdt->clk = clk;
|
||||
wdt->rate = clk_get_rate(clk);
|
||||
|
||||
/* Initialize struct watchdog_device. */
|
||||
wdd = &wdt->wdd;
|
||||
|
@ -217,7 +253,8 @@ static int stm32_iwdg_probe(struct platform_device *pdev)
|
|||
|
||||
return 0;
|
||||
err:
|
||||
clk_disable_unprepare(clk);
|
||||
clk_disable_unprepare(wdt->clk_lsi);
|
||||
clk_disable_unprepare(wdt->clk_pclk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -227,23 +264,18 @@ static int stm32_iwdg_remove(struct platform_device *pdev)
|
|||
struct stm32_iwdg *wdt = platform_get_drvdata(pdev);
|
||||
|
||||
watchdog_unregister_device(&wdt->wdd);
|
||||
clk_disable_unprepare(wdt->clk);
|
||||
clk_disable_unprepare(wdt->clk_lsi);
|
||||
clk_disable_unprepare(wdt->clk_pclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id stm32_iwdg_of_match[] = {
|
||||
{ .compatible = "st,stm32-iwdg" },
|
||||
{ /* end node */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, stm32_iwdg_of_match);
|
||||
|
||||
static struct platform_driver stm32_iwdg_driver = {
|
||||
.probe = stm32_iwdg_probe,
|
||||
.remove = stm32_iwdg_remove,
|
||||
.driver = {
|
||||
.name = "iwdg",
|
||||
.of_match_table = stm32_iwdg_of_match,
|
||||
.of_match_table = of_match_ptr(stm32_iwdg_of_match),
|
||||
},
|
||||
};
|
||||
module_platform_driver(stm32_iwdg_driver);
|
||||
|
|
|
@ -1,13 +1,10 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Watchdog driver for the RTC based watchdog in STMP3xxx and i.MX23/28
|
||||
*
|
||||
* Author: Wolfram Sang <kernel@pengutronix.de>
|
||||
*
|
||||
* Copyright (C) 2011-12 Wolfram Sang, Pengutronix
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published by
|
||||
* the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
|
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