Merge branch 'tip/perf/urgent-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace into perf/urgent
This commit is contained in:
Коммит
6eadf1075c
|
@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows:
|
|||
eax, ebx, ecx, edx: the values returned by the cpuid instruction for
|
||||
this function/index combination
|
||||
|
||||
The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
|
||||
as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
|
||||
support. Instead it is reported via
|
||||
|
||||
ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
|
||||
|
||||
if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
|
||||
feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
|
||||
|
||||
4.47 KVM_PPC_GET_PVINFO
|
||||
|
||||
Capability: KVM_CAP_PPC_GET_PVINFO
|
||||
|
@ -1151,6 +1160,13 @@ following flags are specified:
|
|||
/* Depends on KVM_CAP_IOMMU */
|
||||
#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
|
||||
|
||||
The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure
|
||||
isolation of the device. Usages not specifying this flag are deprecated.
|
||||
|
||||
Only PCI header type 0 devices with PCI BAR resources are supported by
|
||||
device assignment. The user requesting this ioctl must have read/write
|
||||
access to the PCI sysfs resource files associated with the device.
|
||||
|
||||
4.49 KVM_DEASSIGN_PCI_DEVICE
|
||||
|
||||
Capability: KVM_CAP_DEVICE_DEASSIGNMENT
|
||||
|
|
13
MAINTAINERS
13
MAINTAINERS
|
@ -1698,11 +1698,9 @@ F: arch/x86/include/asm/tce.h
|
|||
|
||||
CAN NETWORK LAYER
|
||||
M: Oliver Hartkopp <socketcan@hartkopp.net>
|
||||
M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de>
|
||||
M: Urs Thuermann <urs.thuermann@volkswagen.de>
|
||||
L: linux-can@vger.kernel.org
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://developer.berlios.de/projects/socketcan/
|
||||
W: http://gitorious.org/linux-can
|
||||
T: git git://gitorious.org/linux-can/linux-can-next.git
|
||||
S: Maintained
|
||||
F: net/can/
|
||||
F: include/linux/can.h
|
||||
|
@ -1713,9 +1711,10 @@ F: include/linux/can/gw.h
|
|||
|
||||
CAN NETWORK DRIVERS
|
||||
M: Wolfgang Grandegger <wg@grandegger.com>
|
||||
M: Marc Kleine-Budde <mkl@pengutronix.de>
|
||||
L: linux-can@vger.kernel.org
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://developer.berlios.de/projects/socketcan/
|
||||
W: http://gitorious.org/linux-can
|
||||
T: git git://gitorious.org/linux-can/linux-can-next.git
|
||||
S: Maintained
|
||||
F: drivers/net/can/
|
||||
F: include/linux/can/dev.h
|
||||
|
@ -2700,7 +2699,7 @@ FIREWIRE SUBSYSTEM
|
|||
M: Stefan Richter <stefanr@s5r6.in-berlin.de>
|
||||
L: linux1394-devel@lists.sourceforge.net
|
||||
W: http://ieee1394.wiki.kernel.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git
|
||||
S: Maintained
|
||||
F: drivers/firewire/
|
||||
F: include/linux/firewire*.h
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION =
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -1246,7 +1246,7 @@ config PL310_ERRATA_588369
|
|||
|
||||
config ARM_ERRATA_720789
|
||||
bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
|
||||
depends on CPU_V7 && SMP
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 720789 Cortex-A9 (prior to
|
||||
r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
|
||||
|
@ -1282,7 +1282,7 @@ config ARM_ERRATA_743622
|
|||
|
||||
config ARM_ERRATA_751472
|
||||
bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
|
||||
depends on CPU_V7 && SMP
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 751472 Cortex-A9 (prior
|
||||
to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
|
||||
|
|
|
@ -221,17 +221,6 @@
|
|||
*/
|
||||
#define MCODE_BUFF_PER_REQ 256
|
||||
|
||||
/*
|
||||
* Mark a _pl330_req as free.
|
||||
* We do it by writing DMAEND as the first instruction
|
||||
* because no valid request is going to have DMAEND as
|
||||
* its first instruction to execute.
|
||||
*/
|
||||
#define MARK_FREE(req) do { \
|
||||
_emit_END(0, (req)->mc_cpu); \
|
||||
(req)->mc_len = 0; \
|
||||
} while (0)
|
||||
|
||||
/* If the _pl330_req is available to the client */
|
||||
#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
|
||||
|
||||
|
@ -301,8 +290,10 @@ struct pl330_thread {
|
|||
struct pl330_dmac *dmac;
|
||||
/* Only two at a time */
|
||||
struct _pl330_req req[2];
|
||||
/* Index of the last submitted request */
|
||||
/* Index of the last enqueued request */
|
||||
unsigned lstenq;
|
||||
/* Index of the last submitted request or -1 if the DMA is stopped */
|
||||
int req_running;
|
||||
};
|
||||
|
||||
enum pl330_dmac_state {
|
||||
|
@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
|
|||
writel(0, regs + DBGCMD);
|
||||
}
|
||||
|
||||
/*
|
||||
* Mark a _pl330_req as free.
|
||||
* We do it by writing DMAEND as the first instruction
|
||||
* because no valid request is going to have DMAEND as
|
||||
* its first instruction to execute.
|
||||
*/
|
||||
static void mark_free(struct pl330_thread *thrd, int idx)
|
||||
{
|
||||
struct _pl330_req *req = &thrd->req[idx];
|
||||
|
||||
_emit_END(0, req->mc_cpu);
|
||||
req->mc_len = 0;
|
||||
|
||||
thrd->req_running = -1;
|
||||
}
|
||||
|
||||
static inline u32 _state(struct pl330_thread *thrd)
|
||||
{
|
||||
void __iomem *regs = thrd->dmac->pinfo->base;
|
||||
|
@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
|
|||
}
|
||||
}
|
||||
|
||||
/* If the request 'req' of thread 'thrd' is currently active */
|
||||
static inline bool _req_active(struct pl330_thread *thrd,
|
||||
struct _pl330_req *req)
|
||||
{
|
||||
void __iomem *regs = thrd->dmac->pinfo->base;
|
||||
u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
|
||||
|
||||
if (IS_FREE(req))
|
||||
return false;
|
||||
|
||||
return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
|
||||
}
|
||||
|
||||
/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
|
||||
static inline unsigned _thrd_active(struct pl330_thread *thrd)
|
||||
{
|
||||
if (_req_active(thrd, &thrd->req[0]))
|
||||
return 1; /* First req active */
|
||||
|
||||
if (_req_active(thrd, &thrd->req[1]))
|
||||
return 2; /* Second req active */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void _stop(struct pl330_thread *thrd)
|
||||
{
|
||||
void __iomem *regs = thrd->dmac->pinfo->base;
|
||||
|
@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
|
|||
struct _arg_GO go;
|
||||
unsigned ns;
|
||||
u8 insn[6] = {0, 0, 0, 0, 0, 0};
|
||||
int idx;
|
||||
|
||||
/* Return if already ACTIVE */
|
||||
if (_state(thrd) != PL330_STATE_STOPPED)
|
||||
return true;
|
||||
|
||||
if (!IS_FREE(&thrd->req[1 - thrd->lstenq]))
|
||||
req = &thrd->req[1 - thrd->lstenq];
|
||||
else if (!IS_FREE(&thrd->req[thrd->lstenq]))
|
||||
req = &thrd->req[thrd->lstenq];
|
||||
else
|
||||
req = NULL;
|
||||
idx = 1 - thrd->lstenq;
|
||||
if (!IS_FREE(&thrd->req[idx]))
|
||||
req = &thrd->req[idx];
|
||||
else {
|
||||
idx = thrd->lstenq;
|
||||
if (!IS_FREE(&thrd->req[idx]))
|
||||
req = &thrd->req[idx];
|
||||
else
|
||||
req = NULL;
|
||||
}
|
||||
|
||||
/* Return if no request */
|
||||
if (!req || !req->r)
|
||||
|
@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
|
|||
/* Only manager can execute GO */
|
||||
_execute_DBGINSN(thrd, insn, true);
|
||||
|
||||
thrd->req_running = idx;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
|
|||
|
||||
thrd->req[0].r = NULL;
|
||||
thrd->req[1].r = NULL;
|
||||
MARK_FREE(&thrd->req[0]);
|
||||
MARK_FREE(&thrd->req[1]);
|
||||
mark_free(thrd, 0);
|
||||
mark_free(thrd, 1);
|
||||
|
||||
/* Clear the reset flag */
|
||||
pl330->dmac_tbd.reset_chan &= ~(1 << i);
|
||||
|
@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
|
|||
|
||||
thrd = &pl330->channels[id];
|
||||
|
||||
active = _thrd_active(thrd);
|
||||
if (!active) /* Aborted */
|
||||
active = thrd->req_running;
|
||||
if (active == -1) /* Aborted */
|
||||
continue;
|
||||
|
||||
active -= 1;
|
||||
|
||||
rqdone = &thrd->req[active];
|
||||
MARK_FREE(rqdone);
|
||||
mark_free(thrd, active);
|
||||
|
||||
/* Get going again ASAP */
|
||||
_start(thrd);
|
||||
|
@ -1509,7 +1496,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
|
|||
struct pl330_thread *thrd = ch_id;
|
||||
struct pl330_dmac *pl330;
|
||||
unsigned long flags;
|
||||
int ret = 0, active;
|
||||
int ret = 0, active = thrd->req_running;
|
||||
|
||||
if (!thrd || thrd->free || thrd->dmac->state == DYING)
|
||||
return -EINVAL;
|
||||
|
@ -1525,28 +1512,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
|
|||
|
||||
thrd->req[0].r = NULL;
|
||||
thrd->req[1].r = NULL;
|
||||
MARK_FREE(&thrd->req[0]);
|
||||
MARK_FREE(&thrd->req[1]);
|
||||
mark_free(thrd, 0);
|
||||
mark_free(thrd, 1);
|
||||
break;
|
||||
|
||||
case PL330_OP_ABORT:
|
||||
active = _thrd_active(thrd);
|
||||
|
||||
/* Make sure the channel is stopped */
|
||||
_stop(thrd);
|
||||
|
||||
/* ABORT is only for the active req */
|
||||
if (!active)
|
||||
if (active == -1)
|
||||
break;
|
||||
|
||||
active--;
|
||||
|
||||
thrd->req[active].r = NULL;
|
||||
MARK_FREE(&thrd->req[active]);
|
||||
mark_free(thrd, active);
|
||||
|
||||
/* Start the next */
|
||||
case PL330_OP_START:
|
||||
if (!_thrd_active(thrd) && !_start(thrd))
|
||||
if ((active == -1) && !_start(thrd))
|
||||
ret = -EIO;
|
||||
break;
|
||||
|
||||
|
@ -1587,14 +1570,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
|
|||
else
|
||||
pstatus->faulting = false;
|
||||
|
||||
active = _thrd_active(thrd);
|
||||
active = thrd->req_running;
|
||||
|
||||
if (!active) {
|
||||
if (active == -1) {
|
||||
/* Indicate that the thread is not running */
|
||||
pstatus->top_req = NULL;
|
||||
pstatus->wait_req = NULL;
|
||||
} else {
|
||||
active--;
|
||||
pstatus->top_req = thrd->req[active].r;
|
||||
pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
|
||||
? thrd->req[1 - active].r : NULL;
|
||||
|
@ -1659,9 +1641,9 @@ void *pl330_request_channel(const struct pl330_info *pi)
|
|||
thrd->free = false;
|
||||
thrd->lstenq = 1;
|
||||
thrd->req[0].r = NULL;
|
||||
MARK_FREE(&thrd->req[0]);
|
||||
mark_free(thrd, 0);
|
||||
thrd->req[1].r = NULL;
|
||||
MARK_FREE(&thrd->req[1]);
|
||||
mark_free(thrd, 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -1767,14 +1749,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
|
|||
thrd->req[0].mc_bus = pl330->mcode_bus
|
||||
+ (thrd->id * pi->mcbufsz);
|
||||
thrd->req[0].r = NULL;
|
||||
MARK_FREE(&thrd->req[0]);
|
||||
mark_free(thrd, 0);
|
||||
|
||||
thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
|
||||
+ pi->mcbufsz / 2;
|
||||
thrd->req[1].mc_bus = thrd->req[0].mc_bus
|
||||
+ pi->mcbufsz / 2;
|
||||
thrd->req[1].r = NULL;
|
||||
MARK_FREE(&thrd->req[1]);
|
||||
mark_free(thrd, 1);
|
||||
}
|
||||
|
||||
static int dmac_alloc_threads(struct pl330_dmac *pl330)
|
||||
|
|
|
@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
|
|||
CONFIG_ARCH_IMX_V4_V5=y
|
||||
CONFIG_ARCH_MX1ADS=y
|
||||
CONFIG_MACH_SCB9328=y
|
||||
CONFIG_MACH_APF9328=y
|
||||
CONFIG_MACH_MX21ADS=y
|
||||
CONFIG_MACH_MX25_3DS=y
|
||||
CONFIG_MACH_EUKREA_CPUIMX25=y
|
||||
CONFIG_MACH_EUKREA_CPUIMX25SD=y
|
||||
CONFIG_MACH_MX27ADS=y
|
||||
CONFIG_MACH_PCM038=y
|
||||
CONFIG_MACH_CPUIMX27=y
|
||||
|
@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
|
|||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_MXC=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_EEPROM_AT25=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_SMC91X=y
|
||||
CONFIG_DM9000=y
|
||||
CONFIG_SMC91X=y
|
||||
CONFIG_SMC911X=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
CONFIG_SMSC_PHY=y
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
|
@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_IMX=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_IMX=y
|
||||
CONFIG_SPI_SPIDEV=y
|
||||
CONFIG_W1=y
|
||||
CONFIG_W1_MASTER_MXC=y
|
||||
CONFIG_W1_SLAVE_THERM=y
|
||||
|
@ -139,6 +140,7 @@ CONFIG_MMC=y
|
|||
CONFIG_MMC_MXC=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_MC13783=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
|
|
|
@ -110,11 +110,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_SROMC,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_USB_HSPHY,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
|
||||
|
|
|
@ -132,7 +132,7 @@ config MACH_MX25_3DS
|
|||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
|
||||
config MACH_EUKREA_CPUIMX25
|
||||
config MACH_EUKREA_CPUIMX25SD
|
||||
bool "Support Eukrea CPUIMX25 Platform"
|
||||
select SOC_IMX25
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
|
@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25
|
|||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
depends on MACH_EUKREA_CPUIMX25
|
||||
depends on MACH_EUKREA_CPUIMX25SD
|
||||
default MACH_EUKREA_MBIMXSD25_BASEBOARD
|
||||
|
||||
config MACH_EUKREA_MBIMXSD25_BASEBOARD
|
||||
|
@ -542,7 +542,7 @@ config MACH_MX35_3DS
|
|||
Include support for MX35PDK platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_EUKREA_CPUIMX35
|
||||
config MACH_EUKREA_CPUIMX35SD
|
||||
bool "Support Eukrea CPUIMX35 Platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
|
@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35
|
|||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
depends on MACH_EUKREA_CPUIMX35
|
||||
depends on MACH_EUKREA_CPUIMX35SD
|
||||
default MACH_EUKREA_MBIMXSD35_BASEBOARD
|
||||
|
||||
config MACH_EUKREA_MBIMXSD35_BASEBOARD
|
||||
|
|
|
@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
|
|||
|
||||
# i.MX25 based machines
|
||||
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
|
||||
|
||||
# i.MX27 based machines
|
||||
|
@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
|
|||
# i.MX35 based machines
|
||||
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
|
||||
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
|
||||
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
|
||||
|
||||
|
|
|
@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
|
|||
|
||||
int __init mx35_clocks_init()
|
||||
{
|
||||
unsigned int cgr2 = 3 << 26, cgr3 = 0;
|
||||
unsigned int cgr2 = 3 << 26;
|
||||
|
||||
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
|
||||
cgr2 |= 3 << 16;
|
||||
|
@ -521,6 +521,12 @@ int __init mx35_clocks_init()
|
|||
__raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
|
||||
__raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
|
||||
CCM_BASE + CCM_CGR1);
|
||||
__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
|
||||
__raw_writel(0, CCM_BASE + CCM_CGR3);
|
||||
|
||||
clk_enable(&iim_clk);
|
||||
imx_print_silicon_rev("i.MX35", mx35_revision());
|
||||
clk_disable(&iim_clk);
|
||||
|
||||
/*
|
||||
* Check if we came up in internal boot mode. If yes, we need some
|
||||
|
@ -529,17 +535,11 @@ int __init mx35_clocks_init()
|
|||
*/
|
||||
if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
|
||||
/* Additionally turn on UART1, SCC, and IIM clocks */
|
||||
cgr2 |= 3 << 16 | 3 << 4;
|
||||
cgr3 |= 3 << 2;
|
||||
clk_enable(&iim_clk);
|
||||
clk_enable(&uart1_clk);
|
||||
clk_enable(&scc_clk);
|
||||
}
|
||||
|
||||
__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
|
||||
__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
|
||||
|
||||
clk_enable(&iim_clk);
|
||||
imx_print_silicon_rev("i.MX35", mx35_revision());
|
||||
clk_disable(&iim_clk);
|
||||
|
||||
#ifdef CONFIG_MXC_USE_EPIT
|
||||
epit_timer_init(&epit1_clk,
|
||||
MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
|
||||
|
|
|
@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
|
|||
.bitrate = 100000,
|
||||
};
|
||||
|
||||
#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
|
||||
static int tsc2007_get_pendown_state(void)
|
||||
{
|
||||
return !gpio_get_value(TSC2007_IRQGPIO);
|
||||
}
|
||||
|
||||
static struct tsc2007_platform_data tsc2007_info = {
|
||||
.model = 2007,
|
||||
.x_plate_ohms = 180,
|
||||
.get_pendown_state = tsc2007_get_pendown_state,
|
||||
};
|
||||
|
||||
#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
|
||||
static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8563", 0x51),
|
||||
|
|
|
@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
|||
|
||||
/* 3430ES1-only hwmods */
|
||||
static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
|
||||
&omap3xxx_iva_hwmod,
|
||||
&omap3430es1_dss_core_hwmod,
|
||||
&omap3xxx_mailbox_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* 3430ES2+-only hwmods */
|
||||
static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
|
||||
&omap3xxx_iva_hwmod,
|
||||
&omap3xxx_dss_core_hwmod,
|
||||
&omap3xxx_usbhsotg_hwmod,
|
||||
&omap3xxx_mailbox_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
@ -363,11 +363,13 @@ __v7_setup:
|
|||
orreq r10, r10, #1 << 6 @ set bit #6
|
||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_751472
|
||||
cmp r6, #0x30 @ present prior to r3p0
|
||||
#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
|
||||
ALT_SMP(cmp r6, #0x30) @ present prior to r3p0
|
||||
ALT_UP_B(1f)
|
||||
mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||
orrlt r10, r10, #1 << 11 @ set bit #11
|
||||
mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
1:
|
||||
#endif
|
||||
|
||||
3: mov r10, #0
|
||||
|
|
|
@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
|
||||
static int mxc_cpufreq_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
|
|
|
@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
|
|||
case MACH_TYPE_PCM043:
|
||||
case MACH_TYPE_LILLY1131:
|
||||
case MACH_TYPE_VPR200:
|
||||
case MACH_TYPE_EUKREA_CPUIMX35SD:
|
||||
uart_base = MX3X_UART1_BASE_ADDR;
|
||||
break;
|
||||
case MACH_TYPE_MAGX_ZN5:
|
||||
|
|
|
@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
|
|||
do_div(c, period_ns);
|
||||
duty_cycles = c;
|
||||
|
||||
/*
|
||||
* according to imx pwm RM, the real period value should be
|
||||
* PERIOD value in PWMPR plus 2.
|
||||
*/
|
||||
if (period_cycles > 2)
|
||||
period_cycles -= 2;
|
||||
else
|
||||
period_cycles = 0;
|
||||
|
||||
writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
|
||||
writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
|
||||
|
||||
|
|
|
@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
|
|||
struct orion_gpio_chip *ochip;
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
char gc_label[16];
|
||||
|
||||
if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
|
||||
return;
|
||||
|
||||
snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
|
||||
orion_gpio_chip_count);
|
||||
|
||||
ochip = orion_gpio_chips + orion_gpio_chip_count;
|
||||
ochip->chip.label = "orion_gpio";
|
||||
ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
|
||||
ochip->chip.request = orion_gpio_request;
|
||||
ochip->chip.direction_input = orion_gpio_direction_input;
|
||||
ochip->chip.get = orion_gpio_get;
|
||||
|
|
|
@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
|
|||
extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
|
||||
extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
|
||||
|
||||
extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
|
||||
struct s3c_cpufreq_config *cfg,
|
||||
union s3c_iobank *iob);
|
||||
|
||||
extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
|
||||
struct s3c_cpufreq_config *cfg,
|
||||
union s3c_iobank *iob);
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
|
||||
#define s3c_cpufreq_debugfs_call(x) x
|
||||
#else
|
||||
|
@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
|
|||
extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
|
||||
|
||||
#ifdef CONFIG_S3C2410_IOTIMING
|
||||
extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
|
||||
struct s3c_cpufreq_config *cfg,
|
||||
union s3c_iobank *iob);
|
||||
|
||||
extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
|
||||
struct s3c_iotimings *iot);
|
||||
|
||||
|
@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
|
|||
extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
|
||||
struct s3c_iotimings *iot);
|
||||
#else
|
||||
#define s3c2410_iotiming_debugfs NULL
|
||||
#define s3c2410_iotiming_calc NULL
|
||||
#define s3c2410_iotiming_get NULL
|
||||
#define s3c2410_iotiming_set NULL
|
||||
|
@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
|
|||
|
||||
/* S3C2412 compatible routines */
|
||||
|
||||
extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
|
||||
struct s3c_iotimings *timings);
|
||||
#ifdef CONFIG_S3C2412_IOTIMING
|
||||
extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
|
||||
struct s3c_cpufreq_config *cfg,
|
||||
union s3c_iobank *iob);
|
||||
|
||||
extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
|
||||
struct s3c_iotimings *timings);
|
||||
|
@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
|
|||
|
||||
extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
|
||||
struct s3c_iotimings *iot);
|
||||
#else
|
||||
#define s3c2412_iotiming_debugfs NULL
|
||||
#define s3c2412_iotiming_calc NULL
|
||||
#define s3c2412_iotiming_get NULL
|
||||
#define s3c2412_iotiming_set NULL
|
||||
#endif /* CONFIG_S3C2412_IOTIMING */
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
|
||||
#define s3c_freq_dbg(x...) printk(KERN_INFO x)
|
||||
|
|
|
@ -60,6 +60,7 @@ typedef u64 cputime64_t;
|
|||
*/
|
||||
#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC)
|
||||
#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC)
|
||||
#define usecs_to_cputime64(__usecs) usecs_to_cputime(__usecs)
|
||||
|
||||
/*
|
||||
* Convert cputime <-> seconds
|
||||
|
|
|
@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us)
|
|||
return ct;
|
||||
}
|
||||
|
||||
#define usecs_to_cputime64(us) usecs_to_cputime(us)
|
||||
|
||||
/*
|
||||
* Convert cputime <-> seconds
|
||||
*/
|
||||
|
|
|
@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
|
|||
}
|
||||
#endif
|
||||
|
||||
static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
|
||||
unsigned long pte_index)
|
||||
{
|
||||
unsigned long rb, va_low;
|
||||
|
||||
rb = (v & ~0x7fUL) << 16; /* AVA field */
|
||||
va_low = pte_index >> 3;
|
||||
if (v & HPTE_V_SECONDARY)
|
||||
va_low = ~va_low;
|
||||
/* xor vsid from AVA */
|
||||
if (!(v & HPTE_V_1TB_SEG))
|
||||
va_low ^= v >> 12;
|
||||
else
|
||||
va_low ^= v >> 24;
|
||||
va_low &= 0x7ff;
|
||||
if (v & HPTE_V_LARGE) {
|
||||
rb |= 1; /* L field */
|
||||
if (cpu_has_feature(CPU_FTR_ARCH_206) &&
|
||||
(r & 0xff000)) {
|
||||
/* non-16MB large page, must be 64k */
|
||||
/* (masks depend on page size) */
|
||||
rb |= 0x1000; /* page encoding in LP field */
|
||||
rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
|
||||
rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
|
||||
}
|
||||
} else {
|
||||
/* 4kB page */
|
||||
rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
|
||||
}
|
||||
rb |= (v >> 54) & 0x300; /* B field */
|
||||
return rb;
|
||||
}
|
||||
|
||||
/* Magic register values loaded into r3 and r4 before the 'sc' assembly
|
||||
* instruction for the OSI hypercalls */
|
||||
#define OSI_SC_MAGIC_R3 0x113724FA
|
||||
|
|
|
@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
|
|||
|
||||
#define SPAPR_TCE_SHIFT 12
|
||||
|
||||
static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
|
||||
unsigned long pte_index)
|
||||
{
|
||||
unsigned long rb, va_low;
|
||||
|
||||
rb = (v & ~0x7fUL) << 16; /* AVA field */
|
||||
va_low = pte_index >> 3;
|
||||
if (v & HPTE_V_SECONDARY)
|
||||
va_low = ~va_low;
|
||||
/* xor vsid from AVA */
|
||||
if (!(v & HPTE_V_1TB_SEG))
|
||||
va_low ^= v >> 12;
|
||||
else
|
||||
va_low ^= v >> 24;
|
||||
va_low &= 0x7ff;
|
||||
if (v & HPTE_V_LARGE) {
|
||||
rb |= 1; /* L field */
|
||||
if (cpu_has_feature(CPU_FTR_ARCH_206) &&
|
||||
(r & 0xff000)) {
|
||||
/* non-16MB large page, must be 64k */
|
||||
/* (masks depend on page size) */
|
||||
rb |= 0x1000; /* page encoding in LP field */
|
||||
rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
|
||||
rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
|
||||
}
|
||||
} else {
|
||||
/* 4kB page */
|
||||
rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
|
||||
}
|
||||
rb |= (v >> 54) & 0x300; /* B field */
|
||||
return rb;
|
||||
}
|
||||
|
||||
#endif /* __ASM_KVM_BOOK3S_64_H__ */
|
||||
|
|
|
@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)
|
|||
tpaca->kvm_hstate.napping = 0;
|
||||
vcpu->cpu = vc->pcpu;
|
||||
smp_wmb();
|
||||
#ifdef CONFIG_PPC_ICP_NATIVE
|
||||
#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
|
||||
if (vcpu->arch.ptid) {
|
||||
tpaca->cpu_start = 0x80;
|
||||
wmb();
|
||||
|
|
|
@ -658,10 +658,12 @@ program_interrupt:
|
|||
ulong cmd = kvmppc_get_gpr(vcpu, 3);
|
||||
int i;
|
||||
|
||||
#ifdef CONFIG_KVM_BOOK3S_64_PR
|
||||
if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
|
||||
r = RESUME_GUEST;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
run->papr_hcall.nr = cmd;
|
||||
for (i = 0; i < 9; ++i) {
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/kvm_host.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <asm/reg.h>
|
||||
#include <asm/cputable.h>
|
||||
|
|
|
@ -87,6 +87,8 @@ usecs_to_cputime(const unsigned int m)
|
|||
return (cputime_t) m * 4096;
|
||||
}
|
||||
|
||||
#define usecs_to_cputime64(m) usecs_to_cputime(m)
|
||||
|
||||
/*
|
||||
* Convert cputime to milliseconds and back.
|
||||
*/
|
||||
|
|
|
@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm,
|
|||
if (!irq)
|
||||
return -ENOMEM;
|
||||
|
||||
if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
|
||||
return -EINVAL;
|
||||
if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
|
||||
return -EINVAL;
|
||||
if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
|
||||
return -EINVAL;
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
|
|
@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
|
|||
return HRTIMER_NORESTART;
|
||||
}
|
||||
|
||||
static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
|
||||
static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
|
||||
{
|
||||
struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
|
||||
struct kvm_timer *pt = &ps->pit_timer;
|
||||
s64 interval;
|
||||
|
||||
if (!irqchip_in_kernel(kvm))
|
||||
return;
|
||||
|
||||
interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
|
||||
|
||||
pr_debug("create pit timer, interval is %llu nsec\n", interval);
|
||||
|
@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
|
|||
/* FIXME: enhance mode 4 precision */
|
||||
case 4:
|
||||
if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
|
||||
create_pit_timer(ps, val, 0);
|
||||
create_pit_timer(kvm, val, 0);
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
case 3:
|
||||
if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
|
||||
create_pit_timer(ps, val, 1);
|
||||
create_pit_timer(kvm, val, 1);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
|
|
|
@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
|
|||
{
|
||||
struct kvm_cpuid_entry2 *best;
|
||||
struct kvm_lapic *apic = vcpu->arch.apic;
|
||||
u32 timer_mode_mask;
|
||||
|
||||
best = kvm_find_cpuid_entry(vcpu, 1, 0);
|
||||
if (!best)
|
||||
|
@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
|
|||
best->ecx |= bit(X86_FEATURE_OSXSAVE);
|
||||
}
|
||||
|
||||
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
|
||||
best->function == 0x1) {
|
||||
best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER);
|
||||
timer_mode_mask = 3 << 17;
|
||||
} else
|
||||
timer_mode_mask = 1 << 17;
|
||||
|
||||
if (apic)
|
||||
apic->lapic_timer.timer_mode_mask = timer_mode_mask;
|
||||
if (apic) {
|
||||
if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
|
||||
apic->lapic_timer.timer_mode_mask = 3 << 17;
|
||||
else
|
||||
apic->lapic_timer.timer_mode_mask = 1 << 17;
|
||||
}
|
||||
}
|
||||
|
||||
int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
|
||||
|
@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
|
|||
case KVM_CAP_TSC_CONTROL:
|
||||
r = kvm_has_tsc_control;
|
||||
break;
|
||||
case KVM_CAP_TSC_DEADLINE_TIMER:
|
||||
r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
|
||||
break;
|
||||
default:
|
||||
r = 0;
|
||||
break;
|
||||
|
|
|
@ -568,8 +568,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i];
|
|||
break;
|
||||
}
|
||||
if (filter[i].jt != 0) {
|
||||
if (filter[i].jf)
|
||||
t_offset += is_near(f_offset) ? 2 : 6;
|
||||
if (filter[i].jf && f_offset)
|
||||
t_offset += is_near(f_offset) ? 2 : 5;
|
||||
EMIT_COND_JMP(t_op, t_offset);
|
||||
if (filter[i].jf)
|
||||
EMIT_JMP(f_offset);
|
||||
|
|
|
@ -311,7 +311,7 @@ int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf,
|
|||
if (IS_ERR(bio))
|
||||
return PTR_ERR(bio);
|
||||
|
||||
if (rq_data_dir(rq) == WRITE)
|
||||
if (!reading)
|
||||
bio->bi_rw |= REQ_WRITE;
|
||||
|
||||
if (do_copy)
|
||||
|
|
|
@ -282,18 +282,9 @@ EXPORT_SYMBOL(blk_queue_resize_tags);
|
|||
void blk_queue_end_tag(struct request_queue *q, struct request *rq)
|
||||
{
|
||||
struct blk_queue_tag *bqt = q->queue_tags;
|
||||
int tag = rq->tag;
|
||||
unsigned tag = rq->tag; /* negative tags invalid */
|
||||
|
||||
BUG_ON(tag == -1);
|
||||
|
||||
if (unlikely(tag >= bqt->max_depth)) {
|
||||
/*
|
||||
* This can happen after tag depth has been reduced.
|
||||
* But tag shouldn't be larger than real_max_depth.
|
||||
*/
|
||||
WARN_ON(tag >= bqt->real_max_depth);
|
||||
return;
|
||||
}
|
||||
BUG_ON(tag >= bqt->real_max_depth);
|
||||
|
||||
list_del_init(&rq->queuelist);
|
||||
rq->cmd_flags &= ~REQ_QUEUED;
|
||||
|
|
|
@ -1655,6 +1655,8 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,
|
|||
struct request *next)
|
||||
{
|
||||
struct cfq_queue *cfqq = RQ_CFQQ(rq);
|
||||
struct cfq_data *cfqd = q->elevator->elevator_data;
|
||||
|
||||
/*
|
||||
* reposition in fifo if next is older than rq
|
||||
*/
|
||||
|
@ -1669,6 +1671,16 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,
|
|||
cfq_remove_request(next);
|
||||
cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg,
|
||||
rq_data_dir(next), rq_is_sync(next));
|
||||
|
||||
cfqq = RQ_CFQQ(next);
|
||||
/*
|
||||
* all requests of this queue are merged to other queues, delete it
|
||||
* from the service tree. If it's the active_queue,
|
||||
* cfq_dispatch_requests() will choose to expire it or do idle
|
||||
*/
|
||||
if (cfq_cfqq_on_rr(cfqq) && RB_EMPTY_ROOT(&cfqq->sort_list) &&
|
||||
cfqq != cfqd->active_queue)
|
||||
cfq_del_cfqq_rr(cfqd, cfqq);
|
||||
}
|
||||
|
||||
static int cfq_allow_merge(struct request_queue *q, struct request *rq,
|
||||
|
|
|
@ -820,7 +820,7 @@ config PATA_PLATFORM
|
|||
|
||||
config PATA_OF_PLATFORM
|
||||
tristate "OpenFirmware platform device PATA support"
|
||||
depends on PATA_PLATFORM && OF
|
||||
depends on PATA_PLATFORM && OF && OF_IRQ
|
||||
help
|
||||
This option enables support for generic directly connected ATA
|
||||
devices commonly found on embedded systems with OpenFirmware
|
||||
|
|
|
@ -124,7 +124,7 @@ config MV_XOR
|
|||
|
||||
config MX3_IPU
|
||||
bool "MX3x Image Processing Unit support"
|
||||
depends on ARCH_MX3
|
||||
depends on SOC_IMX31 || SOC_IMX35
|
||||
select DMA_ENGINE
|
||||
default y
|
||||
help
|
||||
|
@ -216,7 +216,7 @@ config PCH_DMA
|
|||
|
||||
config IMX_SDMA
|
||||
tristate "i.MX SDMA support"
|
||||
depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
|
||||
depends on ARCH_MX25 || SOC_IMX31 || SOC_IMX35 || ARCH_MX5
|
||||
select DMA_ENGINE
|
||||
help
|
||||
Support the i.MX SDMA engine. This engine is integrated into
|
||||
|
|
|
@ -756,9 +756,9 @@ intel_enable_semaphores(struct drm_device *dev)
|
|||
if (i915_semaphores >= 0)
|
||||
return i915_semaphores;
|
||||
|
||||
/* Enable semaphores on SNB when IO remapping is off */
|
||||
/* Disable semaphores on SNB */
|
||||
if (INTEL_INFO(dev)->gen == 6)
|
||||
return !intel_iommu_enabled;
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -7922,13 +7922,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
|
|||
return 0;
|
||||
|
||||
/*
|
||||
* Enable rc6 on Sandybridge if DMA remapping is disabled
|
||||
* Disable rc6 on Sandybridge
|
||||
*/
|
||||
if (INTEL_INFO(dev)->gen == 6) {
|
||||
DRM_DEBUG_DRIVER("Sandybridge: intel_iommu_enabled %s -- RC6 %sabled\n",
|
||||
intel_iommu_enabled ? "true" : "false",
|
||||
!intel_iommu_enabled ? "en" : "dis");
|
||||
return !intel_iommu_enabled;
|
||||
DRM_DEBUG_DRIVER("Sandybridge: RC6 disabled\n");
|
||||
return 0;
|
||||
}
|
||||
DRM_DEBUG_DRIVER("RC6 enabled\n");
|
||||
return 1;
|
||||
|
|
|
@ -3276,6 +3276,18 @@ int evergreen_init(struct radeon_device *rdev)
|
|||
rdev->accel_working = false;
|
||||
}
|
||||
}
|
||||
|
||||
/* Don't start up if the MC ucode is missing on BTC parts.
|
||||
* The default clocks and voltages before the MC ucode
|
||||
* is loaded are not suffient for advanced operations.
|
||||
*/
|
||||
if (ASIC_IS_DCE5(rdev)) {
|
||||
if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) {
|
||||
DRM_ERROR("radeon: MC ucode required for NI+.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -2560,7 +2560,11 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
|
|||
|
||||
rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;
|
||||
rdev->pm.current_clock_mode_index = 0;
|
||||
rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage;
|
||||
if (rdev->pm.default_power_state_index >= 0)
|
||||
rdev->pm.current_vddc =
|
||||
rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage;
|
||||
else
|
||||
rdev->pm.current_vddc = 0;
|
||||
}
|
||||
|
||||
void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable)
|
||||
|
|
|
@ -1093,7 +1093,6 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
|
|||
struct vmw_surface *surface = NULL;
|
||||
struct vmw_dma_buffer *bo = NULL;
|
||||
struct ttm_base_object *user_obj;
|
||||
u64 required_size;
|
||||
int ret;
|
||||
|
||||
/**
|
||||
|
@ -1102,8 +1101,9 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
|
|||
* requested framebuffer.
|
||||
*/
|
||||
|
||||
required_size = mode_cmd->pitch * mode_cmd->height;
|
||||
if (unlikely(required_size > (u64) dev_priv->vram_size)) {
|
||||
if (!vmw_kms_validate_mode_vram(dev_priv,
|
||||
mode_cmd->pitch,
|
||||
mode_cmd->height)) {
|
||||
DRM_ERROR("VRAM size is too small for requested mode.\n");
|
||||
return ERR_PTR(-ENOMEM);
|
||||
}
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Finger Sensing Pad PS/2 mouse driver.
|
||||
*
|
||||
* Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
|
||||
* Copyright (C) 2005-2010 Tai-hwa Liang, Sentelic Corporation.
|
||||
* Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -162,7 +162,7 @@ static int fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val)
|
|||
ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2);
|
||||
|
||||
if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0)
|
||||
return -1;
|
||||
goto out;
|
||||
|
||||
if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
|
||||
/* inversion is required */
|
||||
|
@ -261,7 +261,7 @@ static int fsp_page_reg_write(struct psmouse *psmouse, int reg_val)
|
|||
ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2);
|
||||
|
||||
if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0)
|
||||
return -1;
|
||||
goto out;
|
||||
|
||||
if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
|
||||
ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2);
|
||||
|
@ -309,7 +309,7 @@ static int fsp_get_buttons(struct psmouse *psmouse, int *btn)
|
|||
};
|
||||
int val;
|
||||
|
||||
if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &val) == -1)
|
||||
if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS, &val) == -1)
|
||||
return -EIO;
|
||||
|
||||
*btn = buttons[(val & 0x30) >> 4];
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* Finger Sensing Pad PS/2 mouse driver.
|
||||
*
|
||||
* Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
|
||||
* Copyright (C) 2005-2009 Tai-hwa Liang, Sentelic Corporation.
|
||||
* Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -33,6 +33,7 @@
|
|||
/* Finger-sensing Pad control registers */
|
||||
#define FSP_REG_SYSCTL1 0x10
|
||||
#define FSP_BIT_EN_REG_CLK BIT(5)
|
||||
#define FSP_REG_TMOD_STATUS 0x20
|
||||
#define FSP_REG_OPC_QDOWN 0x31
|
||||
#define FSP_BIT_EN_OPC_TAG BIT(7)
|
||||
#define FSP_REG_OPTZ_XLO 0x34
|
||||
|
|
|
@ -90,7 +90,7 @@ struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
|
|||
if (bus == NULL || bus->iommu_ops == NULL)
|
||||
return NULL;
|
||||
|
||||
domain = kmalloc(sizeof(*domain), GFP_KERNEL);
|
||||
domain = kzalloc(sizeof(*domain), GFP_KERNEL);
|
||||
if (!domain)
|
||||
return NULL;
|
||||
|
||||
|
|
|
@ -1393,9 +1393,6 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto
|
|||
atomic_read(&bitmap->behind_writes),
|
||||
bitmap->mddev->bitmap_info.max_write_behind);
|
||||
}
|
||||
if (bitmap->mddev->degraded)
|
||||
/* Never clear bits or update events_cleared when degraded */
|
||||
success = 0;
|
||||
|
||||
while (sectors) {
|
||||
sector_t blocks;
|
||||
|
@ -1409,7 +1406,7 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto
|
|||
return;
|
||||
}
|
||||
|
||||
if (success &&
|
||||
if (success && !bitmap->mddev->degraded &&
|
||||
bitmap->events_cleared < bitmap->mddev->events) {
|
||||
bitmap->events_cleared = bitmap->mddev->events;
|
||||
bitmap->need_sync = 1;
|
||||
|
|
|
@ -230,6 +230,7 @@ static int linear_add(struct mddev *mddev, struct md_rdev *rdev)
|
|||
return -EINVAL;
|
||||
|
||||
rdev->raid_disk = rdev->saved_raid_disk;
|
||||
rdev->saved_raid_disk = -1;
|
||||
|
||||
newconf = linear_conf(mddev,mddev->raid_disks+1);
|
||||
|
||||
|
|
|
@ -7360,8 +7360,7 @@ static int remove_and_add_spares(struct mddev *mddev)
|
|||
spares++;
|
||||
md_new_event(mddev);
|
||||
set_bit(MD_CHANGE_DEVS, &mddev->flags);
|
||||
} else
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -3065,11 +3065,17 @@ static void analyse_stripe(struct stripe_head *sh, struct stripe_head_state *s)
|
|||
}
|
||||
} else if (test_bit(In_sync, &rdev->flags))
|
||||
set_bit(R5_Insync, &dev->flags);
|
||||
else {
|
||||
else if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset)
|
||||
/* in sync if before recovery_offset */
|
||||
if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset)
|
||||
set_bit(R5_Insync, &dev->flags);
|
||||
}
|
||||
set_bit(R5_Insync, &dev->flags);
|
||||
else if (test_bit(R5_UPTODATE, &dev->flags) &&
|
||||
test_bit(R5_Expanded, &dev->flags))
|
||||
/* If we've reshaped into here, we assume it is Insync.
|
||||
* We will shortly update recovery_offset to make
|
||||
* it official.
|
||||
*/
|
||||
set_bit(R5_Insync, &dev->flags);
|
||||
|
||||
if (rdev && test_bit(R5_WriteError, &dev->flags)) {
|
||||
clear_bit(R5_Insync, &dev->flags);
|
||||
if (!test_bit(Faulty, &rdev->flags)) {
|
||||
|
|
|
@ -838,13 +838,13 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
|
|||
gspca_dev->usb_err = 0;
|
||||
|
||||
/* do the specific subdriver stuff before endpoint selection */
|
||||
gspca_dev->alt = 0;
|
||||
intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
|
||||
gspca_dev->alt = gspca_dev->cam.bulk ? intf->num_altsetting : 0;
|
||||
if (gspca_dev->sd_desc->isoc_init) {
|
||||
ret = gspca_dev->sd_desc->isoc_init(gspca_dev);
|
||||
if (ret < 0)
|
||||
goto unlock;
|
||||
}
|
||||
intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
|
||||
xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK
|
||||
: USB_ENDPOINT_XFER_ISOC;
|
||||
|
||||
|
@ -957,7 +957,7 @@ retry:
|
|||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
alt = ep_tb[--alt_idx].alt;
|
||||
gspca_dev->alt = ep_tb[--alt_idx].alt;
|
||||
}
|
||||
}
|
||||
out:
|
||||
|
|
|
@ -1408,7 +1408,7 @@ static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
|
|||
{
|
||||
struct isp_pipeline *pipe =
|
||||
to_isp_pipeline(&ccdc->video_out.video.entity);
|
||||
struct video_device *vdev = &ccdc->subdev.devnode;
|
||||
struct video_device *vdev = ccdc->subdev.devnode;
|
||||
struct v4l2_event event;
|
||||
|
||||
memset(&event, 0, sizeof(event));
|
||||
|
|
|
@ -496,7 +496,7 @@ static int isp_stat_bufs_alloc(struct ispstat *stat, u32 size)
|
|||
|
||||
static void isp_stat_queue_event(struct ispstat *stat, int err)
|
||||
{
|
||||
struct video_device *vdev = &stat->subdev.devnode;
|
||||
struct video_device *vdev = stat->subdev.devnode;
|
||||
struct v4l2_event event;
|
||||
struct omap3isp_stat_event_status *status = (void *)event.u.data;
|
||||
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
* Debugfs support for the AB5500 MFD driver
|
||||
*/
|
||||
|
||||
#include <linux/export.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/mfd/ab5500/ab5500.h>
|
||||
|
|
|
@ -620,6 +620,7 @@ static struct resource __devinitdata ab8500_fg_resources[] = {
|
|||
|
||||
static struct resource __devinitdata ab8500_chargalg_resources[] = {};
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static struct resource __devinitdata ab8500_debug_resources[] = {
|
||||
{
|
||||
.name = "IRQ_FIRST",
|
||||
|
@ -634,6 +635,7 @@ static struct resource __devinitdata ab8500_debug_resources[] = {
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct resource __devinitdata ab8500_usb_resources[] = {
|
||||
{
|
||||
|
|
|
@ -109,7 +109,7 @@ int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask)
|
|||
|
||||
ret = __adp5520_read(chip->client, reg, ®_val);
|
||||
|
||||
if (!ret && ((reg_val & bit_mask) == 0)) {
|
||||
if (!ret && ((reg_val & bit_mask) != bit_mask)) {
|
||||
reg_val |= bit_mask;
|
||||
ret = __adp5520_write(chip->client, reg, reg_val);
|
||||
}
|
||||
|
|
|
@ -182,7 +182,7 @@ int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
|
|||
if (ret)
|
||||
goto out;
|
||||
|
||||
if ((reg_val & bit_mask) == 0) {
|
||||
if ((reg_val & bit_mask) != bit_mask) {
|
||||
reg_val |= bit_mask;
|
||||
ret = __da903x_write(chip->client, reg, reg_val);
|
||||
}
|
||||
|
@ -549,6 +549,7 @@ static int __devexit da903x_remove(struct i2c_client *client)
|
|||
struct da903x_chip *chip = i2c_get_clientdata(client);
|
||||
|
||||
da903x_remove_subdevs(chip);
|
||||
free_irq(client->irq, chip);
|
||||
kfree(chip);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kernel.h>
|
||||
|
|
|
@ -197,7 +197,7 @@ int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
|
|||
if (ret)
|
||||
goto out;
|
||||
|
||||
if ((reg_val & bit_mask) == 0) {
|
||||
if ((reg_val & bit_mask) != bit_mask) {
|
||||
reg_val |= bit_mask;
|
||||
ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val);
|
||||
}
|
||||
|
|
|
@ -120,7 +120,7 @@ int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask)
|
|||
goto out;
|
||||
}
|
||||
|
||||
data &= mask;
|
||||
data &= ~mask;
|
||||
err = tps65910_i2c_write(tps65910, reg, 1, &data);
|
||||
if (err)
|
||||
dev_err(tps65910->dev, "write to reg %x failed\n", reg);
|
||||
|
|
|
@ -363,13 +363,13 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
|
|||
pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
|
||||
return -EPERM;
|
||||
}
|
||||
if (unlikely(!inuse)) {
|
||||
pr_err("%s: not initialized\n", DRIVER_NAME);
|
||||
return -EPERM;
|
||||
}
|
||||
sid = twl_map[mod_no].sid;
|
||||
twl = &twl_modules[sid];
|
||||
|
||||
if (unlikely(!inuse)) {
|
||||
pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
|
||||
return -EPERM;
|
||||
}
|
||||
mutex_lock(&twl->xfer_lock);
|
||||
/*
|
||||
* [MSG1]: fill the register address data
|
||||
|
@ -420,13 +420,13 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
|
|||
pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
|
||||
return -EPERM;
|
||||
}
|
||||
if (unlikely(!inuse)) {
|
||||
pr_err("%s: not initialized\n", DRIVER_NAME);
|
||||
return -EPERM;
|
||||
}
|
||||
sid = twl_map[mod_no].sid;
|
||||
twl = &twl_modules[sid];
|
||||
|
||||
if (unlikely(!inuse)) {
|
||||
pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
|
||||
return -EPERM;
|
||||
}
|
||||
mutex_lock(&twl->xfer_lock);
|
||||
/* [MSG1] fill the register address data */
|
||||
msg = &twl->xfer_msg[0];
|
||||
|
|
|
@ -432,6 +432,7 @@ struct sih_agent {
|
|||
u32 edge_change;
|
||||
|
||||
struct mutex irq_lock;
|
||||
char *irq_name;
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
@ -589,7 +590,7 @@ static inline int sih_read_isr(const struct sih *sih)
|
|||
* Generic handler for SIH interrupts ... we "know" this is called
|
||||
* in task context, with IRQs enabled.
|
||||
*/
|
||||
static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc)
|
||||
static irqreturn_t handle_twl4030_sih(int irq, void *data)
|
||||
{
|
||||
struct sih_agent *agent = irq_get_handler_data(irq);
|
||||
const struct sih *sih = agent->sih;
|
||||
|
@ -602,7 +603,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc)
|
|||
pr_err("twl4030: %s SIH, read ISR error %d\n",
|
||||
sih->name, isr);
|
||||
/* REVISIT: recover; eventually mask it all, etc */
|
||||
return;
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
while (isr) {
|
||||
|
@ -616,6 +617,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc)
|
|||
pr_err("twl4030: %s SIH, invalid ISR bit %d\n",
|
||||
sih->name, irq);
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static unsigned twl4030_irq_next;
|
||||
|
@ -668,18 +670,19 @@ int twl4030_sih_setup(int module)
|
|||
activate_irq(irq);
|
||||
}
|
||||
|
||||
status = irq_base;
|
||||
twl4030_irq_next += i;
|
||||
|
||||
/* replace generic PIH handler (handle_simple_irq) */
|
||||
irq = sih_mod + twl4030_irq_base;
|
||||
irq_set_handler_data(irq, agent);
|
||||
irq_set_chained_handler(irq, handle_twl4030_sih);
|
||||
agent->irq_name = kasprintf(GFP_KERNEL, "twl4030_%s", sih->name);
|
||||
status = request_threaded_irq(irq, NULL, handle_twl4030_sih, 0,
|
||||
agent->irq_name ?: sih->name, NULL);
|
||||
|
||||
pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name,
|
||||
irq, irq_base, twl4030_irq_next - 1);
|
||||
|
||||
return status;
|
||||
return status < 0 ? status : irq_base;
|
||||
}
|
||||
|
||||
/* FIXME need a call to reverse twl4030_sih_setup() ... */
|
||||
|
@ -733,8 +736,9 @@ int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
|
|||
}
|
||||
|
||||
/* install an irq handler to demultiplex the TWL4030 interrupt */
|
||||
status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih, 0,
|
||||
"TWL4030-PIH", NULL);
|
||||
status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih,
|
||||
IRQF_ONESHOT,
|
||||
"TWL4030-PIH", NULL);
|
||||
if (status < 0) {
|
||||
pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status);
|
||||
goto fail_rqirq;
|
||||
|
|
|
@ -239,6 +239,7 @@ static int wm8994_suspend(struct device *dev)
|
|||
|
||||
switch (wm8994->type) {
|
||||
case WM8958:
|
||||
case WM1811:
|
||||
ret = wm8994_reg_read(wm8994, WM8958_MIC_DETECT_1);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to read power status: %d\n", ret);
|
||||
|
|
|
@ -675,7 +675,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
|
|||
unsigned int status)
|
||||
{
|
||||
/* First check for errors */
|
||||
if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
|
||||
if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR|
|
||||
MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
|
||||
u32 remain, success;
|
||||
|
||||
/* Terminate the DMA transfer */
|
||||
|
@ -754,8 +755,12 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
|
|||
}
|
||||
|
||||
if (!cmd->data || cmd->error) {
|
||||
if (host->data)
|
||||
if (host->data) {
|
||||
/* Terminate the DMA transfer */
|
||||
if (dma_inprogress(host))
|
||||
mmci_dma_data_error(host);
|
||||
mmci_stop_data(host);
|
||||
}
|
||||
mmci_request_end(host, cmd->mrq);
|
||||
} else if (!(cmd->data->flags & MMC_DATA_READ)) {
|
||||
mmci_start_data(host, cmd->data);
|
||||
|
@ -955,8 +960,9 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
|
|||
dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status);
|
||||
|
||||
data = host->data;
|
||||
if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
|
||||
MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
|
||||
if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR|
|
||||
MCI_TXUNDERRUN|MCI_RXOVERRUN|MCI_DATAEND|
|
||||
MCI_DATABLOCKEND) && data)
|
||||
mmci_data_irq(host, data, status);
|
||||
|
||||
cmd = host->cmd;
|
||||
|
|
|
@ -23,8 +23,8 @@ if NET_VENDOR_FREESCALE
|
|||
config FEC
|
||||
bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
|
||||
depends on (M523x || M527x || M5272 || M528x || M520x || M532x || \
|
||||
ARCH_MXC || ARCH_MXS)
|
||||
default ARCH_MXC || ARCH_MXS if ARM
|
||||
ARCH_MXC || SOC_IMX28)
|
||||
default ARCH_MXC || SOC_IMX28 if ARM
|
||||
select PHYLIB
|
||||
---help---
|
||||
Say Y here if you want to use the built-in 10/100 Fast ethernet
|
||||
|
|
|
@ -2606,6 +2606,9 @@ static int skge_up(struct net_device *dev)
|
|||
spin_unlock_irq(&hw->hw_lock);
|
||||
|
||||
napi_enable(&skge->napi);
|
||||
|
||||
skge_set_multicast(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
free_tx_ring:
|
||||
|
|
|
@ -147,6 +147,7 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
|
|||
mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
|
||||
if (priv->mdev->dev->caps.comp_pool && cq->vector)
|
||||
mlx4_release_eq(priv->mdev->dev, cq->vector);
|
||||
cq->vector = 0;
|
||||
cq->buf_size = 0;
|
||||
cq->buf = NULL;
|
||||
}
|
||||
|
|
|
@ -477,7 +477,6 @@ enum rtl_register_content {
|
|||
/* Config1 register p.24 */
|
||||
LEDS1 = (1 << 7),
|
||||
LEDS0 = (1 << 6),
|
||||
MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */
|
||||
Speed_down = (1 << 4),
|
||||
MEMMAP = (1 << 3),
|
||||
IOMAP = (1 << 2),
|
||||
|
@ -485,6 +484,7 @@ enum rtl_register_content {
|
|||
PMEnable = (1 << 0), /* Power Management Enable */
|
||||
|
||||
/* Config2 register p. 25 */
|
||||
MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */
|
||||
PCI_Clock_66MHz = 0x01,
|
||||
PCI_Clock_33MHz = 0x00,
|
||||
|
||||
|
@ -3426,22 +3426,24 @@ static const struct rtl_cfg_info {
|
|||
};
|
||||
|
||||
/* Cfg9346_Unlock assumed. */
|
||||
static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
|
||||
static unsigned rtl_try_msi(struct rtl8169_private *tp,
|
||||
const struct rtl_cfg_info *cfg)
|
||||
{
|
||||
void __iomem *ioaddr = tp->mmio_addr;
|
||||
unsigned msi = 0;
|
||||
u8 cfg2;
|
||||
|
||||
cfg2 = RTL_R8(Config2) & ~MSIEnable;
|
||||
if (cfg->features & RTL_FEATURE_MSI) {
|
||||
if (pci_enable_msi(pdev)) {
|
||||
dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
|
||||
if (pci_enable_msi(tp->pci_dev)) {
|
||||
netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
|
||||
} else {
|
||||
cfg2 |= MSIEnable;
|
||||
msi = RTL_FEATURE_MSI;
|
||||
}
|
||||
}
|
||||
RTL_W8(Config2, cfg2);
|
||||
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
|
||||
RTL_W8(Config2, cfg2);
|
||||
return msi;
|
||||
}
|
||||
|
||||
|
@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
tp->features |= RTL_FEATURE_WOL;
|
||||
if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
|
||||
tp->features |= RTL_FEATURE_WOL;
|
||||
tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
|
||||
tp->features |= rtl_try_msi(tp, cfg);
|
||||
RTL_W8(Cfg9346, Cfg9346_Lock);
|
||||
|
||||
if (rtl_tbi_enabled(tp)) {
|
||||
|
|
|
@ -836,11 +836,13 @@ int cpdma_chan_stop(struct cpdma_chan *chan)
|
|||
chan_write(chan, cp, CPDMA_TEARDOWN_VALUE);
|
||||
|
||||
/* handle completed packets */
|
||||
spin_unlock_irqrestore(&chan->lock, flags);
|
||||
do {
|
||||
ret = __cpdma_chan_process(chan);
|
||||
if (ret < 0)
|
||||
break;
|
||||
} while ((ret & CPDMA_DESC_TD_COMPLETE) == 0);
|
||||
spin_lock_irqsave(&chan->lock, flags);
|
||||
|
||||
/* remaining packets haven't been tx/rx'ed, clean them up */
|
||||
while (chan->head) {
|
||||
|
|
|
@ -1655,6 +1655,10 @@ static const struct usb_device_id products [] = {
|
|||
// ASIX 88772a
|
||||
USB_DEVICE(0x0db0, 0xa877),
|
||||
.driver_info = (unsigned long) &ax88772_info,
|
||||
}, {
|
||||
// Asus USB Ethernet Adapter
|
||||
USB_DEVICE (0x0b95, 0x7e2b),
|
||||
.driver_info = (unsigned long) &ax88772_info,
|
||||
},
|
||||
{ }, // END
|
||||
};
|
||||
|
|
|
@ -1843,6 +1843,9 @@ static void ath9k_sta_notify(struct ieee80211_hw *hw,
|
|||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_node *an = (struct ath_node *) sta->drv_priv;
|
||||
|
||||
if (!(sc->sc_flags & SC_OP_TXAGGR))
|
||||
return;
|
||||
|
||||
switch (cmd) {
|
||||
case STA_NOTIFY_SLEEP:
|
||||
an->sleeping = true;
|
||||
|
|
|
@ -1271,7 +1271,9 @@ static void ath_rc_init(struct ath_softc *sc,
|
|||
|
||||
ath_rc_priv->max_valid_rate = k;
|
||||
ath_rc_sort_validrates(rate_table, ath_rc_priv);
|
||||
ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4];
|
||||
ath_rc_priv->rate_max_phy = (k > 4) ?
|
||||
ath_rc_priv->valid_rate_index[k-4] :
|
||||
ath_rc_priv->valid_rate_index[k-1];
|
||||
ath_rc_priv->rate_table = rate_table;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
|
|
|
@ -617,9 +617,19 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
|
|||
const char *err_msg = NULL;
|
||||
struct b43_rxhdr_fw4 *rxhdr =
|
||||
(struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
|
||||
size_t rxhdr_size = sizeof(*rxhdr);
|
||||
|
||||
BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
|
||||
memset(rxhdr, 0, sizeof(*rxhdr));
|
||||
switch (dev->fw.hdr_format) {
|
||||
case B43_FW_HDR_410:
|
||||
case B43_FW_HDR_351:
|
||||
rxhdr_size -= sizeof(rxhdr->format_598) -
|
||||
sizeof(rxhdr->format_351);
|
||||
break;
|
||||
case B43_FW_HDR_598:
|
||||
break;
|
||||
}
|
||||
memset(rxhdr, 0, rxhdr_size);
|
||||
|
||||
/* Check if we have data and wait for it to get ready. */
|
||||
if (q->rev >= 8) {
|
||||
|
@ -657,11 +667,11 @@ data_ready:
|
|||
|
||||
/* Get the preamble (RX header) */
|
||||
if (q->rev >= 8) {
|
||||
b43_block_read(dev, rxhdr, sizeof(*rxhdr),
|
||||
b43_block_read(dev, rxhdr, rxhdr_size,
|
||||
q->mmio_base + B43_PIO8_RXDATA,
|
||||
sizeof(u32));
|
||||
} else {
|
||||
b43_block_read(dev, rxhdr, sizeof(*rxhdr),
|
||||
b43_block_read(dev, rxhdr, rxhdr_size,
|
||||
q->mmio_base + B43_PIO_RXDATA,
|
||||
sizeof(u16));
|
||||
}
|
||||
|
|
|
@ -606,8 +606,8 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)
|
|||
if (ctx->ht.enabled) {
|
||||
/* if HT40 is used, it should not change
|
||||
* after associated except channel switch */
|
||||
if (iwl_is_associated_ctx(ctx) &&
|
||||
!ctx->ht.is_40mhz)
|
||||
if (!ctx->ht.is_40mhz ||
|
||||
!iwl_is_associated_ctx(ctx))
|
||||
iwlagn_config_ht40(conf, ctx);
|
||||
} else
|
||||
ctx->ht.is_40mhz = false;
|
||||
|
|
|
@ -91,7 +91,10 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
|
|||
tx_cmd->tid_tspec = qc[0] & 0xf;
|
||||
tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
} else {
|
||||
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
|
||||
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
else
|
||||
tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
}
|
||||
|
||||
iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags);
|
||||
|
|
|
@ -2850,6 +2850,9 @@ static int iwlagn_mac_tx_sync(struct ieee80211_hw *hw,
|
|||
int ret;
|
||||
u8 sta_id;
|
||||
|
||||
if (ctx->ctxid != IWL_RXON_CTX_PAN)
|
||||
return 0;
|
||||
|
||||
IWL_DEBUG_MAC80211(priv, "enter\n");
|
||||
mutex_lock(&priv->shrd->mutex);
|
||||
|
||||
|
@ -2898,6 +2901,9 @@ static void iwlagn_mac_finish_tx_sync(struct ieee80211_hw *hw,
|
|||
struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
|
||||
struct iwl_rxon_context *ctx = vif_priv->ctx;
|
||||
|
||||
if (ctx->ctxid != IWL_RXON_CTX_PAN)
|
||||
return;
|
||||
|
||||
IWL_DEBUG_MAC80211(priv, "enter\n");
|
||||
mutex_lock(&priv->shrd->mutex);
|
||||
|
||||
|
|
|
@ -1197,9 +1197,7 @@ static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
|
|||
iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
|
||||
|
||||
/* Set up entry for this TFD in Tx byte-count array */
|
||||
if (is_agg)
|
||||
iwl_trans_txq_update_byte_cnt_tbl(trans, txq,
|
||||
le16_to_cpu(tx_cmd->len));
|
||||
iwl_trans_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len));
|
||||
|
||||
dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen,
|
||||
DMA_BIDIRECTIONAL);
|
||||
|
|
|
@ -939,7 +939,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
|
|||
{
|
||||
struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL;
|
||||
unsigned long cmd_flags;
|
||||
unsigned long cmd_pending_q_flags;
|
||||
unsigned long scan_pending_q_flags;
|
||||
uint16_t cancel_scan_cmd = false;
|
||||
|
||||
|
@ -949,12 +948,9 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
|
|||
cmd_node = adapter->curr_cmd;
|
||||
cmd_node->wait_q_enabled = false;
|
||||
cmd_node->cmd_flag |= CMD_F_CANCELED;
|
||||
spin_lock_irqsave(&adapter->cmd_pending_q_lock,
|
||||
cmd_pending_q_flags);
|
||||
list_del(&cmd_node->list);
|
||||
spin_unlock_irqrestore(&adapter->cmd_pending_q_lock,
|
||||
cmd_pending_q_flags);
|
||||
mwifiex_insert_cmd_to_free_q(adapter, cmd_node);
|
||||
mwifiex_complete_cmd(adapter, adapter->curr_cmd);
|
||||
adapter->curr_cmd = NULL;
|
||||
spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags);
|
||||
}
|
||||
|
||||
|
@ -981,7 +977,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
|
|||
spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags);
|
||||
}
|
||||
adapter->cmd_wait_q.status = -1;
|
||||
mwifiex_complete_cmd(adapter, adapter->curr_cmd);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -55,9 +55,14 @@ int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter)
|
|||
{
|
||||
bool cancel_flag = false;
|
||||
int status = adapter->cmd_wait_q.status;
|
||||
struct cmd_ctrl_node *cmd_queued = adapter->cmd_queued;
|
||||
struct cmd_ctrl_node *cmd_queued;
|
||||
|
||||
if (!adapter->cmd_queued)
|
||||
return 0;
|
||||
|
||||
cmd_queued = adapter->cmd_queued;
|
||||
adapter->cmd_queued = NULL;
|
||||
|
||||
dev_dbg(adapter->dev, "cmd pending\n");
|
||||
atomic_inc(&adapter->cmd_pending);
|
||||
|
||||
|
|
|
@ -314,7 +314,7 @@ static const struct of_dev_auxdata *of_dev_lookup(const struct of_dev_auxdata *l
|
|||
if (!lookup)
|
||||
return NULL;
|
||||
|
||||
for(; lookup->name != NULL; lookup++) {
|
||||
for(; lookup->compatible != NULL; lookup++) {
|
||||
if (!of_device_is_compatible(np, lookup->compatible))
|
||||
continue;
|
||||
if (of_address_to_resource(np, 0, &res))
|
||||
|
|
|
@ -73,8 +73,6 @@ int rtc_set_time(struct rtc_device *rtc, struct rtc_time *tm)
|
|||
err = -EINVAL;
|
||||
|
||||
mutex_unlock(&rtc->ops_lock);
|
||||
/* A timer might have just expired */
|
||||
schedule_work(&rtc->irqwork);
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rtc_set_time);
|
||||
|
@ -114,8 +112,6 @@ int rtc_set_mmss(struct rtc_device *rtc, unsigned long secs)
|
|||
err = -EINVAL;
|
||||
|
||||
mutex_unlock(&rtc->ops_lock);
|
||||
/* A timer might have just expired */
|
||||
schedule_work(&rtc->irqwork);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
@ -323,20 +319,6 @@ int rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(rtc_read_alarm);
|
||||
|
||||
static int ___rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
||||
{
|
||||
int err;
|
||||
|
||||
if (!rtc->ops)
|
||||
err = -ENODEV;
|
||||
else if (!rtc->ops->set_alarm)
|
||||
err = -EINVAL;
|
||||
else
|
||||
err = rtc->ops->set_alarm(rtc->dev.parent, alarm);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
||||
{
|
||||
struct rtc_time tm;
|
||||
|
@ -360,7 +342,14 @@ static int __rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
|||
* over right here, before we set the alarm.
|
||||
*/
|
||||
|
||||
return ___rtc_set_alarm(rtc, alarm);
|
||||
if (!rtc->ops)
|
||||
err = -ENODEV;
|
||||
else if (!rtc->ops->set_alarm)
|
||||
err = -EINVAL;
|
||||
else
|
||||
err = rtc->ops->set_alarm(rtc->dev.parent, alarm);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
int rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
||||
|
@ -407,8 +396,6 @@ int rtc_initialize_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
|||
timerqueue_add(&rtc->timerqueue, &rtc->aie_timer.node);
|
||||
}
|
||||
mutex_unlock(&rtc->ops_lock);
|
||||
/* maybe that was in the past.*/
|
||||
schedule_work(&rtc->irqwork);
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rtc_initialize_alarm);
|
||||
|
@ -776,20 +763,6 @@ static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void rtc_alarm_disable(struct rtc_device *rtc)
|
||||
{
|
||||
struct rtc_wkalrm alarm;
|
||||
struct rtc_time tm;
|
||||
|
||||
__rtc_read_time(rtc, &tm);
|
||||
|
||||
alarm.time = rtc_ktime_to_tm(ktime_add(rtc_tm_to_ktime(tm),
|
||||
ktime_set(300, 0)));
|
||||
alarm.enabled = 0;
|
||||
|
||||
___rtc_set_alarm(rtc, &alarm);
|
||||
}
|
||||
|
||||
/**
|
||||
* rtc_timer_remove - Removes a rtc_timer from the rtc_device timerqueue
|
||||
* @rtc rtc device
|
||||
|
@ -811,10 +784,8 @@ static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer)
|
|||
struct rtc_wkalrm alarm;
|
||||
int err;
|
||||
next = timerqueue_getnext(&rtc->timerqueue);
|
||||
if (!next) {
|
||||
rtc_alarm_disable(rtc);
|
||||
if (!next)
|
||||
return;
|
||||
}
|
||||
alarm.time = rtc_ktime_to_tm(next->expires);
|
||||
alarm.enabled = 1;
|
||||
err = __rtc_set_alarm(rtc, &alarm);
|
||||
|
@ -876,8 +847,7 @@ again:
|
|||
err = __rtc_set_alarm(rtc, &alarm);
|
||||
if (err == -ETIME)
|
||||
goto again;
|
||||
} else
|
||||
rtc_alarm_disable(rtc);
|
||||
}
|
||||
|
||||
mutex_unlock(&rtc->ops_lock);
|
||||
}
|
||||
|
|
|
@ -264,7 +264,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
|
|||
ret = -ENODEV;
|
||||
goto err0;
|
||||
}
|
||||
dwc->revision = reg & DWC3_GSNPSREV_MASK;
|
||||
dwc->revision = reg;
|
||||
|
||||
dwc3_core_soft_reset(dwc);
|
||||
|
||||
|
|
|
@ -130,9 +130,6 @@ ep_matches (
|
|||
num_req_streams = ep_comp->bmAttributes & 0x1f;
|
||||
if (num_req_streams > ep->max_streams)
|
||||
return 0;
|
||||
/* Update the ep_comp descriptor if needed */
|
||||
if (num_req_streams != ep->max_streams)
|
||||
ep_comp->bmAttributes = ep->max_streams;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
|
||||
#include "isp1760-hcd.h"
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
|
||||
#include <linux/slab.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
@ -31,7 +31,7 @@
|
|||
#include <linux/pci.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
|
||||
struct isp1760 {
|
||||
struct usb_hcd *hcd;
|
||||
int rst_gpio;
|
||||
|
@ -437,7 +437,7 @@ static int __init isp1760_init(void)
|
|||
ret = platform_driver_register(&isp1760_plat_driver);
|
||||
if (!ret)
|
||||
any_ret = 0;
|
||||
#ifdef CONFIG_OF
|
||||
#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
|
||||
ret = platform_driver_register(&isp1760_of_driver);
|
||||
if (!ret)
|
||||
any_ret = 0;
|
||||
|
@ -457,7 +457,7 @@ module_init(isp1760_init);
|
|||
static void __exit isp1760_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&isp1760_plat_driver);
|
||||
#ifdef CONFIG_OF
|
||||
#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
|
||||
platform_driver_unregister(&isp1760_of_driver);
|
||||
#endif
|
||||
#ifdef CONFIG_PCI
|
||||
|
|
|
@ -774,6 +774,10 @@ static void musb_ep_program(struct musb *musb, u8 epnum,
|
|||
if (musb->double_buffer_not_ok)
|
||||
musb_writew(epio, MUSB_TXMAXP,
|
||||
hw_ep->max_packet_sz_tx);
|
||||
else if (can_bulk_split(musb, qh->type))
|
||||
musb_writew(epio, MUSB_TXMAXP, packet_sz
|
||||
| ((hw_ep->max_packet_sz_tx /
|
||||
packet_sz) - 1) << 11);
|
||||
else
|
||||
musb_writew(epio, MUSB_TXMAXP,
|
||||
qh->maxpacket |
|
||||
|
|
|
@ -76,8 +76,6 @@ static int irq;
|
|||
static void __iomem *virtbase;
|
||||
static unsigned long coh901327_users;
|
||||
static unsigned long boot_status;
|
||||
static u16 wdogenablestore;
|
||||
static u16 irqmaskstore;
|
||||
static struct device *parent;
|
||||
|
||||
/*
|
||||
|
@ -461,6 +459,10 @@ out:
|
|||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static u16 wdogenablestore;
|
||||
static u16 irqmaskstore;
|
||||
|
||||
static int coh901327_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
{
|
||||
irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U;
|
||||
|
|
|
@ -231,6 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry,
|
|||
|
||||
cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
|
||||
|
||||
set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE));
|
||||
asminline_call(&cmn_regs, bios32_entrypoint);
|
||||
|
||||
if (cmn_regs.u1.ral != 0) {
|
||||
|
@ -248,8 +249,10 @@ static int __devinit cru_detect(unsigned long map_entry,
|
|||
if ((physical_bios_base + physical_bios_offset)) {
|
||||
cru_rom_addr =
|
||||
ioremap(cru_physical_address, cru_length);
|
||||
if (cru_rom_addr)
|
||||
if (cru_rom_addr) {
|
||||
set_memory_x((unsigned long)cru_rom_addr, cru_length);
|
||||
retval = 0;
|
||||
}
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
|
||||
|
|
|
@ -384,10 +384,10 @@ MODULE_PARM_DESC(nowayout,
|
|||
"Watchdog cannot be stopped once started (default="
|
||||
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
||||
|
||||
static int turn_SMI_watchdog_clear_off = 0;
|
||||
static int turn_SMI_watchdog_clear_off = 1;
|
||||
module_param(turn_SMI_watchdog_clear_off, int, 0);
|
||||
MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
|
||||
"Turn off SMI clearing watchdog (default=0)");
|
||||
"Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
|
||||
|
||||
/*
|
||||
* Some TCO specific functions
|
||||
|
@ -813,7 +813,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
|
|||
ret = -EIO;
|
||||
goto out_unmap;
|
||||
}
|
||||
if (turn_SMI_watchdog_clear_off) {
|
||||
if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) {
|
||||
/* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
|
||||
val32 = inl(SMI_EN);
|
||||
val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
|
||||
|
|
|
@ -351,7 +351,7 @@ static int __devexit sp805_wdt_remove(struct amba_device *adev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct amba_id sp805_wdt_ids[] __initdata = {
|
||||
static struct amba_id sp805_wdt_ids[] = {
|
||||
{
|
||||
.id = 0x00141805,
|
||||
.mask = 0x00ffffff,
|
||||
|
|
|
@ -12,7 +12,7 @@ here.
|
|||
This directory is _NOT_ for adding arbitrary new firmware images. The
|
||||
place to add those is the separate linux-firmware repository:
|
||||
|
||||
git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git
|
||||
git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
|
||||
|
||||
That repository contains all these firmware images which have been
|
||||
extracted from older drivers, as well various new firmware images which
|
||||
|
@ -22,6 +22,7 @@ been permitted to redistribute under separate cover.
|
|||
To submit firmware to that repository, please send either a git binary
|
||||
diff or preferably a git pull request to:
|
||||
David Woodhouse <dwmw2@infradead.org>
|
||||
Ben Hutchings <ben@decadent.org.uk>
|
||||
|
||||
Your commit should include an update to the WHENCE file clearly
|
||||
identifying the licence under which the firmware is available, and
|
||||
|
|
|
@ -563,8 +563,8 @@ static struct btrfs_worker_thread *find_worker(struct btrfs_workers *workers)
|
|||
struct list_head *fallback;
|
||||
int ret;
|
||||
|
||||
again:
|
||||
spin_lock_irqsave(&workers->lock, flags);
|
||||
again:
|
||||
worker = next_worker(workers);
|
||||
|
||||
if (!worker) {
|
||||
|
@ -579,6 +579,7 @@ again:
|
|||
spin_unlock_irqrestore(&workers->lock, flags);
|
||||
/* we're below the limit, start another worker */
|
||||
ret = __btrfs_start_workers(workers);
|
||||
spin_lock_irqsave(&workers->lock, flags);
|
||||
if (ret)
|
||||
goto fallback;
|
||||
goto again;
|
||||
|
|
|
@ -4590,10 +4590,6 @@ static int btrfs_add_nondir(struct btrfs_trans_handle *trans,
|
|||
int err = btrfs_add_link(trans, dir, inode,
|
||||
dentry->d_name.name, dentry->d_name.len,
|
||||
backref, index);
|
||||
if (!err) {
|
||||
d_instantiate(dentry, inode);
|
||||
return 0;
|
||||
}
|
||||
if (err > 0)
|
||||
err = -EEXIST;
|
||||
return err;
|
||||
|
@ -4655,6 +4651,7 @@ static int btrfs_mknod(struct inode *dir, struct dentry *dentry,
|
|||
else {
|
||||
init_special_inode(inode, inode->i_mode, rdev);
|
||||
btrfs_update_inode(trans, root, inode);
|
||||
d_instantiate(dentry, inode);
|
||||
}
|
||||
out_unlock:
|
||||
nr = trans->blocks_used;
|
||||
|
@ -4722,6 +4719,7 @@ static int btrfs_create(struct inode *dir, struct dentry *dentry,
|
|||
inode->i_mapping->a_ops = &btrfs_aops;
|
||||
inode->i_mapping->backing_dev_info = &root->fs_info->bdi;
|
||||
BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops;
|
||||
d_instantiate(dentry, inode);
|
||||
}
|
||||
out_unlock:
|
||||
nr = trans->blocks_used;
|
||||
|
@ -4779,6 +4777,7 @@ static int btrfs_link(struct dentry *old_dentry, struct inode *dir,
|
|||
struct dentry *parent = dentry->d_parent;
|
||||
err = btrfs_update_inode(trans, root, inode);
|
||||
BUG_ON(err);
|
||||
d_instantiate(dentry, inode);
|
||||
btrfs_log_new_name(trans, inode, NULL, parent);
|
||||
}
|
||||
|
||||
|
@ -7245,6 +7244,8 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry,
|
|||
drop_inode = 1;
|
||||
|
||||
out_unlock:
|
||||
if (!err)
|
||||
d_instantiate(dentry, inode);
|
||||
nr = trans->blocks_used;
|
||||
btrfs_end_transaction_throttle(trans, root);
|
||||
if (drop_inode) {
|
||||
|
|
|
@ -1094,42 +1094,19 @@ static int ceph_snapdir_d_revalidate(struct dentry *dentry,
|
|||
/*
|
||||
* Set/clear/test dir complete flag on the dir's dentry.
|
||||
*/
|
||||
static struct dentry * __d_find_any_alias(struct inode *inode)
|
||||
{
|
||||
struct dentry *alias;
|
||||
|
||||
if (list_empty(&inode->i_dentry))
|
||||
return NULL;
|
||||
alias = list_first_entry(&inode->i_dentry, struct dentry, d_alias);
|
||||
return alias;
|
||||
}
|
||||
|
||||
void ceph_dir_set_complete(struct inode *inode)
|
||||
{
|
||||
struct dentry *dentry = __d_find_any_alias(inode);
|
||||
|
||||
if (dentry && ceph_dentry(dentry)) {
|
||||
dout(" marking %p (%p) complete\n", inode, dentry);
|
||||
set_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
|
||||
}
|
||||
/* not yet implemented */
|
||||
}
|
||||
|
||||
void ceph_dir_clear_complete(struct inode *inode)
|
||||
{
|
||||
struct dentry *dentry = __d_find_any_alias(inode);
|
||||
|
||||
if (dentry && ceph_dentry(dentry)) {
|
||||
dout(" marking %p (%p) NOT complete\n", inode, dentry);
|
||||
clear_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
|
||||
}
|
||||
/* not yet implemented */
|
||||
}
|
||||
|
||||
bool ceph_dir_test_complete(struct inode *inode)
|
||||
{
|
||||
struct dentry *dentry = __d_find_any_alias(inode);
|
||||
|
||||
if (dentry && ceph_dentry(dentry))
|
||||
return test_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
|
||||
/* not yet implemented */
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
|
@ -282,7 +282,7 @@ static int coalesce_t2(struct smb_hdr *psecond, struct smb_hdr *pTargetSMB)
|
|||
byte_count = be32_to_cpu(pTargetSMB->smb_buf_length);
|
||||
byte_count += total_in_buf2;
|
||||
/* don't allow buffer to overflow */
|
||||
if (byte_count > CIFSMaxBufSize)
|
||||
if (byte_count > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4)
|
||||
return -ENOBUFS;
|
||||
pTargetSMB->smb_buf_length = cpu_to_be32(byte_count);
|
||||
|
||||
|
@ -2122,7 +2122,7 @@ cifs_get_smb_ses(struct TCP_Server_Info *server, struct smb_vol *volume_info)
|
|||
warned_on_ntlm = true;
|
||||
cERROR(1, "default security mechanism requested. The default "
|
||||
"security mechanism will be upgraded from ntlm to "
|
||||
"ntlmv2 in kernel release 3.2");
|
||||
"ntlmv2 in kernel release 3.3");
|
||||
}
|
||||
ses->overrideSecFlg = volume_info->secFlg;
|
||||
|
||||
|
|
|
@ -47,17 +47,6 @@ struct wb_writeback_work {
|
|||
struct completion *done; /* set if the caller waits */
|
||||
};
|
||||
|
||||
const char *wb_reason_name[] = {
|
||||
[WB_REASON_BACKGROUND] = "background",
|
||||
[WB_REASON_TRY_TO_FREE_PAGES] = "try_to_free_pages",
|
||||
[WB_REASON_SYNC] = "sync",
|
||||
[WB_REASON_PERIODIC] = "periodic",
|
||||
[WB_REASON_LAPTOP_TIMER] = "laptop_timer",
|
||||
[WB_REASON_FREE_MORE_MEM] = "free_more_memory",
|
||||
[WB_REASON_FS_FREE_SPACE] = "fs_free_space",
|
||||
[WB_REASON_FORKER_THREAD] = "forker_thread"
|
||||
};
|
||||
|
||||
/*
|
||||
* Include the creation of the trace points after defining the
|
||||
* wb_writeback_work structure so that the definition remains local to this
|
||||
|
|
11
fs/locks.c
11
fs/locks.c
|
@ -1205,6 +1205,8 @@ int __break_lease(struct inode *inode, unsigned int mode)
|
|||
int want_write = (mode & O_ACCMODE) != O_RDONLY;
|
||||
|
||||
new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK);
|
||||
if (IS_ERR(new_fl))
|
||||
return PTR_ERR(new_fl);
|
||||
|
||||
lock_flocks();
|
||||
|
||||
|
@ -1221,12 +1223,6 @@ int __break_lease(struct inode *inode, unsigned int mode)
|
|||
if (fl->fl_owner == current->files)
|
||||
i_have_this_lease = 1;
|
||||
|
||||
if (IS_ERR(new_fl) && !i_have_this_lease
|
||||
&& ((mode & O_NONBLOCK) == 0)) {
|
||||
error = PTR_ERR(new_fl);
|
||||
goto out;
|
||||
}
|
||||
|
||||
break_time = 0;
|
||||
if (lease_break_time > 0) {
|
||||
break_time = jiffies + lease_break_time * HZ;
|
||||
|
@ -1284,8 +1280,7 @@ restart:
|
|||
|
||||
out:
|
||||
unlock_flocks();
|
||||
if (!IS_ERR(new_fl))
|
||||
locks_free_lock(new_fl);
|
||||
locks_free_lock(new_fl);
|
||||
return error;
|
||||
}
|
||||
|
||||
|
|
|
@ -263,23 +263,6 @@ static int minix_fill_super(struct super_block *s, void *data, int silent)
|
|||
goto out_no_root;
|
||||
}
|
||||
|
||||
ret = -ENOMEM;
|
||||
s->s_root = d_alloc_root(root_inode);
|
||||
if (!s->s_root)
|
||||
goto out_iput;
|
||||
|
||||
if (!(s->s_flags & MS_RDONLY)) {
|
||||
if (sbi->s_version != MINIX_V3) /* s_state is now out from V3 sb */
|
||||
ms->s_state &= ~MINIX_VALID_FS;
|
||||
mark_buffer_dirty(bh);
|
||||
}
|
||||
if (!(sbi->s_mount_state & MINIX_VALID_FS))
|
||||
printk("MINIX-fs: mounting unchecked file system, "
|
||||
"running fsck is recommended\n");
|
||||
else if (sbi->s_mount_state & MINIX_ERROR_FS)
|
||||
printk("MINIX-fs: mounting file system with errors, "
|
||||
"running fsck is recommended\n");
|
||||
|
||||
/* Apparently minix can create filesystems that allocate more blocks for
|
||||
* the bitmaps than needed. We simply ignore that, but verify it didn't
|
||||
* create one with not enough blocks and bail out if so.
|
||||
|
@ -300,6 +283,23 @@ static int minix_fill_super(struct super_block *s, void *data, int silent)
|
|||
goto out_iput;
|
||||
}
|
||||
|
||||
ret = -ENOMEM;
|
||||
s->s_root = d_alloc_root(root_inode);
|
||||
if (!s->s_root)
|
||||
goto out_iput;
|
||||
|
||||
if (!(s->s_flags & MS_RDONLY)) {
|
||||
if (sbi->s_version != MINIX_V3) /* s_state is now out from V3 sb */
|
||||
ms->s_state &= ~MINIX_VALID_FS;
|
||||
mark_buffer_dirty(bh);
|
||||
}
|
||||
if (!(sbi->s_mount_state & MINIX_VALID_FS))
|
||||
printk("MINIX-fs: mounting unchecked file system, "
|
||||
"running fsck is recommended\n");
|
||||
else if (sbi->s_mount_state & MINIX_ERROR_FS)
|
||||
printk("MINIX-fs: mounting file system with errors, "
|
||||
"running fsck is recommended\n");
|
||||
|
||||
return 0;
|
||||
|
||||
out_iput:
|
||||
|
|
|
@ -32,7 +32,7 @@ static cputime64_t get_idle_time(int cpu)
|
|||
idle = kstat_cpu(cpu).cpustat.idle;
|
||||
idle = cputime64_add(idle, arch_idle_time(cpu));
|
||||
} else
|
||||
idle = nsecs_to_jiffies64(1000 * idle_time);
|
||||
idle = usecs_to_cputime64(idle_time);
|
||||
|
||||
return idle;
|
||||
}
|
||||
|
@ -46,7 +46,7 @@ static cputime64_t get_iowait_time(int cpu)
|
|||
/* !NO_HZ so we can rely on cpustat.iowait */
|
||||
iowait = kstat_cpu(cpu).cpustat.iowait;
|
||||
else
|
||||
iowait = nsecs_to_jiffies64(1000 * iowait_time);
|
||||
iowait = usecs_to_cputime64(iowait_time);
|
||||
|
||||
return iowait;
|
||||
}
|
||||
|
|
|
@ -868,27 +868,6 @@ xfs_fs_dirty_inode(
|
|||
XFS_I(inode)->i_update_core = 1;
|
||||
}
|
||||
|
||||
STATIC int
|
||||
xfs_log_inode(
|
||||
struct xfs_inode *ip)
|
||||
{
|
||||
struct xfs_mount *mp = ip->i_mount;
|
||||
struct xfs_trans *tp;
|
||||
int error;
|
||||
|
||||
tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
|
||||
error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
|
||||
if (error) {
|
||||
xfs_trans_cancel(tp, 0);
|
||||
return error;
|
||||
}
|
||||
|
||||
xfs_ilock(ip, XFS_ILOCK_EXCL);
|
||||
xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
|
||||
xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
|
||||
return xfs_trans_commit(tp, 0);
|
||||
}
|
||||
|
||||
STATIC int
|
||||
xfs_fs_write_inode(
|
||||
struct inode *inode,
|
||||
|
@ -902,10 +881,8 @@ xfs_fs_write_inode(
|
|||
|
||||
if (XFS_FORCED_SHUTDOWN(mp))
|
||||
return -XFS_ERROR(EIO);
|
||||
if (!ip->i_update_core)
|
||||
return 0;
|
||||
|
||||
if (wbc->sync_mode == WB_SYNC_ALL) {
|
||||
if (wbc->sync_mode == WB_SYNC_ALL || wbc->for_kupdate) {
|
||||
/*
|
||||
* Make sure the inode has made it it into the log. Instead
|
||||
* of forcing it all the way to stable storage using a
|
||||
|
@ -913,11 +890,14 @@ xfs_fs_write_inode(
|
|||
* ->sync_fs call do that for thus, which reduces the number
|
||||
* of synchronous log forces dramatically.
|
||||
*/
|
||||
error = xfs_log_inode(ip);
|
||||
error = xfs_log_dirty_inode(ip, NULL, 0);
|
||||
if (error)
|
||||
goto out;
|
||||
return 0;
|
||||
} else {
|
||||
if (!ip->i_update_core)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* We make this non-blocking if the inode is contended, return
|
||||
* EAGAIN to indicate to the caller that they did not succeed.
|
||||
|
|
|
@ -336,6 +336,32 @@ xfs_sync_fsdata(
|
|||
return error;
|
||||
}
|
||||
|
||||
int
|
||||
xfs_log_dirty_inode(
|
||||
struct xfs_inode *ip,
|
||||
struct xfs_perag *pag,
|
||||
int flags)
|
||||
{
|
||||
struct xfs_mount *mp = ip->i_mount;
|
||||
struct xfs_trans *tp;
|
||||
int error;
|
||||
|
||||
if (!ip->i_update_core)
|
||||
return 0;
|
||||
|
||||
tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
|
||||
error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
|
||||
if (error) {
|
||||
xfs_trans_cancel(tp, 0);
|
||||
return error;
|
||||
}
|
||||
|
||||
xfs_ilock(ip, XFS_ILOCK_EXCL);
|
||||
xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
|
||||
xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
|
||||
return xfs_trans_commit(tp, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* When remounting a filesystem read-only or freezing the filesystem, we have
|
||||
* two phases to execute. This first phase is syncing the data before we
|
||||
|
@ -359,6 +385,16 @@ xfs_quiesce_data(
|
|||
{
|
||||
int error, error2 = 0;
|
||||
|
||||
/*
|
||||
* Log all pending size and timestamp updates. The vfs writeback
|
||||
* code is supposed to do this, but due to its overagressive
|
||||
* livelock detection it will skip inodes where appending writes
|
||||
* were written out in the first non-blocking sync phase if their
|
||||
* completion took long enough that it happened after taking the
|
||||
* timestamp for the cut-off in the blocking phase.
|
||||
*/
|
||||
xfs_inode_ag_iterator(mp, xfs_log_dirty_inode, 0);
|
||||
|
||||
xfs_qm_sync(mp, SYNC_TRYLOCK);
|
||||
xfs_qm_sync(mp, SYNC_WAIT);
|
||||
|
||||
|
|
|
@ -34,6 +34,8 @@ void xfs_quiesce_attr(struct xfs_mount *mp);
|
|||
|
||||
void xfs_flush_inodes(struct xfs_inode *ip);
|
||||
|
||||
int xfs_log_dirty_inode(struct xfs_inode *ip, struct xfs_perag *pag, int flags);
|
||||
|
||||
int xfs_reclaim_inodes(struct xfs_mount *mp, int mode);
|
||||
int xfs_reclaim_inodes_count(struct xfs_mount *mp);
|
||||
void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan);
|
||||
|
|
|
@ -40,6 +40,7 @@ typedef u64 cputime64_t;
|
|||
*/
|
||||
#define cputime_to_usecs(__ct) jiffies_to_usecs(__ct)
|
||||
#define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs)
|
||||
#define usecs_to_cputime64(__msecs) nsecs_to_jiffies64((__msecs) * 1000)
|
||||
|
||||
/*
|
||||
* Convert cputime to seconds and back.
|
||||
|
|
|
@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo {
|
|||
#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
|
||||
#define KVM_CAP_PPC_PAPR 68
|
||||
#define KVM_CAP_S390_GMAP 71
|
||||
#define KVM_CAP_TSC_DEADLINE_TIMER 72
|
||||
|
||||
#ifdef KVM_CAP_IRQ_ROUTING
|
||||
|
||||
|
|
Некоторые файлы не были показаны из-за слишком большого количества измененных файлов Показать больше
Загрузка…
Ссылка в новой задаче