pata_hpt366: reimplement mode programming
Reimplement mode programming logic of pata_hpt366 such that it's identical to that of IDE hpt366 driver. The differences were... * pata_hpt366 used 0xCFFF8FFFF to mask pio modes and 0x3FFFFFFF dma modes. IDE hpt366 uses 0xC1F8FFFF for PIO, 0x303800FF for MWDMA and 0x30070000 for UDMA. * pata_hpt366 doesn't set 0x08000000 for PIO unless it's already set and always turns it on for MWDMA/UDMA. IDE hpt366 doesn't bother with the bit. It always uses what was there. * IDE hpt366 always clears 0xC0000000. pata_hpt366 doesn't. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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6ecb6f25d3
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@ -30,7 +30,7 @@
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#define DRV_VERSION "0.6.2"
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struct hpt_clock {
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u8 xfer_speed;
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u8 xfer_mode;
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u32 timing;
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};
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@ -189,28 +189,6 @@ static unsigned long hpt366_filter(struct ata_device *adev, unsigned long mask)
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return ata_bmdma_mode_filter(adev, mask);
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}
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/**
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* hpt36x_find_mode - reset the hpt36x bus
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* @ap: ATA port
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* @speed: transfer mode
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*
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* Return the 32bit register programming information for this channel
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* that matches the speed provided.
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*/
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static u32 hpt36x_find_mode(struct ata_port *ap, int speed)
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{
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struct hpt_clock *clocks = ap->host->private_data;
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while(clocks->xfer_speed) {
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if (clocks->xfer_speed == speed)
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return clocks->timing;
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clocks++;
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}
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BUG();
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return 0xffffffffU; /* silence compiler warning */
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}
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static int hpt36x_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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@ -226,6 +204,49 @@ static int hpt36x_cable_detect(struct ata_port *ap)
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return ATA_CBL_PATA80;
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}
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static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
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u8 mode)
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{
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struct hpt_clock *clocks = ap->host->private_data;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
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u32 addr2 = 0x51 + 4 * ap->port_no;
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u32 mask, reg;
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u8 fast;
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/* Fast interrupt prediction disable, hold off interrupt disable */
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pci_read_config_byte(pdev, addr2, &fast);
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if (fast & 0x80) {
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fast &= ~0x80;
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pci_write_config_byte(pdev, addr2, fast);
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}
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/* determine timing mask and find matching clock entry */
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if (mode < XFER_MW_DMA_0)
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mask = 0xc1f8ffff;
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else if (mode < XFER_UDMA_0)
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mask = 0x303800ff;
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else
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mask = 0x30070000;
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while (clocks->xfer_mode) {
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if (clocks->xfer_mode == mode)
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break;
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clocks++;
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}
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if (!clocks->xfer_mode)
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BUG();
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/*
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* Combine new mode bits with old config bits and disable
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* on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid
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* problems handling I/O errors later.
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*/
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pci_read_config_dword(pdev, addr1, ®);
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reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000;
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pci_write_config_dword(pdev, addr1, reg);
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}
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/**
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* hpt366_set_piomode - PIO setup
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* @ap: ATA interface
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@ -236,28 +257,7 @@ static int hpt36x_cable_detect(struct ata_port *ap)
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static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 addr1, addr2;
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u32 reg;
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u32 mode;
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u8 fast;
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addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
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addr2 = 0x51 + 4 * ap->port_no;
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/* Fast interrupt prediction disable, hold off interrupt disable */
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pci_read_config_byte(pdev, addr2, &fast);
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if (fast & 0x80) {
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fast &= ~0x80;
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pci_write_config_byte(pdev, addr2, fast);
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}
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pci_read_config_dword(pdev, addr1, ®);
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mode = hpt36x_find_mode(ap, adev->pio_mode);
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mode &= ~0x8000000; /* No FIFO in PIO */
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mode &= ~0x30070000; /* Leave config bits alone */
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reg &= 0x30070000; /* Strip timing bits */
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pci_write_config_dword(pdev, addr1, reg | mode);
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hpt366_set_mode(ap, adev, adev->pio_mode);
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}
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/**
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@ -271,28 +271,7 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
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static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 addr1, addr2;
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u32 reg;
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u32 mode;
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u8 fast;
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addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
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addr2 = 0x51 + 4 * ap->port_no;
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/* Fast interrupt prediction disable, hold off interrupt disable */
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pci_read_config_byte(pdev, addr2, &fast);
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if (fast & 0x80) {
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fast &= ~0x80;
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pci_write_config_byte(pdev, addr2, fast);
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}
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pci_read_config_dword(pdev, addr1, ®);
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mode = hpt36x_find_mode(ap, adev->dma_mode);
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mode |= 0x8000000; /* FIFO in MWDMA or UDMA */
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mode &= ~0xC0000000; /* Leave config bits alone */
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reg &= 0xC0000000; /* Strip timing bits */
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pci_write_config_dword(pdev, addr1, reg | mode);
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hpt366_set_mode(ap, adev, adev->dma_mode);
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}
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static struct scsi_host_template hpt36x_sht = {
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