of/documentation: update with clock information for exynos hdmi subsystem
Adding information about clocks to the binding documentation for exynos mixer and hdmi. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -12,7 +12,19 @@ Required properties:
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a) phandle of the gpio controller node.
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b) pin number within the gpio controller.
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c) optional flags and pull up/down.
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- clocks: list of clock IDs from SoC clock driver.
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a) hdmi: Gate of HDMI IP bus clock.
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b) sclk_hdmi: Gate of HDMI special clock.
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c) sclk_pixel: Pixel special clock, one of the two possible inputs of
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HDMI clock mux.
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d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
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HDMI clock mux.
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e) mout_hdmi: It is required by the driver to switch between the 2
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parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
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after configuration, parent is set to sclk_hdmiphy else
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sclk_pixel.
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- clock-names: aliases as per driver requirements for above clock IDs:
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"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
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Example:
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hdmi {
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@ -10,6 +10,10 @@ Required properties:
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- reg: physical base address of the mixer and length of memory mapped
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region.
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- interrupts: interrupt number to the cpu.
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- clocks: list of clock IDs from SoC clock driver.
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a) mixer: Gate of Mixer IP bus clock.
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b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of
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mixer mux.
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Example:
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