diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 2557d69fefc8..1eb1f1e9aac4 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -147,6 +147,13 @@ marvell,spi-base = <128>, <136>, <144>, <152>; }; + gicp: gicp@3f0040 { + compatible = "marvell,ap806-gicp"; + reg = <0x3f0040 0x10>; + marvell,spi-ranges = <64 64>, <288 64>; + msi-controller; + }; + pic: interrupt-controller@3f0100 { compatible = "marvell,armada-8k-pic"; reg = <0x3f0100 0x10>; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index 7835d4f517dc..aec5f94423dd 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -44,19 +44,20 @@ * Device Tree file for Marvell Armada CP110 Master. */ +#define ICU_GRP_NSR 0x0 + / { cp110-master { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; + interrupt-parent = <&cpm_icu>; ranges; config-space@f2000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges = <0x0 0x0 0xf2000000 0x2000000>; cpm_ethernet: ethernet@0 { @@ -68,21 +69,21 @@ dma-coherent; cpm_eth0: eth0 { - interrupts = ; + interrupts = ; port-id = <0>; gop-port-id = <0>; status = "disabled"; }; cpm_eth1: eth1 { - interrupts = ; + interrupts = ; port-id = <1>; gop-port-id = <2>; status = "disabled"; }; cpm_eth2: eth2 { - interrupts = ; + interrupts = ; port-id = <2>; gop-port-id = <3>; status = "disabled"; @@ -106,6 +107,14 @@ status = "disabled"; }; + cpm_icu: interrupt-controller@1e0000 { + compatible = "marvell,cp110-icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + msi-parent = <&gicp>; + }; + cpm_syscon0: system-controller@440000 { compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; @@ -141,14 +150,14 @@ compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; reg-names = "rtc", "rtc-soc"; - interrupts = ; + interrupts = ; }; cpm_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; + interrupts = ; clocks = <&cpm_clk 1 15>; status = "disabled"; }; @@ -158,7 +167,7 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cpm_clk 1 22>; status = "disabled"; }; @@ -168,7 +177,7 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cpm_clk 1 23>; status = "disabled"; }; @@ -216,7 +225,7 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -226,7 +235,7 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -234,7 +243,7 @@ cpm_trng: trng@760000 { compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; + interrupts = ; clocks = <&cpm_clk 1 25>; status = "okay"; }; @@ -242,7 +251,7 @@ cpm_sdhci0: sdhci@780000 { compatible = "marvell,armada-cp110-sdhci"; reg = <0x780000 0x300>; - interrupts = ; + interrupts = ; clock-names = "core"; clocks = <&cpm_clk 1 4>; dma-coherent; @@ -252,13 +261,13 @@ cpm_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + , + , + , + , + ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clocks = <&cpm_clk 1 26>; @@ -285,8 +294,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cpm_clk 1 13>; status = "disabled"; @@ -311,8 +320,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cpm_clk 1 11>; @@ -338,8 +347,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cpm_clk 1 12>; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 22e4feb1bace..9daf1e17bdfe 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -44,19 +44,20 @@ * Device Tree file for Marvell Armada CP110 Slave. */ +#define ICU_GRP_NSR 0x0 + / { cp110-slave { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; + interrupt-parent = <&cps_icu>; ranges; config-space@f4000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges = <0x0 0x0 0xf4000000 0x2000000>; cps_rtc: rtc@284000 { @@ -75,21 +76,21 @@ dma-coherent; cps_eth0: eth0 { - interrupts = ; + interrupts = ; port-id = <0>; gop-port-id = <0>; status = "disabled"; }; cps_eth1: eth1 { - interrupts = ; + interrupts = ; port-id = <1>; gop-port-id = <2>; status = "disabled"; }; cps_eth2: eth2 { - interrupts = ; + interrupts = ; port-id = <2>; gop-port-id = <3>; status = "disabled"; @@ -113,6 +114,14 @@ status = "disabled"; }; + cps_icu: interrupt-controller@1e0000 { + compatible = "marvell,cp110-icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + msi-parent = <&gicp>; + }; + cps_syscon0: system-controller@440000 { compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; @@ -149,7 +158,7 @@ compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; + interrupts = ; clocks = <&cps_clk 1 15>; status = "disabled"; }; @@ -159,7 +168,7 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cps_clk 1 22>; status = "disabled"; }; @@ -169,7 +178,7 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cps_clk 1 23>; status = "disabled"; }; @@ -217,7 +226,7 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -227,7 +236,7 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -235,7 +244,7 @@ cps_trng: trng@760000 { compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; + interrupts = ; clocks = <&cps_clk 1 25>; status = "okay"; }; @@ -243,13 +252,13 @@ cps_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + , + , + , + , + ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clocks = <&cps_clk 1 26>; @@ -284,8 +293,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cps_clk 1 13>; status = "disabled"; @@ -310,8 +319,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cps_clk 1 11>; @@ -337,8 +346,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cps_clk 1 12>;