powerpc: Add the ability to save Altivec without giving it up
This patch adds the ability to be able to save the VEC registers to the thread struct without giving up (disabling the facility) next time the process returns to userspace. This patch builds on a previous optimisation for the FPU registers in the thread copy path to avoid a possibly pointless reload of VEC state. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -43,12 +43,13 @@ static inline void flush_fp_to_thread(struct task_struct *t) { }
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extern void enable_kernel_altivec(void);
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extern void flush_altivec_to_thread(struct task_struct *);
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extern void giveup_altivec(struct task_struct *);
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extern void __giveup_altivec(struct task_struct *);
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extern void save_altivec(struct task_struct *);
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static inline void disable_kernel_altivec(void)
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{
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msr_check_and_clear(MSR_VEC);
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}
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#else
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static inline void save_altivec(struct task_struct *t) { }
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static inline void __giveup_altivec(struct task_struct *t) { }
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#endif
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@ -213,6 +213,16 @@ static int restore_fp(struct task_struct *tsk) { return 0; }
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#ifdef CONFIG_ALTIVEC
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#define loadvec(thr) ((thr).load_vec)
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static void __giveup_altivec(struct task_struct *tsk)
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{
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save_altivec(tsk);
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tsk->thread.regs->msr &= ~MSR_VEC;
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#ifdef CONFIG_VSX
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if (cpu_has_feature(CPU_FTR_VSX))
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tsk->thread.regs->msr &= ~MSR_VSX;
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#endif
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}
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void giveup_altivec(struct task_struct *tsk)
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{
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check_if_tm_restore_required(tsk);
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@ -472,7 +482,7 @@ void save_all(struct task_struct *tsk)
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save_fpu(tsk);
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if (usermsr & MSR_VEC)
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__giveup_altivec(tsk);
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save_altivec(tsk);
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if (usermsr & MSR_VSX)
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__giveup_vsx(tsk);
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@ -106,36 +106,20 @@ _GLOBAL(load_up_altivec)
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blr
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/*
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* __giveup_altivec(tsk)
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* Disable VMX for the task given as the argument,
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* and save the vector registers in its thread_struct.
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* save_altivec(tsk)
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* Save the vector registers to its thread_struct
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*/
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_GLOBAL(__giveup_altivec)
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_GLOBAL(save_altivec)
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addi r3,r3,THREAD /* want THREAD of task */
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PPC_LL r7,THREAD_VRSAVEAREA(r3)
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PPC_LL r5,PT_REGS(r3)
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PPC_LCMPI 0,r7,0
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bne 2f
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addi r7,r3,THREAD_VRSTATE
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2: PPC_LCMPI 0,r5,0
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SAVE_32VRS(0,r4,r7)
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2: SAVE_32VRS(0,r4,r7)
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mfvscr v0
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li r4,VRSTATE_VSCR
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stvx v0,r4,r7
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beq 1f
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PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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#ifdef CONFIG_VSX
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BEGIN_FTR_SECTION
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lis r3,(MSR_VEC|MSR_VSX)@h
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FTR_SECTION_ELSE
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lis r3,MSR_VEC@h
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ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX)
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#else
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lis r3,MSR_VEC@h
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#endif
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andc r4,r4,r3 /* disable FP for previous task */
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PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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1:
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blr
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#ifdef CONFIG_VSX
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