natsemi: fix MMIO for PPC 44x platforms
The driver stores the PCI resource address into 'unsigned long' variable before calling ioremap() on it. This warrants a kernel oops when the registers are accessed on PPC 44x platforms which (being 32-bit) have PCI memory space mapped beyond 4 GB. The arch/ppc/ kernel has a fixup in ioremap() that creates an illusion of the PCI memory resources are mapped below 4 GB, but arch/powerpc/ code got rid of this trick, having instead CONFIG_RESOURCES_64BIT enabled. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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406874a7cc
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703bb99ca7
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@ -786,7 +786,8 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
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struct netdev_private *np;
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int i, option, irq, chip_idx = ent->driver_data;
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static int find_cnt = -1;
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unsigned long iostart, iosize;
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resource_size_t iostart;
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unsigned long iosize;
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void __iomem *ioaddr;
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const int pcibar = 1; /* PCI base address register */
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int prev_eedata;
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@ -946,10 +947,11 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
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goto err_create_file;
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if (netif_msg_drv(np)) {
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printk(KERN_INFO "natsemi %s: %s at %#08lx "
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printk(KERN_INFO "natsemi %s: %s at %#08llx "
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"(%s), %s, IRQ %d",
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dev->name, natsemi_pci_info[chip_idx].name, iostart,
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pci_name(np->pci_dev), print_mac(mac, dev->dev_addr), irq);
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dev->name, natsemi_pci_info[chip_idx].name,
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(unsigned long long)iostart, pci_name(np->pci_dev),
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print_mac(mac, dev->dev_addr), irq);
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if (dev->if_port == PORT_TP)
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printk(", port TP.\n");
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else if (np->ignore_phy)
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