i82975x_edac: convert driver to use the new edac ABI
The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: Ranganathan Desikan <ravi@jetztechnologies.com> Cc: "Arvind R." <arvino55@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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0a8a9ac9ca
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705213580b
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@ -29,7 +29,8 @@
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#define PCI_DEVICE_ID_INTEL_82975_0 0x277c
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#endif /* PCI_DEVICE_ID_INTEL_82975_0 */
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#define I82975X_NR_CSROWS(nr_chans) (8/(nr_chans))
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#define I82975X_NR_DIMMS 8
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#define I82975X_NR_CSROWS(nr_chans) (I82975X_NR_DIMMS / (nr_chans))
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/* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
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#define I82975X_EAP 0x58 /* Dram Error Address Pointer (32b)
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@ -287,7 +288,8 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci,
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return 1;
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if ((info->errsts ^ info->errsts2) & 0x0003) {
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edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
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edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
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-1, -1, -1, "UE overwrote CE", "", NULL);
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info->errsts = info->errsts2;
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}
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@ -312,10 +314,15 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci,
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(1 << mci->csrows[row].channels[chan].dimm->grain));
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if (info->errsts & 0x0002)
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edac_mc_handle_ue(mci, page, offst , row, "i82975x UE");
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edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
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page, offst, 0,
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row, -1, -1,
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"i82975x UE", "", NULL);
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else
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edac_mc_handle_ce(mci, page, offst, info->derrsyn, row,
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chan, "i82975x CE");
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edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
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page, offst, info->derrsyn,
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row, chan ? chan : 0, -1,
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"i82975x CE", "", NULL);
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return 1;
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}
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@ -473,6 +480,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
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{
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int rc = -ENODEV;
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struct mem_ctl_info *mci;
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struct edac_mc_layer layers[2];
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struct i82975x_pvt *pvt;
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void __iomem *mch_window;
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u32 mchbar;
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@ -541,8 +549,13 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
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chans = dual_channel_active(mch_window) + 1;
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/* assuming only one controller, index thus is 0 */
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mci = edac_mc_alloc(sizeof(*pvt), I82975X_NR_CSROWS(chans),
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chans, 0);
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layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
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layers[0].size = I82975X_NR_DIMMS;
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layers[0].is_virt_csrow = true;
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layers[1].type = EDAC_MC_LAYER_CHANNEL;
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layers[1].size = I82975X_NR_CSROWS(chans);
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layers[1].is_virt_csrow = false;
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mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));
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if (!mci) {
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rc = -ENOMEM;
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goto fail1;
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