MIPS: SMTC: delay irq enable to ->smp_finish()
To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -615,7 +615,6 @@ void __cpuinit smtc_boot_secondary(int cpu, struct task_struct *idle)
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void smtc_init_secondary(void)
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void smtc_init_secondary(void)
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{
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{
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local_irq_enable();
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}
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}
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void smtc_smp_finish(void)
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void smtc_smp_finish(void)
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@ -631,6 +630,8 @@ void smtc_smp_finish(void)
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if (cpu > 0 && (cpu_data[cpu].vpe_id != cpu_data[cpu - 1].vpe_id))
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if (cpu > 0 && (cpu_data[cpu].vpe_id != cpu_data[cpu - 1].vpe_id))
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write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
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write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
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local_irq_enable();
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printk("TC %d going on-line as CPU %d\n",
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printk("TC %d going on-line as CPU %d\n",
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cpu_data[smp_processor_id()].tc_id, smp_processor_id());
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cpu_data[smp_processor_id()].tc_id, smp_processor_id());
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}
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}
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