vdpa/mlx5: Fix memory key MTT population
map_direct_mr() assumed that the number of scatter/gather entries
returned by dma_map_sg_attrs() was equal to the number of segments in
the sgl list. This led to wrong population of the mkey object. Fix this
by properly referring to the returned value.
The hardware expects each MTT entry to contain the DMA address of a
contiguous block of memory of size (1 << mr->log_size) bytes.
dma_map_sg_attrs() can coalesce several sg entries into a single
scatter/gather entry of contiguous DMA range so we need to scan the list
and refer to the size of each s/g entry.
In addition, get rid of fill_sg() which effect is overwritten by
populate_mtts().
Fixes: 94abbccdf2
("vdpa/mlx5: Add shared memory registration code")
Signed-off-by: Eli Cohen <elic@nvidia.com>
Link: https://lore.kernel.org/r/20210107071845.GA224876@mtl-vdi-166.wap.labs.mlnx
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
This commit is contained in:
Родитель
19c329f680
Коммит
710eb8e32d
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@ -15,6 +15,7 @@ struct mlx5_vdpa_direct_mr {
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struct sg_table sg_head;
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struct sg_table sg_head;
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int log_size;
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int log_size;
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int nsg;
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int nsg;
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int nent;
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struct list_head list;
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struct list_head list;
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u64 offset;
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u64 offset;
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};
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};
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@ -25,17 +25,6 @@ static int get_octo_len(u64 len, int page_shift)
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return (npages + 1) / 2;
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return (npages + 1) / 2;
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}
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}
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static void fill_sg(struct mlx5_vdpa_direct_mr *mr, void *in)
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{
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struct scatterlist *sg;
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__be64 *pas;
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int i;
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pas = MLX5_ADDR_OF(create_mkey_in, in, klm_pas_mtt);
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for_each_sg(mr->sg_head.sgl, sg, mr->nsg, i)
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(*pas) = cpu_to_be64(sg_dma_address(sg));
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}
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static void mlx5_set_access_mode(void *mkc, int mode)
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static void mlx5_set_access_mode(void *mkc, int mode)
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{
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{
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MLX5_SET(mkc, mkc, access_mode_1_0, mode & 0x3);
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MLX5_SET(mkc, mkc, access_mode_1_0, mode & 0x3);
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@ -45,10 +34,18 @@ static void mlx5_set_access_mode(void *mkc, int mode)
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static void populate_mtts(struct mlx5_vdpa_direct_mr *mr, __be64 *mtt)
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static void populate_mtts(struct mlx5_vdpa_direct_mr *mr, __be64 *mtt)
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{
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{
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struct scatterlist *sg;
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struct scatterlist *sg;
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int nsg = mr->nsg;
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u64 dma_addr;
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u64 dma_len;
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int j = 0;
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int i;
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int i;
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for_each_sg(mr->sg_head.sgl, sg, mr->nsg, i)
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for_each_sg(mr->sg_head.sgl, sg, mr->nent, i) {
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mtt[i] = cpu_to_be64(sg_dma_address(sg));
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for (dma_addr = sg_dma_address(sg), dma_len = sg_dma_len(sg);
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nsg && dma_len;
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nsg--, dma_addr += BIT(mr->log_size), dma_len -= BIT(mr->log_size))
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mtt[j++] = cpu_to_be64(dma_addr);
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}
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}
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}
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static int create_direct_mr(struct mlx5_vdpa_dev *mvdev, struct mlx5_vdpa_direct_mr *mr)
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static int create_direct_mr(struct mlx5_vdpa_dev *mvdev, struct mlx5_vdpa_direct_mr *mr)
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@ -64,7 +61,6 @@ static int create_direct_mr(struct mlx5_vdpa_dev *mvdev, struct mlx5_vdpa_direct
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return -ENOMEM;
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return -ENOMEM;
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MLX5_SET(create_mkey_in, in, uid, mvdev->res.uid);
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MLX5_SET(create_mkey_in, in, uid, mvdev->res.uid);
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fill_sg(mr, in);
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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MLX5_SET(mkc, mkc, lw, !!(mr->perm & VHOST_MAP_WO));
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MLX5_SET(mkc, mkc, lw, !!(mr->perm & VHOST_MAP_WO));
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MLX5_SET(mkc, mkc, lr, !!(mr->perm & VHOST_MAP_RO));
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MLX5_SET(mkc, mkc, lr, !!(mr->perm & VHOST_MAP_RO));
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@ -276,8 +272,8 @@ static int map_direct_mr(struct mlx5_vdpa_dev *mvdev, struct mlx5_vdpa_direct_mr
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done:
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done:
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mr->log_size = log_entity_size;
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mr->log_size = log_entity_size;
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mr->nsg = nsg;
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mr->nsg = nsg;
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err = dma_map_sg_attrs(dma, mr->sg_head.sgl, mr->nsg, DMA_BIDIRECTIONAL, 0);
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mr->nent = dma_map_sg_attrs(dma, mr->sg_head.sgl, mr->nsg, DMA_BIDIRECTIONAL, 0);
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if (!err)
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if (!mr->nent)
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goto err_map;
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goto err_map;
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err = create_direct_mr(mvdev, mr);
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err = create_direct_mr(mvdev, mr);
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