powerpc: Use bytes instead of bitops in smp ipi multiplexing
Since there are only 4 messages, we can replace the atomic bit set (which uses atomic load reserve and store conditional sequence) with a byte stores to seperate bytes. We still have to perform a load reserve and store conditional sequence to avoid loosing messages on reception but we can do that with a single call to xchg. The do {} while and __BIG_ENDIAN specific mask testing was chosen by looking at the generated asm code. On gcc-4.4, the bit masking becomes a simple bit mask and test of the register returned from xchg without storing and loading the value to the stack like attempts with a union of bytes and an int (or worse, loading single bit constants from the constant pool into non-voliatle registers that had to be preseved on the stack). The do {} while avoids an unconditional branch to the end of the loop to test the entry / repeat condition of a while loop and instead optimises for the expected single iteration of the loop. We have a full mb() at the beginning to cover ordering between send, ipi, and receive so we can use xchg_local and forgo the further acquire and release barriers of xchg. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -180,7 +180,7 @@ int smp_request_message_ipi(int virq, int msg)
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#ifdef CONFIG_PPC_SMP_MUXED_IPI
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struct cpu_messages {
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unsigned long messages; /* current messages bits */
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int messages; /* current messages */
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unsigned long data; /* data for cause ipi */
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};
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static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
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@ -195,9 +195,9 @@ void smp_muxed_ipi_set_data(int cpu, unsigned long data)
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void smp_muxed_ipi_message_pass(int cpu, int msg)
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{
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struct cpu_messages *info = &per_cpu(ipi_message, cpu);
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unsigned long *tgt = &info->messages;
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char *message = (char *)&info->messages;
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set_bit(msg, tgt);
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message[msg] = 1;
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mb();
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smp_ops->cause_ipi(cpu, info->data);
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}
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@ -205,30 +205,35 @@ void smp_muxed_ipi_message_pass(int cpu, int msg)
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void smp_muxed_ipi_resend(void)
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{
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struct cpu_messages *info = &__get_cpu_var(ipi_message);
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unsigned long *tgt = &info->messages;
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if (*tgt)
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if (info->messages)
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smp_ops->cause_ipi(smp_processor_id(), info->data);
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}
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irqreturn_t smp_ipi_demux(void)
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{
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struct cpu_messages *info = &__get_cpu_var(ipi_message);
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unsigned long *tgt = &info->messages;
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unsigned int all;
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mb(); /* order any irq clear */
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while (*tgt) {
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if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, tgt))
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do {
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all = xchg_local(&info->messages, 0);
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#ifdef __BIG_ENDIAN
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if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))
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generic_smp_call_function_interrupt();
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if (test_and_clear_bit(PPC_MSG_RESCHEDULE, tgt))
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if (all & (1 << (24 - 8 * PPC_MSG_RESCHEDULE)))
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reschedule_action(0, NULL); /* upcoming sched hook */
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if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, tgt))
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if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNC_SINGLE)))
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generic_smp_call_function_single_interrupt();
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#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
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if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, tgt))
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if (all & (1 << (24 - 8 * PPC_MSG_DEBUGGER_BREAK)))
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debug_ipi_action(0, NULL);
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#else
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#error Unsupported ENDIAN
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#endif
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}
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} while (info->messages);
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return IRQ_HANDLED;
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}
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#endif /* CONFIG_PPC_SMP_MUXED_IPI */
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