IB/qib: Remove DCA support until feature is finished
The DCA code was left over from internal development to test the hardware feature and allow performance testing. The results were mixed and will require some additional work to make full use of the feature. Therefore, it is being removed for now. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
Ralph Campbell
Roland Dreier
Родитель
a77fcf8950
Коммит
7145c45a06
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@ -42,9 +42,6 @@
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#include <linux/jiffies.h>
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_smi.h>
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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#include <linux/dca.h>
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#endif
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#include "qib.h"
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#include "qib_7322_regs.h"
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@ -518,12 +515,6 @@ struct qib_chip_specific {
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u32 lastbuf_for_pio;
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u32 stay_in_freeze;
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u32 recovery_ports_initted;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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u32 dca_ctrl;
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int rhdr_cpu[18];
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int sdma_cpu[2];
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u64 dca_rcvhdr_ctrl[5]; /* B, C, D, E, F */
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#endif
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struct msix_entry *msix_entries;
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void **msix_arg;
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unsigned long *sendchkenable;
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@ -642,52 +633,6 @@ static struct {
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SYM_LSB(IntStatus, SDmaCleanupDone_1), 2 },
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};
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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static const struct dca_reg_map {
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int shadow_inx;
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int lsb;
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u64 mask;
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u16 regno;
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} dca_rcvhdr_reg_map[] = {
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{ 0, SYM_LSB(DCACtrlB, RcvHdrq0DCAOPH),
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~SYM_MASK(DCACtrlB, RcvHdrq0DCAOPH) , KREG_IDX(DCACtrlB) },
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{ 0, SYM_LSB(DCACtrlB, RcvHdrq1DCAOPH),
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~SYM_MASK(DCACtrlB, RcvHdrq1DCAOPH) , KREG_IDX(DCACtrlB) },
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{ 0, SYM_LSB(DCACtrlB, RcvHdrq2DCAOPH),
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~SYM_MASK(DCACtrlB, RcvHdrq2DCAOPH) , KREG_IDX(DCACtrlB) },
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{ 0, SYM_LSB(DCACtrlB, RcvHdrq3DCAOPH),
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~SYM_MASK(DCACtrlB, RcvHdrq3DCAOPH) , KREG_IDX(DCACtrlB) },
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{ 1, SYM_LSB(DCACtrlC, RcvHdrq4DCAOPH),
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~SYM_MASK(DCACtrlC, RcvHdrq4DCAOPH) , KREG_IDX(DCACtrlC) },
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{ 1, SYM_LSB(DCACtrlC, RcvHdrq5DCAOPH),
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~SYM_MASK(DCACtrlC, RcvHdrq5DCAOPH) , KREG_IDX(DCACtrlC) },
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{ 1, SYM_LSB(DCACtrlC, RcvHdrq6DCAOPH),
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~SYM_MASK(DCACtrlC, RcvHdrq6DCAOPH) , KREG_IDX(DCACtrlC) },
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{ 1, SYM_LSB(DCACtrlC, RcvHdrq7DCAOPH),
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~SYM_MASK(DCACtrlC, RcvHdrq7DCAOPH) , KREG_IDX(DCACtrlC) },
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{ 2, SYM_LSB(DCACtrlD, RcvHdrq8DCAOPH),
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~SYM_MASK(DCACtrlD, RcvHdrq8DCAOPH) , KREG_IDX(DCACtrlD) },
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{ 2, SYM_LSB(DCACtrlD, RcvHdrq9DCAOPH),
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~SYM_MASK(DCACtrlD, RcvHdrq9DCAOPH) , KREG_IDX(DCACtrlD) },
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{ 2, SYM_LSB(DCACtrlD, RcvHdrq10DCAOPH),
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~SYM_MASK(DCACtrlD, RcvHdrq10DCAOPH) , KREG_IDX(DCACtrlD) },
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{ 2, SYM_LSB(DCACtrlD, RcvHdrq11DCAOPH),
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~SYM_MASK(DCACtrlD, RcvHdrq11DCAOPH) , KREG_IDX(DCACtrlD) },
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{ 3, SYM_LSB(DCACtrlE, RcvHdrq12DCAOPH),
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~SYM_MASK(DCACtrlE, RcvHdrq12DCAOPH) , KREG_IDX(DCACtrlE) },
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{ 3, SYM_LSB(DCACtrlE, RcvHdrq13DCAOPH),
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~SYM_MASK(DCACtrlE, RcvHdrq13DCAOPH) , KREG_IDX(DCACtrlE) },
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{ 3, SYM_LSB(DCACtrlE, RcvHdrq14DCAOPH),
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~SYM_MASK(DCACtrlE, RcvHdrq14DCAOPH) , KREG_IDX(DCACtrlE) },
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{ 3, SYM_LSB(DCACtrlE, RcvHdrq15DCAOPH),
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~SYM_MASK(DCACtrlE, RcvHdrq15DCAOPH) , KREG_IDX(DCACtrlE) },
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{ 4, SYM_LSB(DCACtrlF, RcvHdrq16DCAOPH),
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~SYM_MASK(DCACtrlF, RcvHdrq16DCAOPH) , KREG_IDX(DCACtrlF) },
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{ 4, SYM_LSB(DCACtrlF, RcvHdrq17DCAOPH),
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~SYM_MASK(DCACtrlF, RcvHdrq17DCAOPH) , KREG_IDX(DCACtrlF) },
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};
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#endif
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/* ibcctrl bits */
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#define QLOGIC_IB_IBCC_LINKINITCMD_DISABLE 1
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/* cycle through TS1/TS2 till OK */
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@ -2538,95 +2483,6 @@ static void qib_setup_7322_setextled(struct qib_pportdata *ppd, u32 on)
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qib_write_kreg_port(ppd, krp_rcvpktledcnt, ledblink);
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}
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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static void qib_update_rhdrq_dca(struct qib_ctxtdata *rcd)
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{
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struct qib_devdata *dd = rcd->dd;
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struct qib_chip_specific *cspec = dd->cspec;
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int cpu = get_cpu();
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if (cspec->rhdr_cpu[rcd->ctxt] != cpu) {
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const struct dca_reg_map *rmp;
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cspec->rhdr_cpu[rcd->ctxt] = cpu;
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rmp = &dca_rcvhdr_reg_map[rcd->ctxt];
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cspec->dca_rcvhdr_ctrl[rmp->shadow_inx] &= rmp->mask;
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cspec->dca_rcvhdr_ctrl[rmp->shadow_inx] |=
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(u64) dca3_get_tag(&dd->pcidev->dev, cpu) << rmp->lsb;
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qib_write_kreg(dd, rmp->regno,
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cspec->dca_rcvhdr_ctrl[rmp->shadow_inx]);
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cspec->dca_ctrl |= SYM_MASK(DCACtrlA, RcvHdrqDCAEnable);
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qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);
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}
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put_cpu();
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}
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static void qib_update_sdma_dca(struct qib_pportdata *ppd)
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{
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struct qib_devdata *dd = ppd->dd;
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struct qib_chip_specific *cspec = dd->cspec;
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int cpu = get_cpu();
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unsigned pidx = ppd->port - 1;
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if (cspec->sdma_cpu[pidx] != cpu) {
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cspec->sdma_cpu[pidx] = cpu;
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cspec->dca_rcvhdr_ctrl[4] &= ~(ppd->hw_pidx ?
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SYM_MASK(DCACtrlF, SendDma1DCAOPH) :
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SYM_MASK(DCACtrlF, SendDma0DCAOPH));
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cspec->dca_rcvhdr_ctrl[4] |=
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(u64) dca3_get_tag(&dd->pcidev->dev, cpu) <<
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(ppd->hw_pidx ?
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SYM_LSB(DCACtrlF, SendDma1DCAOPH) :
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SYM_LSB(DCACtrlF, SendDma0DCAOPH));
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qib_write_kreg(dd, KREG_IDX(DCACtrlF),
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cspec->dca_rcvhdr_ctrl[4]);
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cspec->dca_ctrl |= ppd->hw_pidx ?
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SYM_MASK(DCACtrlA, SendDMAHead1DCAEnable) :
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SYM_MASK(DCACtrlA, SendDMAHead0DCAEnable);
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qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);
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}
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put_cpu();
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}
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static void qib_setup_dca(struct qib_devdata *dd)
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{
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struct qib_chip_specific *cspec = dd->cspec;
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int i;
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for (i = 0; i < ARRAY_SIZE(cspec->rhdr_cpu); i++)
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cspec->rhdr_cpu[i] = -1;
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for (i = 0; i < ARRAY_SIZE(cspec->sdma_cpu); i++)
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cspec->sdma_cpu[i] = -1;
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cspec->dca_rcvhdr_ctrl[0] =
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(1ULL << SYM_LSB(DCACtrlB, RcvHdrq0DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlB, RcvHdrq1DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlB, RcvHdrq2DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlB, RcvHdrq3DCAXfrCnt));
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cspec->dca_rcvhdr_ctrl[1] =
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(1ULL << SYM_LSB(DCACtrlC, RcvHdrq4DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlC, RcvHdrq5DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlC, RcvHdrq6DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlC, RcvHdrq7DCAXfrCnt));
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cspec->dca_rcvhdr_ctrl[2] =
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(1ULL << SYM_LSB(DCACtrlD, RcvHdrq8DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlD, RcvHdrq9DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlD, RcvHdrq10DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlD, RcvHdrq11DCAXfrCnt));
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cspec->dca_rcvhdr_ctrl[3] =
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(1ULL << SYM_LSB(DCACtrlE, RcvHdrq12DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlE, RcvHdrq13DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlE, RcvHdrq14DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlE, RcvHdrq15DCAXfrCnt));
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cspec->dca_rcvhdr_ctrl[4] =
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(1ULL << SYM_LSB(DCACtrlF, RcvHdrq16DCAXfrCnt)) |
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(1ULL << SYM_LSB(DCACtrlF, RcvHdrq17DCAXfrCnt));
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for (i = 0; i < ARRAY_SIZE(cspec->sdma_cpu); i++)
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qib_write_kreg(dd, KREG_IDX(DCACtrlB) + i,
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cspec->dca_rcvhdr_ctrl[i]);
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}
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#endif
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/*
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* Disable MSIx interrupt if enabled, call generic MSIx code
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* to cleanup, and clear pending MSIx interrupts.
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@ -2667,15 +2523,6 @@ static void qib_setup_7322_cleanup(struct qib_devdata *dd)
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{
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int i;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED) {
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dca_remove_requester(&dd->pcidev->dev);
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dd->flags &= ~QIB_DCA_ENABLED;
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dd->cspec->dca_ctrl = 0;
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qib_write_kreg(dd, KREG_IDX(DCACtrlA), dd->cspec->dca_ctrl);
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}
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#endif
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qib_7322_free_irq(dd);
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kfree(dd->cspec->cntrs);
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kfree(dd->cspec->sendchkenable);
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@ -2983,11 +2830,6 @@ static irqreturn_t qib_7322pintr(int irq, void *data)
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if (dd->int_counter != (u32) -1)
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dd->int_counter++;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED)
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qib_update_rhdrq_dca(rcd);
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#endif
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/* Clear the interrupt bit we expect to be set. */
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qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) |
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(1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt);
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@ -3051,11 +2893,6 @@ static irqreturn_t sdma_intr(int irq, void *data)
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if (dd->int_counter != (u32) -1)
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dd->int_counter++;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED)
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qib_update_sdma_dca(ppd);
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#endif
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/* Clear the interrupt bit we expect to be set. */
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qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
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INT_MASK_P(SDma, 1) : INT_MASK_P(SDma, 0));
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@ -3085,11 +2922,6 @@ static irqreturn_t sdma_idle_intr(int irq, void *data)
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if (dd->int_counter != (u32) -1)
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dd->int_counter++;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED)
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qib_update_sdma_dca(ppd);
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#endif
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/* Clear the interrupt bit we expect to be set. */
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qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
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INT_MASK_P(SDmaIdle, 1) : INT_MASK_P(SDmaIdle, 0));
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@ -3119,11 +2951,6 @@ static irqreturn_t sdma_progress_intr(int irq, void *data)
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if (dd->int_counter != (u32) -1)
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dd->int_counter++;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED)
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qib_update_sdma_dca(ppd);
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#endif
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/* Clear the interrupt bit we expect to be set. */
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qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
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INT_MASK_P(SDmaProgress, 1) :
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@ -3154,11 +2981,6 @@ static irqreturn_t sdma_cleanup_intr(int irq, void *data)
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if (dd->int_counter != (u32) -1)
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dd->int_counter++;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED)
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qib_update_sdma_dca(ppd);
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#endif
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/* Clear the interrupt bit we expect to be set. */
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qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
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INT_MASK_PM(SDmaCleanupDone, 1) :
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@ -4265,10 +4087,6 @@ static void rcvctrl_7322_mod(struct qib_pportdata *ppd, unsigned int op,
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qib_write_kreg_ctxt(dd, krc_rcvhdraddr, ctxt,
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rcd->rcvhdrq_phys);
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rcd->seq_cnt = 1;
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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if (dd->flags & QIB_DCA_ENABLED)
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qib_update_rhdrq_dca(rcd);
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#endif
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}
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if (op & QIB_RCVCTRL_CTXT_DIS)
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ppd->p_rcvctrl &=
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@ -6893,13 +6711,6 @@ struct qib_devdata *qib_init_iba7322_funcs(struct pci_dev *pdev,
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/* clear diagctrl register, in case diags were running and crashed */
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qib_write_kreg(dd, kr_hwdiagctrl, 0);
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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ret = dca_add_requester(&pdev->dev);
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if (!ret) {
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dd->flags |= QIB_DCA_ENABLED;
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qib_setup_dca(dd);
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}
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#endif
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goto bail;
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bail_cleanup:
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