drm/radeon: track pinned memory (v2)
So we know how large an allocation we can allow. v2: incorporate Michel's comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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@ -2353,6 +2353,10 @@ struct radeon_device {
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struct dev_pm_domain vga_pm_domain;
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bool have_disp_power_ref;
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/* tracking pinned memory */
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u64 vram_pin_size;
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u64 gart_pin_size;
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};
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bool radeon_is_px(struct drm_device *dev);
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@ -306,9 +306,13 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
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bo->pin_count = 1;
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if (gpu_addr != NULL)
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*gpu_addr = radeon_bo_gpu_offset(bo);
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}
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if (unlikely(r != 0))
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if (domain == RADEON_GEM_DOMAIN_VRAM)
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bo->rdev->vram_pin_size += radeon_bo_size(bo);
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else
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bo->rdev->gart_pin_size += radeon_bo_size(bo);
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} else {
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dev_err(bo->rdev->dev, "%p pin failed\n", bo);
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}
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return r;
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}
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@ -331,8 +335,14 @@ int radeon_bo_unpin(struct radeon_bo *bo)
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for (i = 0; i < bo->placement.num_placement; i++)
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bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (unlikely(r != 0))
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if (likely(r == 0)) {
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if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
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bo->rdev->vram_pin_size -= radeon_bo_size(bo);
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else
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bo->rdev->gart_pin_size -= radeon_bo_size(bo);
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} else {
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dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
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}
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return r;
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}
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