ice: Move common functions out of ice_main.c part 2/7
This patch continues the code move out of ice_main.c The following top level functions (and related dependency functions) were moved to ice_lib.c: ice_vsi_start_rx_rings ice_vsi_stop_rx_rings ice_vsi_stop_tx_rings ice_vsi_cfg_rxqs ice_vsi_cfg_txqs ice_vsi_cfg_msix Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Anirudh Venkataramanan
Jeff Kirsher
Родитель
45d3d428ea
Коммит
72adf2421d
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@ -4,6 +4,227 @@
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#include "ice.h"
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#include "ice_lib.h"
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/**
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* ice_setup_rx_ctx - Configure a receive ring context
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* @ring: The Rx ring to configure
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*
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* Configure the Rx descriptor ring in RLAN context.
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*/
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static int ice_setup_rx_ctx(struct ice_ring *ring)
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{
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struct ice_vsi *vsi = ring->vsi;
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struct ice_hw *hw = &vsi->back->hw;
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u32 rxdid = ICE_RXDID_FLEX_NIC;
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struct ice_rlan_ctx rlan_ctx;
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u32 regval;
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u16 pf_q;
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int err;
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/* what is RX queue number in global space of 2K Rx queues */
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pf_q = vsi->rxq_map[ring->q_index];
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/* clear the context structure first */
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memset(&rlan_ctx, 0, sizeof(rlan_ctx));
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rlan_ctx.base = ring->dma >> 7;
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rlan_ctx.qlen = ring->count;
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/* Receive Packet Data Buffer Size.
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* The Packet Data Buffer Size is defined in 128 byte units.
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*/
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rlan_ctx.dbuf = vsi->rx_buf_len >> ICE_RLAN_CTX_DBUF_S;
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/* use 32 byte descriptors */
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rlan_ctx.dsize = 1;
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/* Strip the Ethernet CRC bytes before the packet is posted to host
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* memory.
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*/
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rlan_ctx.crcstrip = 1;
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/* L2TSEL flag defines the reported L2 Tags in the receive descriptor */
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rlan_ctx.l2tsel = 1;
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rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;
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rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;
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rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT;
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/* This controls whether VLAN is stripped from inner headers
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* The VLAN in the inner L2 header is stripped to the receive
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* descriptor if enabled by this flag.
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*/
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rlan_ctx.showiv = 0;
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/* Max packet size for this queue - must not be set to a larger value
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* than 5 x DBUF
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*/
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rlan_ctx.rxmax = min_t(u16, vsi->max_frame,
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ICE_MAX_CHAINED_RX_BUFS * vsi->rx_buf_len);
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/* Rx queue threshold in units of 64 */
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rlan_ctx.lrxqthresh = 1;
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/* Enable Flexible Descriptors in the queue context which
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* allows this driver to select a specific receive descriptor format
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*/
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regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
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regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
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QRXFLXP_CNTXT_RXDID_IDX_M;
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/* increasing context priority to pick up profile id;
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* default is 0x01; setting to 0x03 to ensure profile
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* is programming if prev context is of same priority
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*/
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regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) &
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QRXFLXP_CNTXT_RXDID_PRIO_M;
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wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
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/* Absolute queue number out of 2K needs to be passed */
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err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
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if (err) {
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dev_err(&vsi->back->pdev->dev,
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"Failed to set LAN Rx queue context for absolute Rx queue %d error: %d\n",
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pf_q, err);
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return -EIO;
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}
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/* init queue specific tail register */
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ring->tail = hw->hw_addr + QRX_TAIL(pf_q);
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writel(0, ring->tail);
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ice_alloc_rx_bufs(ring, ICE_DESC_UNUSED(ring));
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return 0;
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}
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/**
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* ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance
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* @ring: The Tx ring to configure
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* @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized
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* @pf_q: queue index in the PF space
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*
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* Configure the Tx descriptor ring in TLAN context.
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*/
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static void
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ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)
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{
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struct ice_vsi *vsi = ring->vsi;
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struct ice_hw *hw = &vsi->back->hw;
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tlan_ctx->base = ring->dma >> ICE_TLAN_CTX_BASE_S;
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tlan_ctx->port_num = vsi->port_info->lport;
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/* Transmit Queue Length */
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tlan_ctx->qlen = ring->count;
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/* PF number */
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tlan_ctx->pf_num = hw->pf_id;
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/* queue belongs to a specific VSI type
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* VF / VM index should be programmed per vmvf_type setting:
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* for vmvf_type = VF, it is VF number between 0-256
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* for vmvf_type = VM, it is VM number between 0-767
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* for PF or EMP this field should be set to zero
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*/
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switch (vsi->type) {
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case ICE_VSI_PF:
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tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;
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break;
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default:
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return;
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}
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/* make sure the context is associated with the right VSI */
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tlan_ctx->src_vsi = vsi->vsi_num;
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tlan_ctx->tso_ena = ICE_TX_LEGACY;
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tlan_ctx->tso_qnum = pf_q;
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/* Legacy or Advanced Host Interface:
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* 0: Advanced Host Interface
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* 1: Legacy Host Interface
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*/
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tlan_ctx->legacy_int = ICE_TX_LEGACY;
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}
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/**
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* ice_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
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* @pf: the PF being configured
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* @pf_q: the PF queue
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* @ena: enable or disable state of the queue
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*
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* This routine will wait for the given Rx queue of the PF to reach the
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* enabled or disabled state.
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* Returns -ETIMEDOUT in case of failing to reach the requested state after
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* multiple retries; else will return 0 in case of success.
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*/
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static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena)
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{
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int i;
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for (i = 0; i < ICE_Q_WAIT_RETRY_LIMIT; i++) {
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u32 rx_reg = rd32(&pf->hw, QRX_CTRL(pf_q));
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if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
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break;
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usleep_range(10, 20);
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}
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if (i >= ICE_Q_WAIT_RETRY_LIMIT)
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return -ETIMEDOUT;
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return 0;
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}
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/**
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* ice_vsi_ctrl_rx_rings - Start or stop a VSI's Rx rings
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* @vsi: the VSI being configured
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* @ena: start or stop the Rx rings
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*/
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static int ice_vsi_ctrl_rx_rings(struct ice_vsi *vsi, bool ena)
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{
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struct ice_pf *pf = vsi->back;
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struct ice_hw *hw = &pf->hw;
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int i, j, ret = 0;
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for (i = 0; i < vsi->num_rxq; i++) {
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int pf_q = vsi->rxq_map[i];
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u32 rx_reg;
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for (j = 0; j < ICE_Q_WAIT_MAX_RETRY; j++) {
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rx_reg = rd32(hw, QRX_CTRL(pf_q));
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if (((rx_reg >> QRX_CTRL_QENA_REQ_S) & 1) ==
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((rx_reg >> QRX_CTRL_QENA_STAT_S) & 1))
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break;
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usleep_range(1000, 2000);
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}
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/* Skip if the queue is already in the requested state */
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if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
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continue;
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/* turn on/off the queue */
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if (ena)
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rx_reg |= QRX_CTRL_QENA_REQ_M;
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else
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rx_reg &= ~QRX_CTRL_QENA_REQ_M;
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wr32(hw, QRX_CTRL(pf_q), rx_reg);
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/* wait for the change to finish */
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ret = ice_pf_rxq_wait(pf, pf_q, ena);
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if (ret) {
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dev_err(&pf->pdev->dev,
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"VSI idx %d Rx ring %d %sable timeout\n",
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vsi->idx, pf_q, (ena ? "en" : "dis"));
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break;
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}
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}
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return ret;
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}
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/**
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* ice_add_mac_to_list - Add a mac address filter entry to the list
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* @vsi: the VSI to be forwarded to
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@ -185,6 +406,174 @@ int ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid)
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return status;
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}
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/**
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* ice_vsi_cfg_rxqs - Configure the VSI for Rx
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* @vsi: the VSI being configured
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*
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* Return 0 on success and a negative value on error
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* Configure the Rx VSI for operation.
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*/
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int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
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{
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int err = 0;
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u16 i;
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if (vsi->netdev && vsi->netdev->mtu > ETH_DATA_LEN)
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vsi->max_frame = vsi->netdev->mtu +
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ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
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else
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vsi->max_frame = ICE_RXBUF_2048;
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vsi->rx_buf_len = ICE_RXBUF_2048;
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/* set up individual rings */
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for (i = 0; i < vsi->num_rxq && !err; i++)
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err = ice_setup_rx_ctx(vsi->rx_rings[i]);
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if (err) {
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dev_err(&vsi->back->pdev->dev, "ice_setup_rx_ctx failed\n");
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return -EIO;
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}
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return err;
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}
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/**
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* ice_vsi_cfg_txqs - Configure the VSI for Tx
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* @vsi: the VSI being configured
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*
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* Return 0 on success and a negative value on error
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* Configure the Tx VSI for operation.
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*/
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int ice_vsi_cfg_txqs(struct ice_vsi *vsi)
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{
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struct ice_aqc_add_tx_qgrp *qg_buf;
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struct ice_aqc_add_txqs_perq *txq;
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struct ice_pf *pf = vsi->back;
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enum ice_status status;
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u16 buf_len, i, pf_q;
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int err = 0, tc = 0;
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u8 num_q_grps;
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buf_len = sizeof(struct ice_aqc_add_tx_qgrp);
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qg_buf = devm_kzalloc(&pf->pdev->dev, buf_len, GFP_KERNEL);
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if (!qg_buf)
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return -ENOMEM;
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if (vsi->num_txq > ICE_MAX_TXQ_PER_TXQG) {
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err = -EINVAL;
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goto err_cfg_txqs;
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}
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qg_buf->num_txqs = 1;
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num_q_grps = 1;
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/* set up and configure the Tx queues */
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ice_for_each_txq(vsi, i) {
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struct ice_tlan_ctx tlan_ctx = { 0 };
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pf_q = vsi->txq_map[i];
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ice_setup_tx_ctx(vsi->tx_rings[i], &tlan_ctx, pf_q);
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/* copy context contents into the qg_buf */
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qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);
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ice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,
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ice_tlan_ctx_info);
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/* init queue specific tail reg. It is referred as transmit
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* comm scheduler queue doorbell.
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*/
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vsi->tx_rings[i]->tail = pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);
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status = ice_ena_vsi_txq(vsi->port_info, vsi->vsi_num, tc,
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num_q_grps, qg_buf, buf_len, NULL);
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if (status) {
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dev_err(&vsi->back->pdev->dev,
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"Failed to set LAN Tx queue context, error: %d\n",
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status);
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err = -ENODEV;
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goto err_cfg_txqs;
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}
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/* Add Tx Queue TEID into the VSI Tx ring from the response
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* This will complete configuring and enabling the queue.
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*/
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txq = &qg_buf->txqs[0];
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if (pf_q == le16_to_cpu(txq->txq_id))
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vsi->tx_rings[i]->txq_teid =
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le32_to_cpu(txq->q_teid);
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}
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err_cfg_txqs:
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devm_kfree(&pf->pdev->dev, qg_buf);
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return err;
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}
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/**
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* ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
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* @vsi: the VSI being configured
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*/
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void ice_vsi_cfg_msix(struct ice_vsi *vsi)
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{
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struct ice_pf *pf = vsi->back;
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u16 vector = vsi->base_vector;
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struct ice_hw *hw = &pf->hw;
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u32 txq = 0, rxq = 0;
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int i, q, itr;
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u8 itr_gran;
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for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
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struct ice_q_vector *q_vector = vsi->q_vectors[i];
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itr_gran = hw->itr_gran_200;
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if (q_vector->num_ring_rx) {
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q_vector->rx.itr =
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ITR_TO_REG(vsi->rx_rings[rxq]->rx_itr_setting,
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itr_gran);
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q_vector->rx.latency_range = ICE_LOW_LATENCY;
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}
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if (q_vector->num_ring_tx) {
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q_vector->tx.itr =
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ITR_TO_REG(vsi->tx_rings[txq]->tx_itr_setting,
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itr_gran);
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q_vector->tx.latency_range = ICE_LOW_LATENCY;
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}
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wr32(hw, GLINT_ITR(ICE_RX_ITR, vector), q_vector->rx.itr);
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wr32(hw, GLINT_ITR(ICE_TX_ITR, vector), q_vector->tx.itr);
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/* Both Transmit Queue Interrupt Cause Control register
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* and Receive Queue Interrupt Cause control register
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* expects MSIX_INDX field to be the vector index
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* within the function space and not the absolute
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* vector index across PF or across device.
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* For SR-IOV VF VSIs queue vector index always starts
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* with 1 since first vector index(0) is used for OICR
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* in VF space. Since VMDq and other PF VSIs are within
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* the PF function space, use the vector index that is
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* tracked for this PF.
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*/
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for (q = 0; q < q_vector->num_ring_tx; q++) {
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u32 val;
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itr = ICE_ITR_NONE;
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val = QINT_TQCTL_CAUSE_ENA_M |
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(itr << QINT_TQCTL_ITR_INDX_S) |
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(vector << QINT_TQCTL_MSIX_INDX_S);
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wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val);
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txq++;
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}
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for (q = 0; q < q_vector->num_ring_rx; q++) {
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u32 val;
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itr = ICE_ITR_NONE;
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val = QINT_RQCTL_CAUSE_ENA_M |
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(itr << QINT_RQCTL_ITR_INDX_S) |
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(vector << QINT_RQCTL_MSIX_INDX_S);
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wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), val);
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rxq++;
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}
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}
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ice_flush(hw);
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}
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/**
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* ice_vsi_manage_vlan_insertion - Manage VLAN insertion for the VSI for Tx
|
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* @vsi: the VSI being changed
|
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|
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@ -256,3 +645,105 @@ int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena)
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vsi->info.vlan_flags = ctxt.info.vlan_flags;
|
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return 0;
|
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}
|
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|
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/**
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* ice_vsi_start_rx_rings - start VSI's Rx rings
|
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* @vsi: the VSI whose rings are to be started
|
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*
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* Returns 0 on success and a negative value on error
|
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*/
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int ice_vsi_start_rx_rings(struct ice_vsi *vsi)
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{
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return ice_vsi_ctrl_rx_rings(vsi, true);
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}
|
||||
|
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/**
|
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* ice_vsi_stop_rx_rings - stop VSI's Rx rings
|
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* @vsi: the VSI
|
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*
|
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* Returns 0 on success and a negative value on error
|
||||
*/
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int ice_vsi_stop_rx_rings(struct ice_vsi *vsi)
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||||
{
|
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return ice_vsi_ctrl_rx_rings(vsi, false);
|
||||
}
|
||||
|
||||
/**
|
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* ice_vsi_stop_tx_rings - Disable Tx rings
|
||||
* @vsi: the VSI being configured
|
||||
*/
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int ice_vsi_stop_tx_rings(struct ice_vsi *vsi)
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||||
{
|
||||
struct ice_pf *pf = vsi->back;
|
||||
struct ice_hw *hw = &pf->hw;
|
||||
enum ice_status status;
|
||||
u32 *q_teids, val;
|
||||
u16 *q_ids, i;
|
||||
int err = 0;
|
||||
|
||||
if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
|
||||
return -EINVAL;
|
||||
|
||||
q_teids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_teids),
|
||||
GFP_KERNEL);
|
||||
if (!q_teids)
|
||||
return -ENOMEM;
|
||||
|
||||
q_ids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_ids),
|
||||
GFP_KERNEL);
|
||||
if (!q_ids) {
|
||||
err = -ENOMEM;
|
||||
goto err_alloc_q_ids;
|
||||
}
|
||||
|
||||
/* set up the Tx queue list to be disabled */
|
||||
ice_for_each_txq(vsi, i) {
|
||||
u16 v_idx;
|
||||
|
||||
if (!vsi->tx_rings || !vsi->tx_rings[i]) {
|
||||
err = -EINVAL;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
q_ids[i] = vsi->txq_map[i];
|
||||
q_teids[i] = vsi->tx_rings[i]->txq_teid;
|
||||
|
||||
/* clear cause_ena bit for disabled queues */
|
||||
val = rd32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
|
||||
val &= ~QINT_TQCTL_CAUSE_ENA_M;
|
||||
wr32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
|
||||
|
||||
/* software is expected to wait for 100 ns */
|
||||
ndelay(100);
|
||||
|
||||
/* trigger a software interrupt for the vector associated to
|
||||
* the queue to schedule NAPI handler
|
||||
*/
|
||||
v_idx = vsi->tx_rings[i]->q_vector->v_idx;
|
||||
wr32(hw, GLINT_DYN_CTL(vsi->base_vector + v_idx),
|
||||
GLINT_DYN_CTL_SWINT_TRIG_M | GLINT_DYN_CTL_INTENA_MSK_M);
|
||||
}
|
||||
status = ice_dis_vsi_txq(vsi->port_info, vsi->num_txq, q_ids, q_teids,
|
||||
NULL);
|
||||
/* if the disable queue command was exercised during an active reset
|
||||
* flow, ICE_ERR_RESET_ONGOING is returned. This is not an error as
|
||||
* the reset operation disables queues at the hardware level anyway.
|
||||
*/
|
||||
if (status == ICE_ERR_RESET_ONGOING) {
|
||||
dev_info(&pf->pdev->dev,
|
||||
"Reset in progress. LAN Tx queues already disabled\n");
|
||||
} else if (status) {
|
||||
dev_err(&pf->pdev->dev,
|
||||
"Failed to disable LAN Tx queues, error: %d\n",
|
||||
status);
|
||||
err = -ENODEV;
|
||||
}
|
||||
|
||||
err_out:
|
||||
devm_kfree(&pf->pdev->dev, q_ids);
|
||||
|
||||
err_alloc_q_ids:
|
||||
devm_kfree(&pf->pdev->dev, q_teids);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,6 +13,12 @@ void ice_free_fltr_list(struct device *dev, struct list_head *h);
|
|||
|
||||
void ice_update_eth_stats(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_cfg_rxqs(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_cfg_txqs(struct ice_vsi *vsi);
|
||||
|
||||
void ice_vsi_cfg_msix(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_add_vlan(struct ice_vsi *vsi, u16 vid);
|
||||
|
||||
int ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid);
|
||||
|
|
@ -20,4 +26,11 @@ int ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid);
|
|||
int ice_vsi_manage_vlan_insertion(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena);
|
||||
|
||||
int ice_vsi_start_rx_rings(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_stop_rx_rings(struct ice_vsi *vsi);
|
||||
|
||||
int ice_vsi_stop_tx_rings(struct ice_vsi *vsi);
|
||||
|
||||
#endif /* !_ICE_LIB_H_ */
|
||||
|
|
|
|||
|
|
@ -1844,77 +1844,6 @@ static void ice_vsi_free_irq(struct ice_vsi *vsi)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
|
||||
* @vsi: the VSI being configured
|
||||
*/
|
||||
static void ice_vsi_cfg_msix(struct ice_vsi *vsi)
|
||||
{
|
||||
struct ice_pf *pf = vsi->back;
|
||||
u16 vector = vsi->base_vector;
|
||||
struct ice_hw *hw = &pf->hw;
|
||||
u32 txq = 0, rxq = 0;
|
||||
int i, q, itr;
|
||||
u8 itr_gran;
|
||||
|
||||
for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
|
||||
struct ice_q_vector *q_vector = vsi->q_vectors[i];
|
||||
|
||||
itr_gran = hw->itr_gran_200;
|
||||
|
||||
if (q_vector->num_ring_rx) {
|
||||
q_vector->rx.itr =
|
||||
ITR_TO_REG(vsi->rx_rings[rxq]->rx_itr_setting,
|
||||
itr_gran);
|
||||
q_vector->rx.latency_range = ICE_LOW_LATENCY;
|
||||
}
|
||||
|
||||
if (q_vector->num_ring_tx) {
|
||||
q_vector->tx.itr =
|
||||
ITR_TO_REG(vsi->tx_rings[txq]->tx_itr_setting,
|
||||
itr_gran);
|
||||
q_vector->tx.latency_range = ICE_LOW_LATENCY;
|
||||
}
|
||||
wr32(hw, GLINT_ITR(ICE_RX_ITR, vector), q_vector->rx.itr);
|
||||
wr32(hw, GLINT_ITR(ICE_TX_ITR, vector), q_vector->tx.itr);
|
||||
|
||||
/* Both Transmit Queue Interrupt Cause Control register
|
||||
* and Receive Queue Interrupt Cause control register
|
||||
* expects MSIX_INDX field to be the vector index
|
||||
* within the function space and not the absolute
|
||||
* vector index across PF or across device.
|
||||
* For SR-IOV VF VSIs queue vector index always starts
|
||||
* with 1 since first vector index(0) is used for OICR
|
||||
* in VF space. Since VMDq and other PF VSIs are withtin
|
||||
* the PF function space, use the vector index thats
|
||||
* tracked for this PF.
|
||||
*/
|
||||
for (q = 0; q < q_vector->num_ring_tx; q++) {
|
||||
u32 val;
|
||||
|
||||
itr = ICE_TX_ITR;
|
||||
val = QINT_TQCTL_CAUSE_ENA_M |
|
||||
(itr << QINT_TQCTL_ITR_INDX_S) |
|
||||
(vector << QINT_TQCTL_MSIX_INDX_S);
|
||||
wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val);
|
||||
txq++;
|
||||
}
|
||||
|
||||
for (q = 0; q < q_vector->num_ring_rx; q++) {
|
||||
u32 val;
|
||||
|
||||
itr = ICE_RX_ITR;
|
||||
val = QINT_RQCTL_CAUSE_ENA_M |
|
||||
(itr << QINT_RQCTL_ITR_INDX_S) |
|
||||
(vector << QINT_RQCTL_MSIX_INDX_S);
|
||||
wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), val);
|
||||
rxq++;
|
||||
}
|
||||
}
|
||||
|
||||
ice_flush(hw);
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_ena_misc_vector - enable the non-queue interrupts
|
||||
* @pf: board private structure
|
||||
|
|
@ -3966,248 +3895,6 @@ static int ice_restore_vlan(struct ice_vsi *vsi)
|
|||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance
|
||||
* @ring: The Tx ring to configure
|
||||
* @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized
|
||||
* @pf_q: queue index in the PF space
|
||||
*
|
||||
* Configure the Tx descriptor ring in TLAN context.
|
||||
*/
|
||||
static void
|
||||
ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)
|
||||
{
|
||||
struct ice_vsi *vsi = ring->vsi;
|
||||
struct ice_hw *hw = &vsi->back->hw;
|
||||
|
||||
tlan_ctx->base = ring->dma >> ICE_TLAN_CTX_BASE_S;
|
||||
|
||||
tlan_ctx->port_num = vsi->port_info->lport;
|
||||
|
||||
/* Transmit Queue Length */
|
||||
tlan_ctx->qlen = ring->count;
|
||||
|
||||
/* PF number */
|
||||
tlan_ctx->pf_num = hw->pf_id;
|
||||
|
||||
/* queue belongs to a specific VSI type
|
||||
* VF / VM index should be programmed per vmvf_type setting:
|
||||
* for vmvf_type = VF, it is VF number between 0-256
|
||||
* for vmvf_type = VM, it is VM number between 0-767
|
||||
* for PF or EMP this field should be set to zero
|
||||
*/
|
||||
switch (vsi->type) {
|
||||
case ICE_VSI_PF:
|
||||
tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
/* make sure the context is associated with the right VSI */
|
||||
tlan_ctx->src_vsi = vsi->vsi_num;
|
||||
|
||||
tlan_ctx->tso_ena = ICE_TX_LEGACY;
|
||||
tlan_ctx->tso_qnum = pf_q;
|
||||
|
||||
/* Legacy or Advanced Host Interface:
|
||||
* 0: Advanced Host Interface
|
||||
* 1: Legacy Host Interface
|
||||
*/
|
||||
tlan_ctx->legacy_int = ICE_TX_LEGACY;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_cfg_txqs - Configure the VSI for Tx
|
||||
* @vsi: the VSI being configured
|
||||
*
|
||||
* Return 0 on success and a negative value on error
|
||||
* Configure the Tx VSI for operation.
|
||||
*/
|
||||
static int ice_vsi_cfg_txqs(struct ice_vsi *vsi)
|
||||
{
|
||||
struct ice_aqc_add_tx_qgrp *qg_buf;
|
||||
struct ice_aqc_add_txqs_perq *txq;
|
||||
struct ice_pf *pf = vsi->back;
|
||||
enum ice_status status;
|
||||
u16 buf_len, i, pf_q;
|
||||
int err = 0, tc = 0;
|
||||
u8 num_q_grps;
|
||||
|
||||
buf_len = sizeof(struct ice_aqc_add_tx_qgrp);
|
||||
qg_buf = devm_kzalloc(&pf->pdev->dev, buf_len, GFP_KERNEL);
|
||||
if (!qg_buf)
|
||||
return -ENOMEM;
|
||||
|
||||
if (vsi->num_txq > ICE_MAX_TXQ_PER_TXQG) {
|
||||
err = -EINVAL;
|
||||
goto err_cfg_txqs;
|
||||
}
|
||||
qg_buf->num_txqs = 1;
|
||||
num_q_grps = 1;
|
||||
|
||||
/* set up and configure the tx queues */
|
||||
ice_for_each_txq(vsi, i) {
|
||||
struct ice_tlan_ctx tlan_ctx = { 0 };
|
||||
|
||||
pf_q = vsi->txq_map[i];
|
||||
ice_setup_tx_ctx(vsi->tx_rings[i], &tlan_ctx, pf_q);
|
||||
/* copy context contents into the qg_buf */
|
||||
qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);
|
||||
ice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,
|
||||
ice_tlan_ctx_info);
|
||||
|
||||
/* init queue specific tail reg. It is referred as transmit
|
||||
* comm scheduler queue doorbell.
|
||||
*/
|
||||
vsi->tx_rings[i]->tail = pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);
|
||||
status = ice_ena_vsi_txq(vsi->port_info, vsi->vsi_num, tc,
|
||||
num_q_grps, qg_buf, buf_len, NULL);
|
||||
if (status) {
|
||||
dev_err(&vsi->back->pdev->dev,
|
||||
"Failed to set LAN Tx queue context, error: %d\n",
|
||||
status);
|
||||
err = -ENODEV;
|
||||
goto err_cfg_txqs;
|
||||
}
|
||||
|
||||
/* Add Tx Queue TEID into the VSI tx ring from the response
|
||||
* This will complete configuring and enabling the queue.
|
||||
*/
|
||||
txq = &qg_buf->txqs[0];
|
||||
if (pf_q == le16_to_cpu(txq->txq_id))
|
||||
vsi->tx_rings[i]->txq_teid =
|
||||
le32_to_cpu(txq->q_teid);
|
||||
}
|
||||
err_cfg_txqs:
|
||||
devm_kfree(&pf->pdev->dev, qg_buf);
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_setup_rx_ctx - Configure a receive ring context
|
||||
* @ring: The Rx ring to configure
|
||||
*
|
||||
* Configure the Rx descriptor ring in RLAN context.
|
||||
*/
|
||||
static int ice_setup_rx_ctx(struct ice_ring *ring)
|
||||
{
|
||||
struct ice_vsi *vsi = ring->vsi;
|
||||
struct ice_hw *hw = &vsi->back->hw;
|
||||
u32 rxdid = ICE_RXDID_FLEX_NIC;
|
||||
struct ice_rlan_ctx rlan_ctx;
|
||||
u32 regval;
|
||||
u16 pf_q;
|
||||
int err;
|
||||
|
||||
/* what is RX queue number in global space of 2K rx queues */
|
||||
pf_q = vsi->rxq_map[ring->q_index];
|
||||
|
||||
/* clear the context structure first */
|
||||
memset(&rlan_ctx, 0, sizeof(rlan_ctx));
|
||||
|
||||
rlan_ctx.base = ring->dma >> ICE_RLAN_BASE_S;
|
||||
|
||||
rlan_ctx.qlen = ring->count;
|
||||
|
||||
/* Receive Packet Data Buffer Size.
|
||||
* The Packet Data Buffer Size is defined in 128 byte units.
|
||||
*/
|
||||
rlan_ctx.dbuf = vsi->rx_buf_len >> ICE_RLAN_CTX_DBUF_S;
|
||||
|
||||
/* use 32 byte descriptors */
|
||||
rlan_ctx.dsize = 1;
|
||||
|
||||
/* Strip the Ethernet CRC bytes before the packet is posted to host
|
||||
* memory.
|
||||
*/
|
||||
rlan_ctx.crcstrip = 1;
|
||||
|
||||
/* L2TSEL flag defines the reported L2 Tags in the receive descriptor */
|
||||
rlan_ctx.l2tsel = 1;
|
||||
|
||||
rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;
|
||||
rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;
|
||||
rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT;
|
||||
|
||||
/* This controls whether VLAN is stripped from inner headers
|
||||
* The VLAN in the inner L2 header is stripped to the receive
|
||||
* descriptor if enabled by this flag.
|
||||
*/
|
||||
rlan_ctx.showiv = 0;
|
||||
|
||||
/* Max packet size for this queue - must not be set to a larger value
|
||||
* than 5 x DBUF
|
||||
*/
|
||||
rlan_ctx.rxmax = min_t(u16, vsi->max_frame,
|
||||
ICE_MAX_CHAINED_RX_BUFS * vsi->rx_buf_len);
|
||||
|
||||
/* Rx queue threshold in units of 64 */
|
||||
rlan_ctx.lrxqthresh = 1;
|
||||
|
||||
/* Enable Flexible Descriptors in the queue context which
|
||||
* allows this driver to select a specific receive descriptor format
|
||||
*/
|
||||
regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
|
||||
regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
|
||||
QRXFLXP_CNTXT_RXDID_IDX_M;
|
||||
|
||||
/* increasing context priority to pick up profile id;
|
||||
* default is 0x01; setting to 0x03 to ensure profile
|
||||
* is programming if prev context is of same priority
|
||||
*/
|
||||
regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) &
|
||||
QRXFLXP_CNTXT_RXDID_PRIO_M;
|
||||
|
||||
wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
|
||||
|
||||
/* Absolute queue number out of 2K needs to be passed */
|
||||
err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
|
||||
if (err) {
|
||||
dev_err(&vsi->back->pdev->dev,
|
||||
"Failed to set LAN Rx queue context for absolute Rx queue %d error: %d\n",
|
||||
pf_q, err);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* init queue specific tail register */
|
||||
ring->tail = hw->hw_addr + QRX_TAIL(pf_q);
|
||||
writel(0, ring->tail);
|
||||
ice_alloc_rx_bufs(ring, ICE_DESC_UNUSED(ring));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_cfg_rxqs - Configure the VSI for Rx
|
||||
* @vsi: the VSI being configured
|
||||
*
|
||||
* Return 0 on success and a negative value on error
|
||||
* Configure the Rx VSI for operation.
|
||||
*/
|
||||
static int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
|
||||
{
|
||||
int err = 0;
|
||||
u16 i;
|
||||
|
||||
if (vsi->netdev && vsi->netdev->mtu > ETH_DATA_LEN)
|
||||
vsi->max_frame = vsi->netdev->mtu +
|
||||
ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
|
||||
else
|
||||
vsi->max_frame = ICE_RXBUF_2048;
|
||||
|
||||
vsi->rx_buf_len = ICE_RXBUF_2048;
|
||||
/* set up individual rings */
|
||||
for (i = 0; i < vsi->num_rxq && !err; i++)
|
||||
err = ice_setup_rx_ctx(vsi->rx_rings[i]);
|
||||
|
||||
if (err) {
|
||||
dev_err(&vsi->back->pdev->dev, "ice_setup_rx_ctx failed\n");
|
||||
return -EIO;
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_cfg - Setup the VSI
|
||||
* @vsi: the VSI being configured
|
||||
|
|
@ -4232,207 +3919,6 @@ static int ice_vsi_cfg(struct ice_vsi *vsi)
|
|||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_stop_tx_rings - Disable Tx rings
|
||||
* @vsi: the VSI being configured
|
||||
*/
|
||||
static int ice_vsi_stop_tx_rings(struct ice_vsi *vsi)
|
||||
{
|
||||
struct ice_pf *pf = vsi->back;
|
||||
struct ice_hw *hw = &pf->hw;
|
||||
enum ice_status status;
|
||||
u32 *q_teids, val;
|
||||
u16 *q_ids, i;
|
||||
int err = 0;
|
||||
|
||||
if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
|
||||
return -EINVAL;
|
||||
|
||||
q_teids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_teids),
|
||||
GFP_KERNEL);
|
||||
if (!q_teids)
|
||||
return -ENOMEM;
|
||||
|
||||
q_ids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_ids),
|
||||
GFP_KERNEL);
|
||||
if (!q_ids) {
|
||||
err = -ENOMEM;
|
||||
goto err_alloc_q_ids;
|
||||
}
|
||||
|
||||
/* set up the tx queue list to be disabled */
|
||||
ice_for_each_txq(vsi, i) {
|
||||
u16 v_idx;
|
||||
|
||||
if (!vsi->tx_rings || !vsi->tx_rings[i]) {
|
||||
err = -EINVAL;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
q_ids[i] = vsi->txq_map[i];
|
||||
q_teids[i] = vsi->tx_rings[i]->txq_teid;
|
||||
|
||||
/* clear cause_ena bit for disabled queues */
|
||||
val = rd32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
|
||||
val &= ~QINT_TQCTL_CAUSE_ENA_M;
|
||||
wr32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
|
||||
|
||||
/* software is expected to wait for 100 ns */
|
||||
ndelay(100);
|
||||
|
||||
/* trigger a software interrupt for the vector associated to
|
||||
* the queue to schedule napi handler
|
||||
*/
|
||||
v_idx = vsi->tx_rings[i]->q_vector->v_idx;
|
||||
wr32(hw, GLINT_DYN_CTL(vsi->base_vector + v_idx),
|
||||
GLINT_DYN_CTL_SWINT_TRIG_M | GLINT_DYN_CTL_INTENA_MSK_M);
|
||||
}
|
||||
status = ice_dis_vsi_txq(vsi->port_info, vsi->num_txq, q_ids, q_teids,
|
||||
NULL);
|
||||
/* if the disable queue command was exercised during an active reset
|
||||
* flow, ICE_ERR_RESET_ONGOING is returned. This is not an error as
|
||||
* the reset operation disables queues at the hardware level anyway.
|
||||
*/
|
||||
if (status == ICE_ERR_RESET_ONGOING) {
|
||||
dev_dbg(&pf->pdev->dev,
|
||||
"Reset in progress. LAN Tx queues already disabled\n");
|
||||
} else if (status) {
|
||||
dev_err(&pf->pdev->dev,
|
||||
"Failed to disable LAN Tx queues, error: %d\n",
|
||||
status);
|
||||
err = -ENODEV;
|
||||
}
|
||||
|
||||
err_out:
|
||||
devm_kfree(&pf->pdev->dev, q_ids);
|
||||
|
||||
err_alloc_q_ids:
|
||||
devm_kfree(&pf->pdev->dev, q_teids);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
|
||||
* @pf: the PF being configured
|
||||
* @pf_q: the PF queue
|
||||
* @ena: enable or disable state of the queue
|
||||
*
|
||||
* This routine will wait for the given Rx queue of the PF to reach the
|
||||
* enabled or disabled state.
|
||||
* Returns -ETIMEDOUT in case of failing to reach the requested state after
|
||||
* multiple retries; else will return 0 in case of success.
|
||||
*/
|
||||
static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ICE_Q_WAIT_RETRY_LIMIT; i++) {
|
||||
u32 rx_reg = rd32(&pf->hw, QRX_CTRL(pf_q));
|
||||
|
||||
if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
|
||||
break;
|
||||
|
||||
usleep_range(10, 20);
|
||||
}
|
||||
if (i >= ICE_Q_WAIT_RETRY_LIMIT)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_ctrl_rx_rings - Start or stop a VSI's rx rings
|
||||
* @vsi: the VSI being configured
|
||||
* @ena: start or stop the rx rings
|
||||
*/
|
||||
static int ice_vsi_ctrl_rx_rings(struct ice_vsi *vsi, bool ena)
|
||||
{
|
||||
struct ice_pf *pf = vsi->back;
|
||||
struct ice_hw *hw = &pf->hw;
|
||||
int i, j, ret = 0;
|
||||
|
||||
for (i = 0; i < vsi->num_rxq; i++) {
|
||||
int pf_q = vsi->rxq_map[i];
|
||||
u32 rx_reg;
|
||||
|
||||
for (j = 0; j < ICE_Q_WAIT_MAX_RETRY; j++) {
|
||||
rx_reg = rd32(hw, QRX_CTRL(pf_q));
|
||||
if (((rx_reg >> QRX_CTRL_QENA_REQ_S) & 1) ==
|
||||
((rx_reg >> QRX_CTRL_QENA_STAT_S) & 1))
|
||||
break;
|
||||
usleep_range(1000, 2000);
|
||||
}
|
||||
|
||||
/* Skip if the queue is already in the requested state */
|
||||
if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
|
||||
continue;
|
||||
|
||||
/* turn on/off the queue */
|
||||
if (ena)
|
||||
rx_reg |= QRX_CTRL_QENA_REQ_M;
|
||||
else
|
||||
rx_reg &= ~QRX_CTRL_QENA_REQ_M;
|
||||
wr32(hw, QRX_CTRL(pf_q), rx_reg);
|
||||
|
||||
/* wait for the change to finish */
|
||||
ret = ice_pf_rxq_wait(pf, pf_q, ena);
|
||||
if (ret) {
|
||||
dev_err(&pf->pdev->dev,
|
||||
"VSI idx %d Rx ring %d %sable timeout\n",
|
||||
vsi->idx, pf_q, (ena ? "en" : "dis"));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_start_rx_rings - start VSI's rx rings
|
||||
* @vsi: the VSI whose rings are to be started
|
||||
*
|
||||
* Returns 0 on success and a negative value on error
|
||||
*/
|
||||
static int ice_vsi_start_rx_rings(struct ice_vsi *vsi)
|
||||
{
|
||||
return ice_vsi_ctrl_rx_rings(vsi, true);
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_stop_rx_rings - stop VSI's rx rings
|
||||
* @vsi: the VSI
|
||||
*
|
||||
* Returns 0 on success and a negative value on error
|
||||
*/
|
||||
static int ice_vsi_stop_rx_rings(struct ice_vsi *vsi)
|
||||
{
|
||||
return ice_vsi_ctrl_rx_rings(vsi, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_vsi_stop_tx_rx_rings - stop VSI's tx and rx rings
|
||||
* @vsi: the VSI
|
||||
* Returns 0 on success and a negative value on error
|
||||
*/
|
||||
static int ice_vsi_stop_tx_rx_rings(struct ice_vsi *vsi)
|
||||
{
|
||||
int err_tx, err_rx;
|
||||
|
||||
err_tx = ice_vsi_stop_tx_rings(vsi);
|
||||
if (err_tx)
|
||||
dev_dbg(&vsi->back->pdev->dev, "Failed to disable Tx rings\n");
|
||||
|
||||
err_rx = ice_vsi_stop_rx_rings(vsi);
|
||||
if (err_rx)
|
||||
dev_dbg(&vsi->back->pdev->dev, "Failed to disable Rx rings\n");
|
||||
|
||||
if (err_tx || err_rx)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_napi_enable_all - Enable NAPI for all q_vectors in the VSI
|
||||
* @vsi: the VSI being configured
|
||||
|
|
@ -4822,7 +4308,7 @@ static void ice_napi_disable_all(struct ice_vsi *vsi)
|
|||
*/
|
||||
int ice_down(struct ice_vsi *vsi)
|
||||
{
|
||||
int i, err;
|
||||
int i, tx_err, rx_err;
|
||||
|
||||
/* Caller of this function is expected to set the
|
||||
* vsi->state __ICE_DOWN bit
|
||||
|
|
@ -4833,7 +4319,18 @@ int ice_down(struct ice_vsi *vsi)
|
|||
}
|
||||
|
||||
ice_vsi_dis_irq(vsi);
|
||||
err = ice_vsi_stop_tx_rx_rings(vsi);
|
||||
tx_err = ice_vsi_stop_tx_rings(vsi);
|
||||
if (tx_err)
|
||||
netdev_err(vsi->netdev,
|
||||
"Failed stop Tx rings, VSI %d error %d\n",
|
||||
vsi->vsi_num, tx_err);
|
||||
|
||||
rx_err = ice_vsi_stop_rx_rings(vsi);
|
||||
if (rx_err)
|
||||
netdev_err(vsi->netdev,
|
||||
"Failed stop Rx rings, VSI %d error %d\n",
|
||||
vsi->vsi_num, rx_err);
|
||||
|
||||
ice_napi_disable_all(vsi);
|
||||
|
||||
ice_for_each_txq(vsi, i)
|
||||
|
|
@ -4842,10 +4339,14 @@ int ice_down(struct ice_vsi *vsi)
|
|||
ice_for_each_rxq(vsi, i)
|
||||
ice_clean_rx_ring(vsi->rx_rings[i]);
|
||||
|
||||
if (err)
|
||||
netdev_err(vsi->netdev, "Failed to close VSI 0x%04X on switch 0x%04X\n",
|
||||
if (tx_err || rx_err) {
|
||||
netdev_err(vsi->netdev,
|
||||
"Failed to close VSI 0x%04X on switch 0x%04X\n",
|
||||
vsi->vsi_num, vsi->vsw->sw_id);
|
||||
return err;
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -4865,6 +4366,7 @@ static int ice_vsi_setup_tx_rings(struct ice_vsi *vsi)
|
|||
}
|
||||
|
||||
ice_for_each_txq(vsi, i) {
|
||||
vsi->tx_rings[i]->netdev = vsi->netdev;
|
||||
err = ice_setup_tx_ring(vsi->tx_rings[i]);
|
||||
if (err)
|
||||
break;
|
||||
|
|
@ -4890,6 +4392,7 @@ static int ice_vsi_setup_rx_rings(struct ice_vsi *vsi)
|
|||
}
|
||||
|
||||
ice_for_each_rxq(vsi, i) {
|
||||
vsi->rx_rings[i]->netdev = vsi->netdev;
|
||||
err = ice_setup_rx_ring(vsi->rx_rings[i]);
|
||||
if (err)
|
||||
break;
|
||||
|
|
|
|||
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