RDMA/irdma: Use HW specific minimum WQ size
HW GEN1 and GEN2 have different min WQ sizes but they are currently set to the same value. Use a gen specific attribute min_hw_wq_size and extend ABI to pass it to user-space. Signed-off-by: Sindhu Devale <sindhu.devale@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Link: https://lore.kernel.org/r/20230725155525.1081-3-shiraz.saleem@intel.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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3a84987204
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72d422c246
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@ -254,5 +254,6 @@ void i40iw_init_hw(struct irdma_sc_dev *dev)
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dev->hw_attrs.max_stat_idx = IRDMA_HW_STAT_INDEX_MAX_GEN_1;
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dev->hw_attrs.max_hw_outbound_msg_size = I40IW_MAX_OUTBOUND_MSG_SIZE;
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dev->hw_attrs.max_hw_inbound_msg_size = I40IW_MAX_INBOUND_MSG_SIZE;
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dev->hw_attrs.uk_attrs.min_hw_wq_size = I40IW_MIN_WQ_SIZE;
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dev->hw_attrs.max_qp_wr = I40IW_MAX_QP_WRS;
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}
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@ -140,11 +140,11 @@ enum i40iw_device_caps_const {
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I40IW_MAX_CQ_SIZE = 1048575,
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I40IW_MAX_OUTBOUND_MSG_SIZE = 2147483647,
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I40IW_MAX_INBOUND_MSG_SIZE = 2147483647,
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I40IW_MIN_WQ_SIZE = 4 /* WQEs */,
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};
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#define I40IW_QP_WQE_MIN_SIZE 32
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#define I40IW_QP_WQE_MAX_SIZE 128
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#define I40IW_QP_SW_MIN_WQSIZE 4
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#define I40IW_MAX_RQ_WQE_SHIFT 2
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#define I40IW_MAX_QUANTA_PER_WR 2
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@ -195,6 +195,7 @@ void icrdma_init_hw(struct irdma_sc_dev *dev)
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dev->hw_attrs.max_stat_inst = ICRDMA_MAX_STATS_COUNT;
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dev->hw_attrs.max_stat_idx = IRDMA_HW_STAT_INDEX_MAX_GEN_2;
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dev->hw_attrs.uk_attrs.min_hw_wq_size = ICRDMA_MIN_WQ_SIZE;
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dev->hw_attrs.uk_attrs.max_hw_sq_chunk = IRDMA_MAX_QUANTA_PER_WR;
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dev->hw_attrs.uk_attrs.feature_flags |= IRDMA_FEATURE_RTS_AE |
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IRDMA_FEATURE_CQ_RESIZE;
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@ -64,6 +64,7 @@ enum icrdma_device_caps_const {
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ICRDMA_MAX_IRD_SIZE = 127,
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ICRDMA_MAX_ORD_SIZE = 255,
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ICRDMA_MIN_WQ_SIZE = 8 /* WQEs */,
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};
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@ -119,6 +119,7 @@ struct irdma_uk_attrs {
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u32 min_hw_cq_size;
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u32 max_hw_cq_size;
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u16 max_hw_sq_chunk;
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u16 min_hw_wq_size;
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u8 hw_rev;
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};
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@ -1349,10 +1349,12 @@ void irdma_get_wqe_shift(struct irdma_uk_attrs *uk_attrs, u32 sge,
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int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift,
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u32 *sqdepth)
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{
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u32 min_size = (u32)uk_attrs->min_hw_wq_size << shift;
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*sqdepth = irdma_qp_round_up((sq_size << shift) + IRDMA_SQ_RSVD);
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if (*sqdepth < (IRDMA_QP_SW_MIN_WQSIZE << shift))
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*sqdepth = IRDMA_QP_SW_MIN_WQSIZE << shift;
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if (*sqdepth < min_size)
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*sqdepth = min_size;
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else if (*sqdepth > uk_attrs->max_hw_wq_quanta)
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return -EINVAL;
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@ -1369,10 +1371,12 @@ int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift,
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int irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size, u8 shift,
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u32 *rqdepth)
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{
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u32 min_size = (u32)uk_attrs->min_hw_wq_size << shift;
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*rqdepth = irdma_qp_round_up((rq_size << shift) + IRDMA_RQ_RSVD);
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if (*rqdepth < (IRDMA_QP_SW_MIN_WQSIZE << shift))
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*rqdepth = IRDMA_QP_SW_MIN_WQSIZE << shift;
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if (*rqdepth < min_size)
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*rqdepth = min_size;
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else if (*rqdepth > uk_attrs->max_hw_rq_quanta)
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return -EINVAL;
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@ -85,6 +85,7 @@ enum irdma_device_caps_const {
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IRDMA_Q2_BUF_SIZE = 256,
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IRDMA_QP_CTX_SIZE = 256,
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IRDMA_MAX_PDS = 262144,
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IRDMA_MIN_WQ_SIZE_GEN2 = 8,
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};
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enum irdma_addressing_type {
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@ -330,6 +330,8 @@ static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
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uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
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uresp.hw_rev = uk_attrs->hw_rev;
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uresp.comp_mask |= IRDMA_ALLOC_UCTX_USE_RAW_ATTR;
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uresp.min_hw_wq_size = uk_attrs->min_hw_wq_size;
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uresp.comp_mask |= IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE;
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if (ib_copy_to_udata(udata, &uresp,
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min(sizeof(uresp), udata->outlen))) {
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rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
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@ -24,6 +24,7 @@ enum irdma_memreg_type {
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enum {
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IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0,
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IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1,
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};
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struct irdma_alloc_ucontext_req {
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@ -52,6 +53,8 @@ struct irdma_alloc_ucontext_resp {
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__u8 hw_rev;
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__u8 rsvd2;
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__aligned_u64 comp_mask;
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__u16 min_hw_wq_size;
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__u8 rsvd3[6];
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};
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struct irdma_alloc_pd_resp {
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