Merge branch 'msm-core' into for-next
* msm-core: msm: iommu: Enable IOMMU support for MSM8960 msm: iommu: Generalize platform data for multiple targets msm: iommu: Create a Kconfig item for the IOMMU driver
This commit is contained in:
Коммит
7358cf2073
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@ -45,7 +45,6 @@ config ARCH_MSM8X60
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select CPU_V7
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select MSM_V2_TLMM
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select MSM_GPIOMUX
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select IOMMU_API
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select MSM_SCM if SMP
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config ARCH_MSM8960
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@ -149,6 +148,18 @@ config MACH_MSM8960_RUMI3
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endmenu
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config MSM_IOMMU
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bool "MSM IOMMU Support"
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depends on ARCH_MSM8X60 || ARCH_MSM8960
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select IOMMU_API
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default n
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help
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Support for the IOMMUs found on certain Qualcomm SOCs.
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These IOMMUs allow virtualization of the address space used by most
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cores within the multimedia subsystem.
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If unsure, say N here.
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config IOMMU_PGTABLES_L2
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def_bool y
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depends on ARCH_MSM8X60 && MMU && SMP && CPU_DCACHE_DISABLE=n
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@ -4,11 +4,12 @@ obj-$(CONFIG_DEBUG_FS) += clock-debug.o
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endif
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obj-$(CONFIG_MSM_VIC) += irq-vic.o
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obj-$(CONFIG_MSM_IOMMU) += iommu.o iommu_dev.o devices-iommu.o
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obj-$(CONFIG_ARCH_MSM7X00A) += dma.o irq.o acpuclock-arm11.o
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obj-$(CONFIG_ARCH_MSM7X30) += dma.o
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obj-$(CONFIG_ARCH_QSD8X50) += dma.o sirc.o
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obj-$(CONFIG_ARCH_MSM8X60) += clock-dummy.o iommu.o iommu_dev.o devices-msm8x60-iommu.o
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obj-$(CONFIG_ARCH_MSM8X60) += clock-dummy.o
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obj-$(CONFIG_ARCH_MSM8960) += clock-dummy.o
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obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o
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@ -1,4 +1,4 @@
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/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -18,15 +18,13 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/bootmem.h>
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#include <mach/msm_iomap-8x60.h>
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#include <mach/irqs-8x60.h>
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#include <mach/irqs.h>
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#include <mach/iommu.h>
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static struct resource msm_iommu_jpegd_resources[] = {
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{
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.start = MSM_IOMMU_JPEGD_PHYS,
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.end = MSM_IOMMU_JPEGD_PHYS + MSM_IOMMU_JPEGD_SIZE - 1,
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.start = 0x07300000,
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.end = 0x07300000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -46,8 +44,8 @@ static struct resource msm_iommu_jpegd_resources[] = {
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static struct resource msm_iommu_vpe_resources[] = {
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{
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.start = MSM_IOMMU_VPE_PHYS,
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.end = MSM_IOMMU_VPE_PHYS + MSM_IOMMU_VPE_SIZE - 1,
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.start = 0x07400000,
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.end = 0x07400000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -67,8 +65,8 @@ static struct resource msm_iommu_vpe_resources[] = {
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static struct resource msm_iommu_mdp0_resources[] = {
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{
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.start = MSM_IOMMU_MDP0_PHYS,
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.end = MSM_IOMMU_MDP0_PHYS + MSM_IOMMU_MDP0_SIZE - 1,
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.start = 0x07500000,
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.end = 0x07500000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -88,8 +86,8 @@ static struct resource msm_iommu_mdp0_resources[] = {
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static struct resource msm_iommu_mdp1_resources[] = {
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{
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.start = MSM_IOMMU_MDP1_PHYS,
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.end = MSM_IOMMU_MDP1_PHYS + MSM_IOMMU_MDP1_SIZE - 1,
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.start = 0x07600000,
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.end = 0x07600000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -109,8 +107,8 @@ static struct resource msm_iommu_mdp1_resources[] = {
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static struct resource msm_iommu_rot_resources[] = {
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{
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.start = MSM_IOMMU_ROT_PHYS,
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.end = MSM_IOMMU_ROT_PHYS + MSM_IOMMU_ROT_SIZE - 1,
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.start = 0x07700000,
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.end = 0x07700000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -130,8 +128,8 @@ static struct resource msm_iommu_rot_resources[] = {
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static struct resource msm_iommu_ijpeg_resources[] = {
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{
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.start = MSM_IOMMU_IJPEG_PHYS,
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.end = MSM_IOMMU_IJPEG_PHYS + MSM_IOMMU_IJPEG_SIZE - 1,
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.start = 0x07800000,
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.end = 0x07800000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -151,8 +149,8 @@ static struct resource msm_iommu_ijpeg_resources[] = {
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static struct resource msm_iommu_vfe_resources[] = {
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{
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.start = MSM_IOMMU_VFE_PHYS,
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.end = MSM_IOMMU_VFE_PHYS + MSM_IOMMU_VFE_SIZE - 1,
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.start = 0x07900000,
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.end = 0x07900000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -172,8 +170,8 @@ static struct resource msm_iommu_vfe_resources[] = {
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static struct resource msm_iommu_vcodec_a_resources[] = {
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{
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.start = MSM_IOMMU_VCODEC_A_PHYS,
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.end = MSM_IOMMU_VCODEC_A_PHYS + MSM_IOMMU_VCODEC_A_SIZE - 1,
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.start = 0x07A00000,
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.end = 0x07A00000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -193,8 +191,8 @@ static struct resource msm_iommu_vcodec_a_resources[] = {
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static struct resource msm_iommu_vcodec_b_resources[] = {
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{
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.start = MSM_IOMMU_VCODEC_B_PHYS,
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.end = MSM_IOMMU_VCODEC_B_PHYS + MSM_IOMMU_VCODEC_B_SIZE - 1,
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.start = 0x07B00000,
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.end = 0x07B00000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -214,8 +212,8 @@ static struct resource msm_iommu_vcodec_b_resources[] = {
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static struct resource msm_iommu_gfx3d_resources[] = {
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{
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.start = MSM_IOMMU_GFX3D_PHYS,
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.end = MSM_IOMMU_GFX3D_PHYS + MSM_IOMMU_GFX3D_SIZE - 1,
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.start = 0x07C00000,
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.end = 0x07C00000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -235,8 +233,8 @@ static struct resource msm_iommu_gfx3d_resources[] = {
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static struct resource msm_iommu_gfx2d0_resources[] = {
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{
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.start = MSM_IOMMU_GFX2D0_PHYS,
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.end = MSM_IOMMU_GFX2D0_PHYS + MSM_IOMMU_GFX2D0_SIZE - 1,
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.start = 0x07D00000,
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.end = 0x07D00000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -256,8 +254,8 @@ static struct resource msm_iommu_gfx2d0_resources[] = {
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static struct resource msm_iommu_gfx2d1_resources[] = {
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{
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.start = MSM_IOMMU_GFX2D1_PHYS,
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.end = MSM_IOMMU_GFX2D1_PHYS + MSM_IOMMU_GFX2D1_SIZE - 1,
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.start = 0x07E00000,
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.end = 0x07E00000 + SZ_1M - 1,
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.name = "physbase",
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.flags = IORESOURCE_MEM,
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},
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@ -62,40 +62,4 @@
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#define MSM8X60_TMR0_PHYS 0x02040000
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#define MSM8X60_TMR0_SIZE SZ_4K
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#define MSM_IOMMU_JPEGD_PHYS 0x07300000
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#define MSM_IOMMU_JPEGD_SIZE SZ_1M
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#define MSM_IOMMU_VPE_PHYS 0x07400000
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#define MSM_IOMMU_VPE_SIZE SZ_1M
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#define MSM_IOMMU_MDP0_PHYS 0x07500000
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#define MSM_IOMMU_MDP0_SIZE SZ_1M
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#define MSM_IOMMU_MDP1_PHYS 0x07600000
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#define MSM_IOMMU_MDP1_SIZE SZ_1M
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#define MSM_IOMMU_ROT_PHYS 0x07700000
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#define MSM_IOMMU_ROT_SIZE SZ_1M
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#define MSM_IOMMU_IJPEG_PHYS 0x07800000
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#define MSM_IOMMU_IJPEG_SIZE SZ_1M
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#define MSM_IOMMU_VFE_PHYS 0x07900000
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#define MSM_IOMMU_VFE_SIZE SZ_1M
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#define MSM_IOMMU_VCODEC_A_PHYS 0x07A00000
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#define MSM_IOMMU_VCODEC_A_SIZE SZ_1M
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#define MSM_IOMMU_VCODEC_B_PHYS 0x07B00000
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#define MSM_IOMMU_VCODEC_B_SIZE SZ_1M
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#define MSM_IOMMU_GFX3D_PHYS 0x07C00000
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#define MSM_IOMMU_GFX3D_SIZE SZ_1M
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#define MSM_IOMMU_GFX2D0_PHYS 0x07D00000
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#define MSM_IOMMU_GFX2D0_SIZE SZ_1M
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#define MSM_IOMMU_GFX2D1_PHYS 0x07E00000
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#define MSM_IOMMU_GFX2D1_SIZE SZ_1M
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#endif
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