scsi: lpfc: Add if_type=6 support for cycling valid bits
Traditional SLI4 required the driver to clear Valid bits on EQEs and CQEs after consuming them. The new if_type=6 hardware will cycle the value for what is valid on each queue itteration. The driver no longer has to touch the valid bits. This also means all the cpu cache dirtying and perhaps flush/refill's done by the hardware in accessing the EQ/CQ elements is eliminated. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <james.smart@broadcom.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
James Smart
Martin K. Petersen
Родитель
fbd8a6ba65
Коммит
7365f6fdbb
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@ -1040,6 +1040,9 @@ struct eq_context {
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#define lpfc_eq_context_valid_SHIFT 29
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#define lpfc_eq_context_valid_MASK 0x00000001
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#define lpfc_eq_context_valid_WORD word0
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#define lpfc_eq_context_autovalid_SHIFT 28
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#define lpfc_eq_context_autovalid_MASK 0x00000001
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#define lpfc_eq_context_autovalid_WORD word0
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uint32_t word1;
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#define lpfc_eq_context_count_SHIFT 26
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#define lpfc_eq_context_count_MASK 0x00000003
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@ -1173,6 +1176,9 @@ struct cq_context {
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#define LPFC_CQ_CNT_512 0x1
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#define LPFC_CQ_CNT_1024 0x2
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#define LPFC_CQ_CNT_WORD7 0x3
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#define lpfc_cq_context_autovalid_SHIFT 15
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#define lpfc_cq_context_autovalid_MASK 0x00000001
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#define lpfc_cq_context_autovalid_WORD word0
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uint32_t word1;
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#define lpfc_cq_eq_id_SHIFT 22 /* Version 0 Only */
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#define lpfc_cq_eq_id_MASK 0x000000FF
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@ -1231,9 +1237,9 @@ struct lpfc_mbx_cq_create_set {
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#define lpfc_mbx_cq_create_set_cqe_size_SHIFT 25
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#define lpfc_mbx_cq_create_set_cqe_size_MASK 0x00000003
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#define lpfc_mbx_cq_create_set_cqe_size_WORD word1
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#define lpfc_mbx_cq_create_set_auto_SHIFT 15
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#define lpfc_mbx_cq_create_set_auto_MASK 0x0000001
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#define lpfc_mbx_cq_create_set_auto_WORD word1
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#define lpfc_mbx_cq_create_set_autovalid_SHIFT 15
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#define lpfc_mbx_cq_create_set_autovalid_MASK 0x0000001
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#define lpfc_mbx_cq_create_set_autovalid_WORD word1
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#define lpfc_mbx_cq_create_set_nodelay_SHIFT 14
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#define lpfc_mbx_cq_create_set_nodelay_MASK 0x00000001
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#define lpfc_mbx_cq_create_set_nodelay_WORD word1
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@ -3288,6 +3294,9 @@ struct lpfc_sli4_parameters {
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#define cfg_sli_hint_2_MASK 0x0000001f
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#define cfg_sli_hint_2_WORD word1
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uint32_t word2;
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#define cfg_eqav_SHIFT 31
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#define cfg_eqav_MASK 0x00000001
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#define cfg_eqav_WORD word2
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uint32_t word3;
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uint32_t word4;
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#define cfg_cqv_SHIFT 14
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@ -3296,6 +3305,9 @@ struct lpfc_sli4_parameters {
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#define cfg_cqpsize_SHIFT 16
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#define cfg_cqpsize_MASK 0x000000ff
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#define cfg_cqpsize_WORD word4
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#define cfg_cqav_SHIFT 31
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#define cfg_cqav_MASK 0x00000001
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#define cfg_cqav_WORD word4
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uint32_t word5;
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uint32_t word6;
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#define cfg_mqv_SHIFT 14
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@ -8063,6 +8063,7 @@ lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
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wqidx);
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return 1;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.nvme_cq[wqidx] = qdesc;
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qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
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@ -8100,6 +8101,7 @@ lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
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"0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
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return 1;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.fcp_cq[wqidx] = qdesc;
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/* Create Fast Path FCP WQs */
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@ -8293,6 +8295,7 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
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"0497 Failed allocate EQ (%d)\n", idx);
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goto out_error;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.hba_eq[idx] = qdesc;
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}
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@ -8318,6 +8321,7 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
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"CQ Set (%d)\n", idx);
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goto out_error;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.nvmet_cqset[idx] = qdesc;
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}
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}
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@ -8335,6 +8339,7 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
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"0500 Failed allocate slow-path mailbox CQ\n");
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goto out_error;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.mbx_cq = qdesc;
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/* Create slow-path ELS Complete Queue */
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@ -8346,6 +8351,7 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
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"0501 Failed allocate slow-path ELS CQ\n");
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goto out_error;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.els_cq = qdesc;
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@ -8391,6 +8397,7 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
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"6079 Failed allocate NVME LS CQ\n");
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goto out_error;
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}
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qdesc->qe_valid = 1;
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phba->sli4_hba.nvmels_cq = qdesc;
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/* Create NVME LS Work Queue */
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@ -10569,6 +10576,8 @@ lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
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sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
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sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
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sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
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sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
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sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
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sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
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sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
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mbx_sli4_parameters);
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@ -12387,6 +12396,7 @@ lpfc_fof_queue_create(struct lpfc_hba *phba)
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if (!qdesc)
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goto out_error;
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qdesc->qe_valid = 1;
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phba->sli4_hba.fof_eq = qdesc;
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if (phba->cfg_fof) {
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@ -12405,6 +12415,7 @@ lpfc_fof_queue_create(struct lpfc_hba *phba)
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if (!qdesc)
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goto out_error;
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qdesc->qe_valid = 1;
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phba->sli4_hba.oas_cq = qdesc;
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/* Create OAS WQ */
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@ -283,16 +283,18 @@ lpfc_sli4_mq_release(struct lpfc_queue *q)
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static struct lpfc_eqe *
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lpfc_sli4_eq_get(struct lpfc_queue *q)
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{
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struct lpfc_hba *phba;
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struct lpfc_eqe *eqe;
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uint32_t idx;
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/* sanity check on queue memory */
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if (unlikely(!q))
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return NULL;
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phba = q->phba;
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eqe = q->qe[q->hba_index].eqe;
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/* If the next EQE is not valid then we are done */
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if (!bf_get_le32(lpfc_eqe_valid, eqe))
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if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
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return NULL;
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/* If the host has not yet processed the next entry then we are done */
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idx = ((q->hba_index + 1) % q->entry_count);
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@ -300,6 +302,10 @@ lpfc_sli4_eq_get(struct lpfc_queue *q)
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return NULL;
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q->hba_index = idx;
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/* if the index wrapped around, toggle the valid bit */
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if (phba->sli4_hba.pc_sli4_params.eqav && !q->hba_index)
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q->qe_valid = (q->qe_valid) ? 0 : 1;
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/*
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* insert barrier for instruction interlock : data from the hardware
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@ -371,17 +377,21 @@ uint32_t
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lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
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{
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uint32_t released = 0;
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struct lpfc_hba *phba;
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struct lpfc_eqe *temp_eqe;
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struct lpfc_register doorbell;
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/* sanity check on queue memory */
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if (unlikely(!q))
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return 0;
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phba = q->phba;
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/* while there are valid entries */
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while (q->hba_index != q->host_index) {
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temp_eqe = q->qe[q->host_index].eqe;
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bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
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if (!phba->sli4_hba.pc_sli4_params.eqav) {
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temp_eqe = q->qe[q->host_index].eqe;
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bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
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}
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released++;
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q->host_index = ((q->host_index + 1) % q->entry_count);
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}
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@ -425,17 +435,21 @@ uint32_t
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lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
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{
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uint32_t released = 0;
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struct lpfc_hba *phba;
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struct lpfc_eqe *temp_eqe;
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struct lpfc_register doorbell;
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/* sanity check on queue memory */
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if (unlikely(!q))
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return 0;
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phba = q->phba;
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/* while there are valid entries */
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while (q->hba_index != q->host_index) {
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temp_eqe = q->qe[q->host_index].eqe;
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bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
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if (!phba->sli4_hba.pc_sli4_params.eqav) {
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temp_eqe = q->qe[q->host_index].eqe;
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bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
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}
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released++;
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q->host_index = ((q->host_index + 1) % q->entry_count);
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}
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@ -467,23 +481,28 @@ lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
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static struct lpfc_cqe *
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lpfc_sli4_cq_get(struct lpfc_queue *q)
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{
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struct lpfc_hba *phba;
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struct lpfc_cqe *cqe;
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uint32_t idx;
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/* sanity check on queue memory */
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if (unlikely(!q))
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return NULL;
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phba = q->phba;
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cqe = q->qe[q->hba_index].cqe;
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/* If the next CQE is not valid then we are done */
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if (!bf_get_le32(lpfc_cqe_valid, q->qe[q->hba_index].cqe))
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if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
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return NULL;
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/* If the host has not yet processed the next entry then we are done */
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idx = ((q->hba_index + 1) % q->entry_count);
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if (idx == q->host_index)
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return NULL;
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cqe = q->qe[q->hba_index].cqe;
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q->hba_index = idx;
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/* if the index wrapped around, toggle the valid bit */
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if (phba->sli4_hba.pc_sli4_params.cqav && !q->hba_index)
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q->qe_valid = (q->qe_valid) ? 0 : 1;
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/*
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* insert barrier for instruction interlock : data from the hardware
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@ -516,16 +535,21 @@ uint32_t
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lpfc_sli4_cq_release(struct lpfc_queue *q, bool arm)
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{
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uint32_t released = 0;
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struct lpfc_hba *phba;
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struct lpfc_cqe *temp_qe;
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struct lpfc_register doorbell;
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/* sanity check on queue memory */
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if (unlikely(!q))
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return 0;
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phba = q->phba;
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/* while there are valid entries */
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while (q->hba_index != q->host_index) {
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temp_qe = q->qe[q->host_index].cqe;
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bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
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if (!phba->sli4_hba.pc_sli4_params.cqav) {
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temp_qe = q->qe[q->host_index].cqe;
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bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
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}
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released++;
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q->host_index = ((q->host_index + 1) % q->entry_count);
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}
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@ -564,16 +588,21 @@ uint32_t
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lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm)
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{
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uint32_t released = 0;
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struct lpfc_hba *phba;
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struct lpfc_cqe *temp_qe;
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struct lpfc_register doorbell;
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/* sanity check on queue memory */
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if (unlikely(!q))
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return 0;
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phba = q->phba;
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/* while there are valid entries */
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while (q->hba_index != q->host_index) {
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temp_qe = q->qe[q->host_index].cqe;
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bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
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if (!phba->sli4_hba.pc_sli4_params.cqav) {
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temp_qe = q->qe[q->host_index].cqe;
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bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
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}
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released++;
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q->host_index = ((q->host_index + 1) % q->entry_count);
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}
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@ -7367,6 +7396,7 @@ lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
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struct lpfc_queue *mcq;
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struct lpfc_mcqe *mcqe;
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bool pending_completions = false;
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uint8_t qe_valid;
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if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
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return false;
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@ -7375,7 +7405,8 @@ lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
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mcq = phba->sli4_hba.mbx_cq;
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idx = mcq->hba_index;
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while (bf_get_le32(lpfc_cqe_valid, mcq->qe[idx].cqe)) {
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qe_valid = mcq->qe_valid;
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while (bf_get_le32(lpfc_cqe_valid, mcq->qe[idx].cqe) == qe_valid) {
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mcqe = (struct lpfc_mcqe *)mcq->qe[idx].cqe;
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if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
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(!bf_get_le32(lpfc_trailer_async, mcqe))) {
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@ -7385,6 +7416,10 @@ lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
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idx = (idx + 1) % mcq->entry_count;
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if (mcq->hba_index == idx)
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break;
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/* if the index wrapped around, toggle the valid bit */
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if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
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qe_valid = (qe_valid) ? 0 : 1;
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}
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return pending_completions;
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@ -8258,7 +8293,7 @@ lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
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} else if (flag == MBX_POLL) {
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lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
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"(%d):2542 Try to issue mailbox command "
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"x%x (x%x/x%x) synchronously ahead of async"
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"x%x (x%x/x%x) synchronously ahead of async "
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"mailbox command queue: x%x x%x\n",
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mboxq->vport ? mboxq->vport->vpi : 0,
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mboxq->u.mb.mbxCommand,
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@ -14335,11 +14370,21 @@ lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
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LPFC_MBOX_OPCODE_EQ_CREATE,
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length, LPFC_SLI4_MBX_EMBED);
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eq_create = &mbox->u.mqe.un.eq_create;
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shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
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bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
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eq->page_count);
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bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
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LPFC_EQE_SIZE);
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bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
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/* Use version 2 of CREATE_EQ if eqav is set */
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if (phba->sli4_hba.pc_sli4_params.eqav) {
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bf_set(lpfc_mbox_hdr_version, &shdr->request,
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LPFC_Q_CREATE_VERSION_2);
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bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
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phba->sli4_hba.pc_sli4_params.eqav);
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}
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/* don't setup delay multiplier using EQ_CREATE */
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dmult = 0;
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bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
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||||
|
|
@ -14384,7 +14429,6 @@ lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
|
|||
mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
|
||||
mbox->context1 = NULL;
|
||||
rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
|
||||
shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
|
||||
shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
|
||||
shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
|
||||
if (shdr_status || shdr_add_status || rc) {
|
||||
|
|
@ -14467,6 +14511,8 @@ lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
|
|||
(cq->page_size / SLI4_PAGE_SIZE));
|
||||
bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
|
||||
eq->queue_id);
|
||||
bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
|
||||
phba->sli4_hba.pc_sli4_params.cqav);
|
||||
} else {
|
||||
bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
|
||||
eq->queue_id);
|
||||
|
|
@ -14638,6 +14684,9 @@ lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
|
|||
&cq_set->u.request, 0);
|
||||
bf_set(lpfc_mbx_cq_create_set_num_cq,
|
||||
&cq_set->u.request, numcq);
|
||||
bf_set(lpfc_mbx_cq_create_set_autovalid,
|
||||
&cq_set->u.request,
|
||||
phba->sli4_hba.pc_sli4_params.cqav);
|
||||
switch (cq->entry_count) {
|
||||
case 2048:
|
||||
case 4096:
|
||||
|
|
|
|||
|
|
@ -216,6 +216,7 @@ struct lpfc_queue {
|
|||
struct work_struct spwork;
|
||||
|
||||
uint64_t isr_timestamp;
|
||||
uint8_t qe_valid;
|
||||
struct lpfc_queue *assoc_qp;
|
||||
union sli4_qe qe[1]; /* array to index entries (must be last) */
|
||||
};
|
||||
|
|
@ -486,6 +487,8 @@ struct lpfc_pc_sli4_params {
|
|||
uint8_t mqv;
|
||||
uint8_t wqv;
|
||||
uint8_t rqv;
|
||||
uint8_t eqav;
|
||||
uint8_t cqav;
|
||||
uint8_t wqsize;
|
||||
#define LPFC_WQ_SZ64_SUPPORT 1
|
||||
#define LPFC_WQ_SZ128_SUPPORT 2
|
||||
|
|
|
|||
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Ссылка в новой задаче