dt-bindings: cpufreq: tegra124: remove vdd-cpu-supply from required properties

The Tegra124 cpufreq driver works only with DFLL clock, which is a
hardware-based frequency/voltage controller. The driver doesn't need to
control the regulator itself. Hence remove that.

Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Joseph Lo 2019-01-04 11:06:45 +08:00 коммит произвёл Thierry Reding
Родитель 7e9d109858
Коммит 73688f7d53
1 изменённых файлов: 0 добавлений и 2 удалений

Просмотреть файл

@ -13,7 +13,6 @@ Required properties:
- pll_x: Fast PLL clocksource. - pll_x: Fast PLL clocksource.
- pll_p: Auxiliary PLL used during fast PLL rate changes. - pll_p: Auxiliary PLL used during fast PLL rate changes.
- dfll: Fast DFLL clocksource that also automatically scales CPU voltage. - dfll: Fast DFLL clocksource that also automatically scales CPU voltage.
- vdd-cpu-supply: Regulator for CPU voltage
Optional properties: Optional properties:
- clock-latency: Specify the possible maximum transition latency for clock, - clock-latency: Specify the possible maximum transition latency for clock,
@ -37,7 +36,6 @@ cpus {
<&dfll>; <&dfll>;
clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll"; clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
clock-latency = <300000>; clock-latency = <300000>;
vdd-cpu-supply: <&vdd_cpu>;
}; };
<...> <...>