lightnvm: remove linear and device addr modes
The linear and device specific address modes can be replaced with a simple offset and bit length conversion that is generic across all devices. This both simplifies the specification and removes the special case for qemu nvme, that previously relied on the linear address mapping. Signed-off-by: Matias Bjørling <m@bjorling.me> Signed-off-by: Jens Axboe <axboe@fb.com>
This commit is contained in:
Matias Bjørling
Jens Axboe
Родитель
c1480ad594
Коммит
7386af270c
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@ -174,8 +174,7 @@ static int nvm_core_init(struct nvm_dev *dev)
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dev->sec_size = grp->csecs;
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dev->oob_size = grp->sos;
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dev->sec_per_pg = grp->fpg_sz / grp->csecs;
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dev->addr_mode = id->ppat;
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dev->addr_format = id->ppaf;
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memcpy(&dev->ppaf, &id->ppaf, sizeof(struct nvm_addr_format));
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dev->plane_mode = NVM_PLANE_SINGLE;
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dev->max_rq_size = dev->ops->max_phys_sect * dev->sec_size;
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@ -73,7 +73,7 @@ static int gennvm_block_bb(struct ppa_addr ppa, int nr_blocks, u8 *blks,
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struct nvm_block *blk;
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int i;
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ppa = addr_to_generic_mode(gn->dev, ppa);
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ppa = dev_to_generic_addr(gn->dev, ppa);
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lun = &gn->luns[(dev->nr_luns * ppa.g.ch) + ppa.g.lun];
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for (i = 0; i < nr_blocks; i++) {
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@ -179,7 +179,7 @@ static int gennvm_blocks_init(struct nvm_dev *dev, struct gen_nvm *gn)
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ppa.ppa = 0;
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ppa.g.ch = lun->vlun.chnl_id;
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ppa.g.lun = lun->vlun.id;
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ppa = generic_to_addr_mode(dev, ppa);
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ppa = generic_to_dev_addr(dev, ppa);
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ret = dev->ops->get_bb_tbl(dev->q, ppa,
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dev->blks_per_lun,
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@ -304,10 +304,10 @@ static void gennvm_addr_to_generic_mode(struct nvm_dev *dev, struct nvm_rq *rqd)
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if (rqd->nr_pages > 1) {
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for (i = 0; i < rqd->nr_pages; i++)
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rqd->ppa_list[i] = addr_to_generic_mode(dev,
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rqd->ppa_list[i] = dev_to_generic_addr(dev,
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rqd->ppa_list[i]);
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} else {
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rqd->ppa_addr = addr_to_generic_mode(dev, rqd->ppa_addr);
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rqd->ppa_addr = dev_to_generic_addr(dev, rqd->ppa_addr);
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}
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}
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@ -317,10 +317,10 @@ static void gennvm_generic_to_addr_mode(struct nvm_dev *dev, struct nvm_rq *rqd)
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if (rqd->nr_pages > 1) {
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for (i = 0; i < rqd->nr_pages; i++)
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rqd->ppa_list[i] = generic_to_addr_mode(dev,
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rqd->ppa_list[i] = generic_to_dev_addr(dev,
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rqd->ppa_list[i]);
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} else {
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rqd->ppa_addr = generic_to_addr_mode(dev, rqd->ppa_addr);
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rqd->ppa_addr = generic_to_dev_addr(dev, rqd->ppa_addr);
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}
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}
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@ -123,12 +123,42 @@ static u64 block_to_addr(struct rrpc *rrpc, struct rrpc_block *rblk)
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return blk->id * rrpc->dev->pgs_per_blk;
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}
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static struct ppa_addr linear_to_generic_addr(struct nvm_dev *dev,
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struct ppa_addr r)
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{
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struct ppa_addr l;
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int secs, pgs, blks, luns;
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sector_t ppa = r.ppa;
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l.ppa = 0;
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div_u64_rem(ppa, dev->sec_per_pg, &secs);
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l.g.sec = secs;
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sector_div(ppa, dev->sec_per_pg);
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div_u64_rem(ppa, dev->sec_per_blk, &pgs);
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l.g.pg = pgs;
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sector_div(ppa, dev->pgs_per_blk);
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div_u64_rem(ppa, dev->blks_per_lun, &blks);
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l.g.blk = blks;
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sector_div(ppa, dev->blks_per_lun);
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div_u64_rem(ppa, dev->luns_per_chnl, &luns);
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l.g.lun = luns;
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sector_div(ppa, dev->luns_per_chnl);
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l.g.ch = ppa;
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return l;
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}
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static struct ppa_addr rrpc_ppa_to_gaddr(struct nvm_dev *dev, u64 addr)
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{
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struct ppa_addr paddr;
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paddr.ppa = addr;
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return __linear_to_generic_addr(dev, paddr);
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return linear_to_generic_addr(dev, paddr);
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}
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/* requires lun->lock taken */
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@ -198,8 +198,7 @@ struct nvme_nvm_id {
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__le32 cap;
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__le32 dom;
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struct nvme_nvm_addr_format ppaf;
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__u8 ppat;
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__u8 resv[223];
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__u8 resv[224];
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struct nvme_nvm_id_group groups[4];
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} __packed;
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@ -99,7 +99,6 @@ struct nvm_id {
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u32 cap;
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u32 dom;
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struct nvm_addr_format ppaf;
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u8 ppat;
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struct nvm_id_group groups[4];
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} __packed;
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@ -119,39 +118,28 @@ struct nvm_tgt_instance {
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#define NVM_VERSION_MINOR 0
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#define NVM_VERSION_PATCH 0
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#define NVM_SEC_BITS (8)
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#define NVM_PL_BITS (6)
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#define NVM_PG_BITS (16)
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#define NVM_BLK_BITS (16)
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#define NVM_LUN_BITS (10)
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#define NVM_PG_BITS (16)
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#define NVM_SEC_BITS (8)
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#define NVM_PL_BITS (8)
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#define NVM_LUN_BITS (8)
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#define NVM_CH_BITS (8)
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struct ppa_addr {
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/* Generic structure for all addresses */
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union {
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/* Channel-based PPA format in nand 4x2x2x2x8x10 */
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struct {
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u64 ch : 4;
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u64 sec : 2; /* 4 sectors per page */
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u64 pl : 2; /* 4 planes per LUN */
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u64 lun : 2; /* 4 LUNs per channel */
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u64 pg : 8; /* 256 pages per block */
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u64 blk : 10;/* 1024 blocks per plane */
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u64 resved : 36;
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} chnl;
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/* Generic structure for all addresses */
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struct {
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u64 blk : NVM_BLK_BITS;
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u64 pg : NVM_PG_BITS;
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u64 sec : NVM_SEC_BITS;
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u64 pl : NVM_PL_BITS;
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u64 pg : NVM_PG_BITS;
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u64 blk : NVM_BLK_BITS;
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u64 lun : NVM_LUN_BITS;
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u64 ch : NVM_CH_BITS;
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} g;
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u64 ppa;
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};
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} __packed;
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};
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struct nvm_rq {
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struct nvm_tgt_instance *ins;
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@ -259,8 +247,7 @@ struct nvm_dev {
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int blks_per_lun;
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int sec_size;
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int oob_size;
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int addr_mode;
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struct nvm_addr_format addr_format;
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struct nvm_addr_format ppaf;
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/* Calculated/Cached values. These do not reflect the actual usable
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* blocks at run-time.
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@ -286,118 +273,45 @@ struct nvm_dev {
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char name[DISK_NAME_LEN];
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};
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/* fallback conversion */
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static struct ppa_addr __generic_to_linear_addr(struct nvm_dev *dev,
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struct ppa_addr r)
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static inline struct ppa_addr generic_to_dev_addr(struct nvm_dev *dev,
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struct ppa_addr r)
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{
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struct ppa_addr l;
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l.ppa = r.g.sec +
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r.g.pg * dev->sec_per_pg +
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r.g.blk * (dev->pgs_per_blk *
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dev->sec_per_pg) +
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r.g.lun * (dev->blks_per_lun *
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dev->pgs_per_blk *
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dev->sec_per_pg) +
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r.g.ch * (dev->blks_per_lun *
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dev->pgs_per_blk *
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dev->luns_per_chnl *
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dev->sec_per_pg);
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l.ppa = ((u64)r.g.blk) << dev->ppaf.blk_offset;
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l.ppa |= ((u64)r.g.pg) << dev->ppaf.pg_offset;
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l.ppa |= ((u64)r.g.sec) << dev->ppaf.sect_offset;
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l.ppa |= ((u64)r.g.pl) << dev->ppaf.pln_offset;
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l.ppa |= ((u64)r.g.lun) << dev->ppaf.lun_offset;
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l.ppa |= ((u64)r.g.ch) << dev->ppaf.ch_offset;
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return l;
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}
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/* fallback conversion */
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static struct ppa_addr __linear_to_generic_addr(struct nvm_dev *dev,
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struct ppa_addr r)
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{
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struct ppa_addr l;
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int secs, pgs, blks, luns;
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sector_t ppa = r.ppa;
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l.ppa = 0;
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div_u64_rem(ppa, dev->sec_per_pg, &secs);
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l.g.sec = secs;
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sector_div(ppa, dev->sec_per_pg);
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div_u64_rem(ppa, dev->sec_per_blk, &pgs);
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l.g.pg = pgs;
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sector_div(ppa, dev->pgs_per_blk);
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div_u64_rem(ppa, dev->blks_per_lun, &blks);
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l.g.blk = blks;
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sector_div(ppa, dev->blks_per_lun);
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div_u64_rem(ppa, dev->luns_per_chnl, &luns);
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l.g.lun = luns;
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sector_div(ppa, dev->luns_per_chnl);
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l.g.ch = ppa;
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return l;
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}
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static struct ppa_addr __generic_to_chnl_addr(struct ppa_addr r)
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static inline struct ppa_addr dev_to_generic_addr(struct nvm_dev *dev,
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struct ppa_addr r)
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{
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struct ppa_addr l;
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l.ppa = 0;
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l.chnl.sec = r.g.sec;
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l.chnl.pl = r.g.pl;
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l.chnl.pg = r.g.pg;
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l.chnl.blk = r.g.blk;
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l.chnl.lun = r.g.lun;
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l.chnl.ch = r.g.ch;
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/*
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* (r.ppa << X offset) & X len bitmask. X eq. blk, pg, etc.
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*/
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l.g.blk = (r.ppa >> dev->ppaf.blk_offset) &
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(((1 << dev->ppaf.blk_len) - 1));
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l.g.pg |= (r.ppa >> dev->ppaf.pg_offset) &
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(((1 << dev->ppaf.pg_len) - 1));
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l.g.sec |= (r.ppa >> dev->ppaf.sect_offset) &
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(((1 << dev->ppaf.sect_len) - 1));
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l.g.pl |= (r.ppa >> dev->ppaf.pln_offset) &
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(((1 << dev->ppaf.pln_len) - 1));
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l.g.lun |= (r.ppa >> dev->ppaf.lun_offset) &
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(((1 << dev->ppaf.lun_len) - 1));
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l.g.ch |= (r.ppa >> dev->ppaf.ch_offset) &
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(((1 << dev->ppaf.ch_len) - 1));
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return l;
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}
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static struct ppa_addr __chnl_to_generic_addr(struct ppa_addr r)
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{
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struct ppa_addr l;
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l.ppa = 0;
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l.g.sec = r.chnl.sec;
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l.g.pl = r.chnl.pl;
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l.g.pg = r.chnl.pg;
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l.g.blk = r.chnl.blk;
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l.g.lun = r.chnl.lun;
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l.g.ch = r.chnl.ch;
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return l;
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}
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static inline struct ppa_addr addr_to_generic_mode(struct nvm_dev *dev,
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struct ppa_addr gppa)
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{
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switch (dev->addr_mode) {
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case NVM_ADDRMODE_LINEAR:
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return __linear_to_generic_addr(dev, gppa);
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case NVM_ADDRMODE_CHANNEL:
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return __chnl_to_generic_addr(gppa);
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default:
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BUG();
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}
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return gppa;
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}
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static inline struct ppa_addr generic_to_addr_mode(struct nvm_dev *dev,
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struct ppa_addr gppa)
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{
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switch (dev->addr_mode) {
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case NVM_ADDRMODE_LINEAR:
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return __generic_to_linear_addr(dev, gppa);
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case NVM_ADDRMODE_CHANNEL:
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return __generic_to_chnl_addr(gppa);
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default:
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BUG();
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}
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return gppa;
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}
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static inline int ppa_empty(struct ppa_addr ppa_addr)
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{
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return (ppa_addr.ppa == ADDR_EMPTY);
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