Merge branch 'parisc-5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller: "Just trivial small updates: An assembler register optimization in the inlined networking checksum functions, a compiler warning fix and don't unneccesary print a runtime warning on machines which wouldn't be affected anyway" * 'parisc-5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Avoid spurious inequivalent alias kernel error messages kexec: Fix pointer-to-int-cast warnings parisc: Do not hardcode registers in checksum functions
This commit is contained in:
Linus Torvalds
Коммит
738d5fabff
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@ -42,31 +42,32 @@ extern __wsum csum_partial_copy_from_user(const void __user *src,
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static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
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{
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unsigned int sum;
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unsigned long t0, t1, t2;
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__asm__ __volatile__ (
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" ldws,ma 4(%1), %0\n"
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" addib,<= -4, %2, 2f\n"
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"\n"
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" ldws 4(%1), %%r20\n"
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" ldws 8(%1), %%r21\n"
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" add %0, %%r20, %0\n"
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" ldws,ma 12(%1), %%r19\n"
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" addc %0, %%r21, %0\n"
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" addc %0, %%r19, %0\n"
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"1: ldws,ma 4(%1), %%r19\n"
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" ldws 4(%1), %4\n"
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" ldws 8(%1), %5\n"
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" add %0, %4, %0\n"
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" ldws,ma 12(%1), %3\n"
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" addc %0, %5, %0\n"
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" addc %0, %3, %0\n"
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"1: ldws,ma 4(%1), %3\n"
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" addib,< 0, %2, 1b\n"
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" addc %0, %%r19, %0\n"
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" addc %0, %3, %0\n"
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"\n"
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" extru %0, 31, 16, %%r20\n"
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" extru %0, 15, 16, %%r21\n"
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" addc %%r20, %%r21, %0\n"
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" extru %0, 15, 16, %%r21\n"
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" add %0, %%r21, %0\n"
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" extru %0, 31, 16, %4\n"
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" extru %0, 15, 16, %5\n"
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" addc %4, %5, %0\n"
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" extru %0, 15, 16, %5\n"
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" add %0, %5, %0\n"
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" subi -1, %0, %0\n"
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"2:\n"
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: "=r" (sum), "=r" (iph), "=r" (ihl)
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: "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (t0), "=r" (t1), "=r" (t2)
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: "1" (iph), "2" (ihl)
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: "r19", "r20", "r21", "memory");
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: "memory");
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return (__force __sum16)sum;
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}
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@ -126,6 +127,10 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
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__u32 len, __u8 proto,
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__wsum sum)
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{
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unsigned long t0, t1, t2, t3;
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len += proto; /* add 16-bit proto + len */
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__asm__ __volatile__ (
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#if BITS_PER_LONG > 32
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@ -136,20 +141,19 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
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** Try to keep 4 registers with "live" values ahead of the ALU.
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*/
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" ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */
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" ldd,ma 8(%2), %%r20\n" /* get 1st daddr word */
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" add %8, %3, %3\n"/* add 16-bit proto + len */
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" add %%r19, %0, %0\n"
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" ldd,ma 8(%1), %%r21\n" /* 2cd saddr */
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" ldd,ma 8(%2), %%r22\n" /* 2cd daddr */
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" add,dc %%r20, %0, %0\n"
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" add,dc %%r21, %0, %0\n"
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" add,dc %%r22, %0, %0\n"
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" ldd,ma 8(%1), %4\n" /* get 1st saddr word */
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" ldd,ma 8(%2), %5\n" /* get 1st daddr word */
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" add %4, %0, %0\n"
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" ldd,ma 8(%1), %6\n" /* 2nd saddr */
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" ldd,ma 8(%2), %7\n" /* 2nd daddr */
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" add,dc %5, %0, %0\n"
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" add,dc %6, %0, %0\n"
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" add,dc %7, %0, %0\n"
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" add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */
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" extrd,u %0, 31, 32, %%r19\n" /* copy upper half down */
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" depdi 0, 31, 32, %0\n" /* clear upper half */
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" add %%r19, %0, %0\n" /* fold into 32-bits */
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" addc 0, %0, %0\n" /* add carry */
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" extrd,u %0, 31, 32, %4\n"/* copy upper half down */
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" depdi 0, 31, 32, %0\n"/* clear upper half */
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" add %4, %0, %0\n" /* fold into 32-bits */
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" addc 0, %0, %0\n" /* add carry */
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#else
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@ -158,30 +162,29 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
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** Insn stream is serialized on the carry bit here too.
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** result from the previous operation (eg r0 + x)
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*/
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" ldw,ma 4(%1), %%r19\n" /* get 1st saddr word */
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" ldw,ma 4(%2), %%r20\n" /* get 1st daddr word */
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" add %8, %3, %3\n" /* add 16-bit proto + len */
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" add %%r19, %0, %0\n"
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" ldw,ma 4(%1), %%r21\n" /* 2cd saddr */
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" addc %%r20, %0, %0\n"
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" ldw,ma 4(%2), %%r22\n" /* 2cd daddr */
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" addc %%r21, %0, %0\n"
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" ldw,ma 4(%1), %%r19\n" /* 3rd saddr */
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" addc %%r22, %0, %0\n"
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" ldw,ma 4(%2), %%r20\n" /* 3rd daddr */
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" addc %%r19, %0, %0\n"
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" ldw,ma 4(%1), %%r21\n" /* 4th saddr */
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" addc %%r20, %0, %0\n"
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" ldw,ma 4(%2), %%r22\n" /* 4th daddr */
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" addc %%r21, %0, %0\n"
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" addc %%r22, %0, %0\n"
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" ldw,ma 4(%1), %4\n" /* get 1st saddr word */
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" ldw,ma 4(%2), %5\n" /* get 1st daddr word */
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" add %4, %0, %0\n"
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" ldw,ma 4(%1), %6\n" /* 2nd saddr */
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" addc %5, %0, %0\n"
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" ldw,ma 4(%2), %7\n" /* 2nd daddr */
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" addc %6, %0, %0\n"
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" ldw,ma 4(%1), %4\n" /* 3rd saddr */
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" addc %7, %0, %0\n"
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" ldw,ma 4(%2), %5\n" /* 3rd daddr */
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" addc %4, %0, %0\n"
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" ldw,ma 4(%1), %6\n" /* 4th saddr */
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" addc %5, %0, %0\n"
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" ldw,ma 4(%2), %7\n" /* 4th daddr */
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" addc %6, %0, %0\n"
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" addc %7, %0, %0\n"
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" addc %3, %0, %0\n" /* fold in proto+len, catch carry */
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#endif
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: "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len)
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: "0" (sum), "1" (saddr), "2" (daddr), "3" (len), "r" (proto)
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: "r19", "r20", "r21", "r22", "memory");
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: "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len),
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"=r" (t0), "=r" (t1), "=r" (t2), "=r" (t3)
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: "0" (sum), "1" (saddr), "2" (daddr), "3" (len)
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: "memory");
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return csum_fold(sum);
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}
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@ -365,7 +365,7 @@ void flush_dcache_page(struct page *page)
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if (old_addr == 0 || (old_addr & (SHM_COLOUR - 1))
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!= (addr & (SHM_COLOUR - 1))) {
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__flush_cache_page(mpnt, addr, page_to_phys(page));
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if (old_addr)
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if (parisc_requires_coherency() && old_addr)
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printk(KERN_ERR "INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %pD\n", old_addr, addr, mpnt->vm_file);
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old_addr = addr;
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}
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@ -1304,7 +1304,7 @@ int crash_prepare_elf64_headers(struct crash_mem *mem, int kernel_map,
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if (kernel_map) {
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phdr->p_type = PT_LOAD;
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phdr->p_flags = PF_R|PF_W|PF_X;
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phdr->p_vaddr = (Elf64_Addr)_text;
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phdr->p_vaddr = (unsigned long) _text;
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phdr->p_filesz = phdr->p_memsz = _end - _text;
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phdr->p_offset = phdr->p_paddr = __pa_symbol(_text);
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ehdr->e_phnum++;
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@ -1321,7 +1321,7 @@ int crash_prepare_elf64_headers(struct crash_mem *mem, int kernel_map,
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phdr->p_offset = mstart;
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phdr->p_paddr = mstart;
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phdr->p_vaddr = (unsigned long long) __va(mstart);
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phdr->p_vaddr = (unsigned long) __va(mstart);
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phdr->p_filesz = phdr->p_memsz = mend - mstart + 1;
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phdr->p_align = 0;
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ehdr->e_phnum++;
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