ARM: KVM: abstract fault register accesses
Instead of directly accessing the fault registers, use proper accessors so the core code can be shared. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Родитель
db730d8d62
Коммит
7393b59917
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@ -22,6 +22,7 @@
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#include <linux/kvm_host.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_mmio.h>
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#include <asm/kvm_arm.h>
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unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num);
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unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu);
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@ -69,4 +70,24 @@ static inline bool kvm_vcpu_reg_is_pc(struct kvm_vcpu *vcpu, int reg)
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return reg == 15;
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}
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static inline u32 kvm_vcpu_get_hsr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hsr;
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}
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static inline unsigned long kvm_vcpu_get_hfar(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hxfar;
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}
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static inline phys_addr_t kvm_vcpu_get_fault_ipa(struct kvm_vcpu *vcpu)
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{
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return ((phys_addr_t)vcpu->arch.fault.hpfar & HPFAR_MASK) << 8;
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}
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static inline unsigned long kvm_vcpu_get_hyp_pc(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hyp_pc;
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}
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#endif /* __ARM_KVM_EMULATE_H__ */
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@ -80,6 +80,13 @@ struct kvm_mmu_memory_cache {
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void *objects[KVM_NR_MEM_OBJS];
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};
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struct kvm_vcpu_fault_info {
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u32 hsr; /* Hyp Syndrome Register */
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u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
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u32 hpfar; /* Hyp IPA Fault Address Register */
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u32 hyp_pc; /* PC when exception was taken from Hyp mode */
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};
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struct kvm_vcpu_arch {
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struct kvm_regs regs;
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@ -93,9 +100,7 @@ struct kvm_vcpu_arch {
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u32 midr;
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/* Exception Information */
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u32 hsr; /* Hyp Syndrome Register */
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u32 hxfar; /* Hyp Data/Inst Fault Address Register */
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u32 hpfar; /* Hyp IPA Fault Address Register */
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struct kvm_vcpu_fault_info fault;
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/* Floating point registers (VFP and Advanced SIMD/NEON) */
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struct vfp_hard_struct vfp_guest;
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@ -122,9 +127,6 @@ struct kvm_vcpu_arch {
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/* Interrupt related fields */
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u32 irq_lines; /* IRQ and FIQ levels */
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/* Hyp exception information */
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u32 hyp_pc; /* PC when exception was taken from Hyp mode */
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/* Cache some mmu pages needed inside spinlock regions */
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struct kvm_mmu_memory_cache mmu_page_cache;
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@ -165,10 +165,10 @@ int main(void)
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DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_pc));
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DEFINE(VCPU_CPSR, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_cpsr));
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DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
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DEFINE(VCPU_HSR, offsetof(struct kvm_vcpu, arch.hsr));
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DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.hxfar));
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DEFINE(VCPU_HPFAR, offsetof(struct kvm_vcpu, arch.hpfar));
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DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.hyp_pc));
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DEFINE(VCPU_HSR, offsetof(struct kvm_vcpu, arch.fault.hsr));
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DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.fault.hxfar));
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DEFINE(VCPU_HPFAR, offsetof(struct kvm_vcpu, arch.fault.hpfar));
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DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.fault.hyp_pc));
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#ifdef CONFIG_KVM_ARM_VGIC
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DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
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DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr));
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@ -492,7 +492,7 @@ static int handle_svc_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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trace_kvm_hvc(*vcpu_pc(vcpu), *vcpu_reg(vcpu, 0),
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vcpu->arch.hsr & HSR_HVC_IMM_MASK);
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kvm_vcpu_get_hsr(vcpu) & HSR_HVC_IMM_MASK);
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if (kvm_psci_call(vcpu))
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return 1;
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@ -513,16 +513,16 @@ static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static int handle_pabt_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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/* The hypervisor should never cause aborts */
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kvm_err("Prefetch Abort taken from Hyp mode at %#08x (HSR: %#08x)\n",
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vcpu->arch.hxfar, vcpu->arch.hsr);
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kvm_err("Prefetch Abort taken from Hyp mode at %#08lx (HSR: %#08x)\n",
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kvm_vcpu_get_hfar(vcpu), kvm_vcpu_get_hsr(vcpu));
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return -EFAULT;
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}
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static int handle_dabt_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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/* This is either an error in the ws. code or an external abort */
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kvm_err("Data Abort taken from Hyp mode at %#08x (HSR: %#08x)\n",
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vcpu->arch.hxfar, vcpu->arch.hsr);
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kvm_err("Data Abort taken from Hyp mode at %#08lx (HSR: %#08x)\n",
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kvm_vcpu_get_hfar(vcpu), kvm_vcpu_get_hsr(vcpu));
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return -EFAULT;
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}
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@ -559,17 +559,17 @@ static bool kvm_condition_valid(struct kvm_vcpu *vcpu)
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* catch undefined instructions, and then we won't get past
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* the arm_exit_handlers test anyway.
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*/
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BUG_ON(((vcpu->arch.hsr & HSR_EC) >> HSR_EC_SHIFT) == 0);
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BUG_ON(((kvm_vcpu_get_hsr(vcpu) & HSR_EC) >> HSR_EC_SHIFT) == 0);
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/* Top two bits non-zero? Unconditional. */
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if (vcpu->arch.hsr >> 30)
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if (kvm_vcpu_get_hsr(vcpu) >> 30)
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return true;
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cpsr = *vcpu_cpsr(vcpu);
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/* Is condition field valid? */
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if ((vcpu->arch.hsr & HSR_CV) >> HSR_CV_SHIFT)
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cond = (vcpu->arch.hsr & HSR_COND) >> HSR_COND_SHIFT;
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if ((kvm_vcpu_get_hsr(vcpu) & HSR_CV) >> HSR_CV_SHIFT)
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cond = (kvm_vcpu_get_hsr(vcpu) & HSR_COND) >> HSR_COND_SHIFT;
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else {
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/* This can happen in Thumb mode: examine IT state. */
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unsigned long it;
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@ -602,20 +602,20 @@ static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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case ARM_EXCEPTION_IRQ:
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return 1;
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case ARM_EXCEPTION_UNDEFINED:
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kvm_err("Undefined exception in Hyp mode at: %#08x\n",
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vcpu->arch.hyp_pc);
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kvm_err("Undefined exception in Hyp mode at: %#08lx\n",
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kvm_vcpu_get_hyp_pc(vcpu));
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BUG();
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panic("KVM: Hypervisor undefined exception!\n");
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case ARM_EXCEPTION_DATA_ABORT:
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case ARM_EXCEPTION_PREF_ABORT:
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case ARM_EXCEPTION_HVC:
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hsr_ec = (vcpu->arch.hsr & HSR_EC) >> HSR_EC_SHIFT;
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hsr_ec = (kvm_vcpu_get_hsr(vcpu) & HSR_EC) >> HSR_EC_SHIFT;
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if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers)
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|| !arm_exit_handlers[hsr_ec]) {
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kvm_err("Unkown exception class: %#08lx, "
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"hsr: %#08x\n", hsr_ec,
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(unsigned int)vcpu->arch.hsr);
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(unsigned int)kvm_vcpu_get_hsr(vcpu));
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BUG();
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}
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@ -624,7 +624,7 @@ static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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* that fail their condition code check"
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*/
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if (!kvm_condition_valid(vcpu)) {
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bool is_wide = vcpu->arch.hsr & HSR_IL;
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bool is_wide = kvm_vcpu_get_hsr(vcpu) & HSR_IL;
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kvm_skip_instr(vcpu, is_wide);
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return 1;
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}
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@ -293,7 +293,7 @@ static int emulate_cp15(struct kvm_vcpu *vcpu,
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if (likely(r->access(vcpu, params, r))) {
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/* Skip instruction, since it was emulated */
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kvm_skip_instr(vcpu, (vcpu->arch.hsr >> 25) & 1);
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kvm_skip_instr(vcpu, (kvm_vcpu_get_hsr(vcpu) >> 25) & 1);
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return 1;
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}
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/* If access function fails, it should complain. */
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@ -315,14 +315,14 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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struct coproc_params params;
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params.CRm = (vcpu->arch.hsr >> 1) & 0xf;
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params.Rt1 = (vcpu->arch.hsr >> 5) & 0xf;
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params.is_write = ((vcpu->arch.hsr & 1) == 0);
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params.CRm = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf;
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params.Rt1 = (kvm_vcpu_get_hsr(vcpu) >> 5) & 0xf;
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params.is_write = ((kvm_vcpu_get_hsr(vcpu) & 1) == 0);
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params.is_64bit = true;
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params.Op1 = (vcpu->arch.hsr >> 16) & 0xf;
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params.Op1 = (kvm_vcpu_get_hsr(vcpu) >> 16) & 0xf;
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params.Op2 = 0;
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params.Rt2 = (vcpu->arch.hsr >> 10) & 0xf;
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params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
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params.CRn = 0;
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return emulate_cp15(vcpu, ¶ms);
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@ -347,14 +347,14 @@ int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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struct coproc_params params;
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params.CRm = (vcpu->arch.hsr >> 1) & 0xf;
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params.Rt1 = (vcpu->arch.hsr >> 5) & 0xf;
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params.is_write = ((vcpu->arch.hsr & 1) == 0);
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params.CRm = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf;
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params.Rt1 = (kvm_vcpu_get_hsr(vcpu) >> 5) & 0xf;
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params.is_write = ((kvm_vcpu_get_hsr(vcpu) & 1) == 0);
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params.is_64bit = false;
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params.CRn = (vcpu->arch.hsr >> 10) & 0xf;
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params.Op1 = (vcpu->arch.hsr >> 14) & 0x7;
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params.Op2 = (vcpu->arch.hsr >> 17) & 0x7;
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params.CRn = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
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params.Op1 = (kvm_vcpu_get_hsr(vcpu) >> 14) & 0x7;
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params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7;
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params.Rt2 = 0;
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return emulate_cp15(vcpu, ¶ms);
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@ -65,19 +65,19 @@ static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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unsigned long rt, len;
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bool is_write, sign_extend;
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if ((vcpu->arch.hsr >> 8) & 1) {
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if ((kvm_vcpu_get_hsr(vcpu) >> 8) & 1) {
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/* cache operation on I/O addr, tell guest unsupported */
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kvm_inject_dabt(vcpu, vcpu->arch.hxfar);
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kvm_inject_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));
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return 1;
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}
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if ((vcpu->arch.hsr >> 7) & 1) {
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if ((kvm_vcpu_get_hsr(vcpu) >> 7) & 1) {
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/* page table accesses IO mem: tell guest to fix its TTBR */
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kvm_inject_dabt(vcpu, vcpu->arch.hxfar);
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kvm_inject_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));
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return 1;
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}
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switch ((vcpu->arch.hsr >> 22) & 0x3) {
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switch ((kvm_vcpu_get_hsr(vcpu) >> 22) & 0x3) {
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case 0:
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len = 1;
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break;
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@ -92,13 +92,13 @@ static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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return -EFAULT;
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}
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is_write = vcpu->arch.hsr & HSR_WNR;
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sign_extend = vcpu->arch.hsr & HSR_SSE;
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rt = (vcpu->arch.hsr & HSR_SRT_MASK) >> HSR_SRT_SHIFT;
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is_write = kvm_vcpu_get_hsr(vcpu) & HSR_WNR;
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sign_extend = kvm_vcpu_get_hsr(vcpu) & HSR_SSE;
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rt = (kvm_vcpu_get_hsr(vcpu) & HSR_SRT_MASK) >> HSR_SRT_SHIFT;
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if (kvm_vcpu_reg_is_pc(vcpu, rt)) {
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/* IO memory trying to read/write pc */
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kvm_inject_pabt(vcpu, vcpu->arch.hxfar);
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kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
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return 1;
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}
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@ -112,7 +112,7 @@ static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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* The MMIO instruction is emulated and should not be re-executed
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* in the guest.
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*/
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kvm_skip_instr(vcpu, (vcpu->arch.hsr >> 25) & 1);
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kvm_skip_instr(vcpu, (kvm_vcpu_get_hsr(vcpu) >> 25) & 1);
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return 0;
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}
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@ -130,7 +130,7 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
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* space do its magic.
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*/
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if (vcpu->arch.hsr & HSR_ISV) {
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if (kvm_vcpu_get_hsr(vcpu) & HSR_ISV) {
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ret = decode_hsr(vcpu, fault_ipa, &mmio);
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if (ret)
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return ret;
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@ -526,7 +526,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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unsigned long mmu_seq;
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struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
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write_fault = kvm_is_write_fault(vcpu->arch.hsr);
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write_fault = kvm_is_write_fault(kvm_vcpu_get_hsr(vcpu));
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if (fault_status == FSC_PERM && !write_fault) {
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kvm_err("Unexpected L2 read permission error\n");
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return -EFAULT;
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@ -593,15 +593,15 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
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gfn_t gfn;
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int ret, idx;
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hsr_ec = vcpu->arch.hsr >> HSR_EC_SHIFT;
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hsr_ec = kvm_vcpu_get_hsr(vcpu) >> HSR_EC_SHIFT;
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is_iabt = (hsr_ec == HSR_EC_IABT);
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fault_ipa = ((phys_addr_t)vcpu->arch.hpfar & HPFAR_MASK) << 8;
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fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
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trace_kvm_guest_fault(*vcpu_pc(vcpu), vcpu->arch.hsr,
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vcpu->arch.hxfar, fault_ipa);
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trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
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kvm_vcpu_get_hfar(vcpu), fault_ipa);
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/* Check the stage-2 fault is trans. fault or write fault */
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fault_status = (vcpu->arch.hsr & HSR_FSC_TYPE);
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fault_status = (kvm_vcpu_get_hsr(vcpu) & HSR_FSC_TYPE);
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if (fault_status != FSC_FAULT && fault_status != FSC_PERM) {
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kvm_err("Unsupported fault status: EC=%#lx DFCS=%#lx\n",
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hsr_ec, fault_status);
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@ -614,7 +614,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
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if (!kvm_is_visible_gfn(vcpu->kvm, gfn)) {
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if (is_iabt) {
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/* Prefetch Abort on I/O address */
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kvm_inject_pabt(vcpu, vcpu->arch.hxfar);
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kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
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ret = 1;
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goto out_unlock;
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}
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@ -627,7 +627,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
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}
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/* Adjust page offset */
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fault_ipa |= vcpu->arch.hxfar & ~PAGE_MASK;
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fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ~PAGE_MASK;
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ret = io_mem_abort(vcpu, run, fault_ipa);
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goto out_unlock;
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}
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