pwm: imx: Move PWMv2 wait for fifo slot code to a separate function
The code, which waits for fifo slot, has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_wait_fifo_slot(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner <stefan@agner.ch> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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Родитель
970247a486
Коммит
73b1ff1f3e
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@ -137,18 +137,36 @@ static void imx_pwm_sw_reset(struct pwm_chip *chip)
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dev_warn(dev, "software reset timeout\n");
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}
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static void imx_pwm_wait_fifo_slot(struct pwm_chip *chip,
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struct pwm_device *pwm)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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struct device *dev = chip->dev;
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unsigned int period_ms;
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int fifoav;
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u32 sr;
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sr = readl(imx->mmio_base + MX3_PWMSR);
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fifoav = sr & MX3_PWMSR_FIFOAV_MASK;
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if (fifoav == MX3_PWMSR_FIFOAV_4WORDS) {
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period_ms = DIV_ROUND_UP(pwm_get_period(pwm),
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NSEC_PER_MSEC);
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msleep(period_ms);
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sr = readl(imx->mmio_base + MX3_PWMSR);
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if (fifoav == (sr & MX3_PWMSR_FIFOAV_MASK))
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dev_warn(dev, "there is no free FIFO slot\n");
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}
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}
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static int imx_pwm_config_v2(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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struct device *dev = chip->dev;
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unsigned long long c;
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unsigned long period_cycles, duty_cycles, prescale;
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unsigned int period_ms;
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bool enable = pwm_is_enabled(pwm);
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int fifoav;
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u32 cr, sr;
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u32 cr;
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/*
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* i.MX PWMv2 has a 4-word sample FIFO.
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@ -157,21 +175,10 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
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* wait for a full PWM cycle to get a relinquished FIFO slot
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* when the controller is enabled and the FIFO is fully loaded.
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*/
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if (enable) {
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sr = readl(imx->mmio_base + MX3_PWMSR);
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fifoav = sr & MX3_PWMSR_FIFOAV_MASK;
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if (fifoav == MX3_PWMSR_FIFOAV_4WORDS) {
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period_ms = DIV_ROUND_UP(pwm_get_period(pwm),
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NSEC_PER_MSEC);
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msleep(period_ms);
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sr = readl(imx->mmio_base + MX3_PWMSR);
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if (fifoav == (sr & MX3_PWMSR_FIFOAV_MASK))
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dev_warn(dev, "there is no free FIFO slot\n");
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}
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} else {
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if (enable)
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imx_pwm_wait_fifo_slot(chip, pwm);
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else
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imx_pwm_sw_reset(chip);
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}
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c = clk_get_rate(imx->clk_per);
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c = c * period_ns;
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