staging: dwc2: remove some device-mode related debug code
This code appears to be partially incorrect. Since this is only debug code and only applies to device mode, it seems better to remove this code for now than to invest time fixing it. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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bcc5defa1a
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73cfe0e5d5
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@ -1809,8 +1809,6 @@ void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg)
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{
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#ifdef DEBUG
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u32 __iomem *addr;
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int i, ep_num;
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char *txfsiz;
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dev_dbg(hsotg->dev, "Core Global Registers\n");
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addr = hsotg->regs + GOTGCTL;
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@ -1886,23 +1884,6 @@ void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg)
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dev_dbg(hsotg->dev, "HPTXFSIZ @0x%08lX : 0x%08X\n",
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(unsigned long)addr, readl(addr));
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if (hsotg->core_params->en_multiple_tx_fifo <= 0) {
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ep_num = hsotg->hwcfg4 >> GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT &
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GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK >>
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GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT;
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txfsiz = "DPTXFSIZ";
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} else {
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ep_num = hsotg->hwcfg4 >> GHWCFG4_NUM_IN_EPS_SHIFT &
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GHWCFG4_NUM_IN_EPS_MASK >> GHWCFG4_NUM_IN_EPS_SHIFT;
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txfsiz = "DIENPTXF";
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}
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for (i = 0; i < ep_num; i++) {
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addr = hsotg->regs + DPTXFSIZN(i + 1);
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dev_dbg(hsotg->dev, "%s[%d] @0x%08lX : 0x%08X\n", txfsiz, i + 1,
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(unsigned long)addr, readl(addr));
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}
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addr = hsotg->regs + PCGCTL;
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dev_dbg(hsotg->dev, "PCGCTL @0x%08lX : 0x%08X\n",
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(unsigned long)addr, readl(addr));
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