clk: jz4740: Add TCU clock
Add the missing TCU clock to the list of clocks supplied by the CGU for the JZ4740 SoC. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
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@ -222,6 +222,12 @@ static const struct ingenic_cgu_clk_info jz4740_cgu_clocks[] = {
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.parents = { JZ4740_CLK_EXT, -1, -1, -1 },
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.parents = { JZ4740_CLK_EXT, -1, -1, -1 },
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.gate = { CGU_REG_CLKGR, 5 },
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.gate = { CGU_REG_CLKGR, 5 },
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},
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},
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[JZ4740_CLK_TCU] = {
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"tcu", CGU_CLK_GATE,
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.parents = { JZ4740_CLK_EXT, -1, -1, -1 },
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.gate = { CGU_REG_CLKGR, 1 },
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},
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};
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};
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static void __init jz4740_cgu_init(struct device_node *np)
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static void __init jz4740_cgu_init(struct device_node *np)
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@ -34,5 +34,6 @@
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#define JZ4740_CLK_ADC 19
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#define JZ4740_CLK_ADC 19
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#define JZ4740_CLK_I2C 20
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#define JZ4740_CLK_I2C 20
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#define JZ4740_CLK_AIC 21
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#define JZ4740_CLK_AIC 21
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#define JZ4740_CLK_TCU 22
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#endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */
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#endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */
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