irq_domain: Remove 'new' irq_domain in favour of the ppc one
This patch removes the simplistic implementation of irq_domains and enables the powerpc infrastructure for all irq_domain users. The powerpc infrastructure includes support for complex mappings between Linux and hardware irq numbers, and can manage allocation of irq_descs. This patch also converts the few users of irq_domain_add()/irq_domain_del() to call irq_domain_add_legacy() instead. v3: Fix bug that set up too many irqs in translation range. v2: Fix removal of irq_alloc_descs() call in gic driver Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Milton Miller <miltonm@bga.com> Tested-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Grant Likely
Родитель
5769089ac7
Коммит
75294957be
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@ -51,7 +51,6 @@ union gic_base {
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};
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struct gic_chip_data {
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unsigned int irq_offset;
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union gic_base dist_base;
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union gic_base cpu_base;
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#ifdef CONFIG_CPU_PM
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@ -61,9 +60,7 @@ struct gic_chip_data {
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u32 __percpu *saved_ppi_enable;
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u32 __percpu *saved_ppi_conf;
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#endif
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#ifdef CONFIG_IRQ_DOMAIN
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struct irq_domain domain;
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#endif
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struct irq_domain *domain;
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unsigned int gic_irqs;
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#ifdef CONFIG_GIC_NON_BANKED
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void __iomem *(*get_base)(union gic_base *);
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@ -282,7 +279,7 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
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irqnr = irqstat & ~0x1c00;
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if (likely(irqnr > 15 && irqnr < 1021)) {
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irqnr = irq_domain_to_irq(&gic->domain, irqnr);
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irqnr = irq_find_mapping(gic->domain, irqnr);
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handle_IRQ(irqnr, regs);
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continue;
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}
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@ -314,8 +311,8 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
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if (gic_irq == 1023)
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goto out;
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cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq);
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if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS))
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cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
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if (unlikely(gic_irq < 32 || gic_irq > 1020))
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do_bad_IRQ(cascade_irq, desc);
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else
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generic_handle_irq(cascade_irq);
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@ -348,10 +345,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
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static void __init gic_dist_init(struct gic_chip_data *gic)
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{
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unsigned int i, irq;
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unsigned int i;
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u32 cpumask;
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unsigned int gic_irqs = gic->gic_irqs;
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struct irq_domain *domain = &gic->domain;
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void __iomem *base = gic_data_dist_base(gic);
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u32 cpu = cpu_logical_map(smp_processor_id());
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@ -386,23 +382,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
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for (i = 32; i < gic_irqs; i += 32)
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writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
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/*
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* Setup the Linux IRQ subsystem.
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*/
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irq_domain_for_each_irq(domain, i, irq) {
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if (i < 32) {
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irq_set_percpu_devid(irq);
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irq_set_chip_and_handler(irq, &gic_chip,
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handle_percpu_devid_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
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} else {
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irq_set_chip_and_handler(irq, &gic_chip,
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handle_fasteoi_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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irq_set_chip_data(irq, gic);
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}
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writel_relaxed(1, base + GIC_DIST_CTRL);
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}
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@ -618,7 +597,23 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
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}
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#endif
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#ifdef CONFIG_OF
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static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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if (hw < 32) {
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irq_set_percpu_devid(irq);
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irq_set_chip_and_handler(irq, &gic_chip,
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handle_percpu_devid_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
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} else {
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irq_set_chip_and_handler(irq, &gic_chip,
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handle_fasteoi_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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irq_set_chip_data(irq, d->host_data);
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return 0;
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}
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static int gic_irq_domain_xlate(struct irq_domain *d,
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struct device_node *controller,
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const u32 *intspec, unsigned int intsize,
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@ -639,26 +634,23 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
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*out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
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return 0;
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}
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#endif
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struct irq_domain_ops gic_irq_domain_ops = {
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#ifdef CONFIG_OF
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.map = gic_irq_domain_map,
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.xlate = gic_irq_domain_xlate,
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#endif
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};
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void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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void __iomem *dist_base, void __iomem *cpu_base,
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u32 percpu_offset)
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u32 percpu_offset, struct device_node *node)
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{
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irq_hw_number_t hwirq_base;
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struct gic_chip_data *gic;
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struct irq_domain *domain;
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int gic_irqs;
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int gic_irqs, irq_base;
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BUG_ON(gic_nr >= MAX_GIC_NR);
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gic = &gic_data[gic_nr];
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domain = &gic->domain;
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#ifdef CONFIG_GIC_NON_BANKED
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if (percpu_offset) { /* Frankein-GIC without banked registers... */
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unsigned int cpu;
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@ -694,10 +686,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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* For primary GICs, skip over SGIs.
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* For secondary GICs, skip over PPIs, too.
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*/
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domain->hwirq_base = 32;
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hwirq_base = 32;
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if (gic_nr == 0) {
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if ((irq_start & 31) > 0) {
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domain->hwirq_base = 16;
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hwirq_base = 16;
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if (irq_start != -1)
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irq_start = (irq_start & ~31) + 16;
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}
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@ -713,17 +705,17 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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gic_irqs = 1020;
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gic->gic_irqs = gic_irqs;
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domain->nr_irq = gic_irqs - domain->hwirq_base;
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domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq,
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numa_node_id());
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if (IS_ERR_VALUE(domain->irq_base)) {
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gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
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irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id());
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if (IS_ERR_VALUE(irq_base)) {
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WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
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irq_start);
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domain->irq_base = irq_start;
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irq_base = irq_start;
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}
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domain->host_data = gic;
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domain->ops = &gic_irq_domain_ops;
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irq_domain_add(domain);
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gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
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hwirq_base, &gic_irq_domain_ops, gic);
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if (WARN_ON(!gic->domain))
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return;
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gic_chip.flags |= gic_arch_extn.flags;
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gic_dist_init(gic);
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@ -768,7 +760,6 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
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void __iomem *dist_base;
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u32 percpu_offset;
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int irq;
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struct irq_domain *domain = &gic_data[gic_cnt].domain;
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if (WARN_ON(!node))
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return -ENODEV;
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@ -782,9 +773,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
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if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
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percpu_offset = 0;
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domain->of_node = of_node_get(node);
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gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
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gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
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if (parent) {
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irq = irq_of_parse_and_map(node, 0);
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@ -56,7 +56,7 @@ struct vic_device {
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u32 int_enable;
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u32 soft_int;
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u32 protect;
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struct irq_domain domain;
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struct irq_domain *domain;
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};
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/* we cannot allocate memory when VICs are initially registered */
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@ -192,14 +192,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
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v->resume_sources = resume_sources;
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v->irq = irq;
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vic_id++;
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v->domain.irq_base = irq;
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v->domain.nr_irq = 32;
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#ifdef CONFIG_OF_IRQ
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v->domain.of_node = of_node_get(node);
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#endif /* CONFIG_OF */
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v->domain.ops = &irq_domain_simple_ops;
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irq_domain_add(&v->domain);
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v->domain = irq_domain_add_legacy(node, 32, irq, 0,
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&irq_domain_simple_ops, v);
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}
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static void vic_ack_irq(struct irq_data *d)
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@ -348,7 +342,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
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vic_register(base, irq_start, 0, node);
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}
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static void __init __vic_init(void __iomem *base, unsigned int irq_start,
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void __init __vic_init(void __iomem *base, unsigned int irq_start,
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u32 vic_sources, u32 resume_sources,
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struct device_node *node)
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{
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@ -444,7 +438,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
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stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
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while (stat) {
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irq = ffs(stat) - 1;
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handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
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handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
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stat &= ~(1 << irq);
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handled = 1;
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}
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@ -39,7 +39,7 @@ struct device_node;
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extern struct irq_chip gic_arch_extn;
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void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
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u32 offset);
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u32 offset, struct device_node *);
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int gic_of_init(struct device_node *node, struct device_node *parent);
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void gic_secondary_init(unsigned int);
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void gic_handle_irq(struct pt_regs *regs);
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@ -49,7 +49,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
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static inline void gic_init(unsigned int nr, int start,
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void __iomem *dist , void __iomem *cpu)
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{
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gic_init_bases(nr, start, dist, cpu, 0);
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gic_init_bases(nr, start, dist, cpu, 0, NULL);
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}
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#endif
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@ -47,6 +47,8 @@
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struct device_node;
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struct pt_regs;
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void __vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources,
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u32 resume_sources, struct device_node *node);
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void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
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int vic_of_init(struct device_node *node, struct device_node *parent);
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void vic_handle_irq(struct pt_regs *regs);
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@ -402,7 +402,7 @@ void __init exynos4_init_irq(void)
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gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
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if (!of_have_populated_dt())
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gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
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gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
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#ifdef CONFIG_OF
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else
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of_irq_init(exynos4_dt_irq_match);
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@ -98,8 +98,11 @@ static const struct of_device_id sic_of_match[] __initconst = {
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void __init versatile_init_irq(void)
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{
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vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0);
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irq_domain_generate_simple(vic_of_match, VERSATILE_VIC_BASE, IRQ_VIC_START);
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struct device_node *np;
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np = of_find_matching_node_by_address(NULL, vic_of_match,
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VERSATILE_VIC_BASE);
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__vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np);
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writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
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@ -263,10 +263,6 @@ struct twl_client {
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static struct twl_client twl_modules[TWL_NUM_SLAVES];
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#ifdef CONFIG_IRQ_DOMAIN
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static struct irq_domain domain;
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#endif
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/* mapping the module id to slave id and base address */
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struct twl_mapping {
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unsigned char sid; /* Slave ID */
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@ -1227,14 +1223,8 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
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pdata->irq_base = status;
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pdata->irq_end = pdata->irq_base + nr_irqs;
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#ifdef CONFIG_IRQ_DOMAIN
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domain.irq_base = pdata->irq_base;
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domain.nr_irq = nr_irqs;
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domain.of_node = of_node_get(node);
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domain.ops = &irq_domain_simple_ops;
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irq_domain_add(&domain);
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#endif
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irq_domain_add_legacy(node, nr_irqs, pdata->irq_base, 0,
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&irq_domain_simple_ops, NULL);
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if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
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dev_dbg(&client->dev, "can't talk I2C?\n");
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@ -55,9 +55,6 @@ typedef unsigned long irq_hw_number_t;
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* @map: Create or update a mapping between a virtual irq number and a hw
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* irq number. This is called only once for a given mapping.
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* @unmap: Dispose of such a mapping
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* @to_irq: (optional) given a local hardware irq number, return the linux
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* irq number. If to_irq is not implemented, then the irq_domain
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* will use this translation: irq = (domain->irq_base + hwirq)
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* @xlate: Given a device tree node and interrupt specifier, decode
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* the hardware irq number and linux irq type value.
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*
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@ -70,7 +67,6 @@ struct irq_domain_ops {
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int (*match)(struct irq_domain *d, struct device_node *node);
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int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw);
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void (*unmap)(struct irq_domain *d, unsigned int virq);
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unsigned int (*to_irq)(struct irq_domain *d, unsigned long hwirq);
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int (*xlate)(struct irq_domain *d, struct device_node *node,
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const u32 *intspec, unsigned int intsize,
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unsigned long *out_hwirq, unsigned int *out_type);
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@ -114,16 +110,11 @@ struct irq_domain {
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void *host_data;
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irq_hw_number_t inval_irq;
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unsigned int irq_base;
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unsigned int nr_irq;
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unsigned int hwirq_base;
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/* Optional device node pointer */
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struct device_node *of_node;
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};
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#ifdef CONFIG_IRQ_DOMAIN
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#ifdef CONFIG_PPC
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struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
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unsigned int size,
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unsigned int first_irq,
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@ -153,6 +144,10 @@ static inline struct irq_domain *irq_domain_add_legacy_isa(
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return irq_domain_add_legacy(of_node, NUM_ISA_INTERRUPTS, 0, 0, ops,
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host_data);
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}
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extern struct irq_domain *irq_find_host(struct device_node *node);
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extern void irq_set_default_host(struct irq_domain *host);
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extern void irq_set_virq_count(unsigned int count);
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extern unsigned int irq_create_mapping(struct irq_domain *host,
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irq_hw_number_t hwirq);
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@ -167,38 +162,7 @@ extern unsigned int irq_radix_revmap_lookup(struct irq_domain *host,
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extern unsigned int irq_linear_revmap(struct irq_domain *host,
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irq_hw_number_t hwirq);
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#else /* CONFIG_PPC */
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/**
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* irq_domain_to_irq() - Translate from a hardware irq to a linux irq number
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*
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* Returns the linux irq number associated with a hardware irq. By default,
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* the mapping is irq == domain->irq_base + hwirq, but this mapping can
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* be overridden if the irq_domain implements a .to_irq() hook.
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*/
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static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
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unsigned long hwirq)
|
||||
{
|
||||
if (d->ops->to_irq)
|
||||
return d->ops->to_irq(d, hwirq);
|
||||
if (WARN_ON(hwirq < d->hwirq_base))
|
||||
return 0;
|
||||
return d->irq_base + hwirq - d->hwirq_base;
|
||||
}
|
||||
|
||||
#define irq_domain_for_each_hwirq(d, hw) \
|
||||
for (hw = d->hwirq_base; hw < d->hwirq_base + d->nr_irq; hw++)
|
||||
|
||||
#define irq_domain_for_each_irq(d, hw, irq) \
|
||||
for (hw = d->hwirq_base, irq = irq_domain_to_irq(d, hw); \
|
||||
hw < d->hwirq_base + d->nr_irq; \
|
||||
hw++, irq = irq_domain_to_irq(d, hw))
|
||||
|
||||
extern void irq_domain_add(struct irq_domain *domain);
|
||||
extern void irq_domain_del(struct irq_domain *domain);
|
||||
|
||||
extern struct irq_domain_ops irq_domain_simple_ops;
|
||||
|
||||
#if defined(CONFIG_OF_IRQ)
|
||||
extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
|
||||
extern void irq_domain_generate_simple(const struct of_device_id *match,
|
||||
|
|
@ -207,7 +171,6 @@ extern void irq_domain_generate_simple(const struct of_device_id *match,
|
|||
static inline void irq_domain_generate_simple(const struct of_device_id *match,
|
||||
u64 phys_base, unsigned int irq_start) { }
|
||||
#endif /* !CONFIG_OF_IRQ */
|
||||
#endif /* !CONFIG_PPC */
|
||||
#endif /* CONFIG_IRQ_DOMAIN */
|
||||
|
||||
#endif /* _LINUX_IRQDOMAIN_H */
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
static LIST_HEAD(irq_domain_list);
|
||||
static DEFINE_MUTEX(irq_domain_mutex);
|
||||
|
||||
#ifdef CONFIG_PPC
|
||||
static DEFINE_MUTEX(revmap_trees_mutex);
|
||||
static unsigned int irq_virq_count = NR_IRQS;
|
||||
static struct irq_domain *irq_default_domain;
|
||||
|
|
@ -694,124 +693,11 @@ static int __init irq_debugfs_init(void)
|
|||
__initcall(irq_debugfs_init);
|
||||
#endif /* CONFIG_VIRQ_DEBUG */
|
||||
|
||||
#else /* CONFIG_PPC */
|
||||
|
||||
/**
|
||||
* irq_domain_add() - Register an irq_domain
|
||||
* @domain: ptr to initialized irq_domain structure
|
||||
*
|
||||
* Registers an irq_domain structure. The irq_domain must at a minimum be
|
||||
* initialized with an ops structure pointer, and either a ->to_irq hook or
|
||||
* a valid irq_base value. Everything else is optional.
|
||||
*/
|
||||
void irq_domain_add(struct irq_domain *domain)
|
||||
int irq_domain_simple_map(struct irq_domain *d, unsigned int irq,
|
||||
irq_hw_number_t hwirq)
|
||||
{
|
||||
struct irq_data *d;
|
||||
int hwirq, irq;
|
||||
|
||||
/*
|
||||
* This assumes that the irq_domain owner has already allocated
|
||||
* the irq_descs. This block will be removed when support for dynamic
|
||||
* allocation of irq_descs is added to irq_domain.
|
||||
*/
|
||||
irq_domain_for_each_irq(domain, hwirq, irq) {
|
||||
d = irq_get_irq_data(irq);
|
||||
if (!d) {
|
||||
WARN(1, "error: assigning domain to non existant irq_desc");
|
||||
return;
|
||||
}
|
||||
if (d->domain) {
|
||||
/* things are broken; just report, don't clean up */
|
||||
WARN(1, "error: irq_desc already assigned to a domain");
|
||||
return;
|
||||
}
|
||||
d->domain = domain;
|
||||
d->hwirq = hwirq;
|
||||
}
|
||||
|
||||
mutex_lock(&irq_domain_mutex);
|
||||
list_add(&domain->link, &irq_domain_list);
|
||||
mutex_unlock(&irq_domain_mutex);
|
||||
}
|
||||
|
||||
/**
|
||||
* irq_domain_del() - Unregister an irq_domain
|
||||
* @domain: ptr to registered irq_domain.
|
||||
*/
|
||||
void irq_domain_del(struct irq_domain *domain)
|
||||
{
|
||||
struct irq_data *d;
|
||||
int hwirq, irq;
|
||||
|
||||
mutex_lock(&irq_domain_mutex);
|
||||
list_del(&domain->link);
|
||||
mutex_unlock(&irq_domain_mutex);
|
||||
|
||||
/* Clear the irq_domain assignments */
|
||||
irq_domain_for_each_irq(domain, hwirq, irq) {
|
||||
d = irq_get_irq_data(irq);
|
||||
d->domain = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_OF_IRQ)
|
||||
/**
|
||||
* irq_create_of_mapping() - Map a linux irq number from a DT interrupt spec
|
||||
*
|
||||
* Used by the device tree interrupt mapping code to translate a device tree
|
||||
* interrupt specifier to a valid linux irq number. Returns either a valid
|
||||
* linux IRQ number or 0.
|
||||
*
|
||||
* When the caller no longer need the irq number returned by this function it
|
||||
* should arrange to call irq_dispose_mapping().
|
||||
*/
|
||||
unsigned int irq_create_of_mapping(struct device_node *controller,
|
||||
const u32 *intspec, unsigned int intsize)
|
||||
{
|
||||
struct irq_domain *domain;
|
||||
unsigned long hwirq;
|
||||
unsigned int irq, type;
|
||||
int rc = -EINVAL;
|
||||
|
||||
/* Find a domain which can translate the irq spec */
|
||||
mutex_lock(&irq_domain_mutex);
|
||||
list_for_each_entry(domain, &irq_domain_list, link) {
|
||||
if (!domain->ops->xlate)
|
||||
continue;
|
||||
rc = domain->ops->xlate(domain, controller,
|
||||
intspec, intsize, &hwirq, &type);
|
||||
if (rc == 0)
|
||||
break;
|
||||
}
|
||||
mutex_unlock(&irq_domain_mutex);
|
||||
|
||||
if (rc != 0)
|
||||
return 0;
|
||||
|
||||
irq = irq_domain_to_irq(domain, hwirq);
|
||||
if (type != IRQ_TYPE_NONE)
|
||||
irq_set_irq_type(irq, type);
|
||||
pr_debug("%s: mapped hwirq=%i to irq=%i, flags=%x\n",
|
||||
controller->full_name, (int)hwirq, irq, type);
|
||||
return irq;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
|
||||
|
||||
/**
|
||||
* irq_dispose_mapping() - Discard a mapping created by irq_create_of_mapping()
|
||||
* @irq: linux irq number to be discarded
|
||||
*
|
||||
* Calling this function indicates the caller no longer needs a reference to
|
||||
* the linux irq number returned by a prior call to irq_create_of_mapping().
|
||||
*/
|
||||
void irq_dispose_mapping(unsigned int irq)
|
||||
{
|
||||
/*
|
||||
* nothing yet; will be filled when support for dynamic allocation of
|
||||
* irq_descs is added to irq_domain
|
||||
*/
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irq_dispose_mapping);
|
||||
|
||||
int irq_domain_simple_xlate(struct irq_domain *d,
|
||||
struct device_node *controller,
|
||||
|
|
@ -822,10 +708,6 @@ int irq_domain_simple_xlate(struct irq_domain *d,
|
|||
return -EINVAL;
|
||||
if (intsize < 1)
|
||||
return -EINVAL;
|
||||
if (d->nr_irq && ((intspec[0] < d->hwirq_base) ||
|
||||
(intspec[0] >= d->hwirq_base + d->nr_irq)))
|
||||
return -EINVAL;
|
||||
|
||||
*out_hwirq = intspec[0];
|
||||
*out_type = IRQ_TYPE_NONE;
|
||||
if (intsize > 1)
|
||||
|
|
@ -833,23 +715,17 @@ int irq_domain_simple_xlate(struct irq_domain *d,
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* irq_domain_create_simple() - Set up a 'simple' translation range
|
||||
*/
|
||||
struct irq_domain_ops irq_domain_simple_ops = {
|
||||
.map = irq_domain_simple_map,
|
||||
.xlate = irq_domain_simple_xlate,
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
|
||||
|
||||
#ifdef CONFIG_OF_IRQ
|
||||
void irq_domain_add_simple(struct device_node *controller, int irq_base)
|
||||
{
|
||||
struct irq_domain *domain;
|
||||
|
||||
domain = kzalloc(sizeof(*domain), GFP_KERNEL);
|
||||
if (!domain) {
|
||||
WARN_ON(1);
|
||||
return;
|
||||
}
|
||||
|
||||
domain->irq_base = irq_base;
|
||||
domain->of_node = of_node_get(controller);
|
||||
domain->ops = &irq_domain_simple_ops;
|
||||
irq_domain_add(domain);
|
||||
irq_domain_add_legacy(controller, 32, irq_base, 0,
|
||||
&irq_domain_simple_ops, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irq_domain_add_simple);
|
||||
|
||||
|
|
@ -864,13 +740,4 @@ void irq_domain_generate_simple(const struct of_device_id *match,
|
|||
irq_domain_add_simple(node, irq_start);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
|
||||
#endif /* CONFIG_OF_IRQ */
|
||||
|
||||
struct irq_domain_ops irq_domain_simple_ops = {
|
||||
#ifdef CONFIG_OF_IRQ
|
||||
.xlate = irq_domain_simple_xlate,
|
||||
#endif /* CONFIG_OF_IRQ */
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
|
||||
|
||||
#endif /* !CONFIG_PPC */
|
||||
#endif
|
||||
|
|
|
|||
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