e1000e: ESB2 config after link up
On ESB2, the MAC-to-PHY (Kumeran) interface must be configured after link is up before any traffic is sent; a new PHY operations function pointer is provided for this. To facilitate read/write of the Kumeran registers without blocking PHY register writes, the driver/firmware synchronization method which previously used a hardware semaphore for both PHY and Kumeran register accesses is now split. New Kumeran register read/write functions utilize this new synchronization method. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Bruce Allan
David S. Miller
Родитель
438b365a27
Коммит
75eb0fad56
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@ -1394,6 +1394,7 @@ static struct e1000_phy_operations e82_phy_ops_igp = {
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.set_d0_lplu_state = e1000_set_d0_lplu_state_82571,
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.set_d3_lplu_state = e1000e_set_d3_lplu_state,
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.write_phy_reg = e1000e_write_phy_reg_igp,
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.cfg_on_link_up = NULL,
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};
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static struct e1000_phy_operations e82_phy_ops_m88 = {
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@ -1410,6 +1411,7 @@ static struct e1000_phy_operations e82_phy_ops_m88 = {
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.set_d0_lplu_state = e1000_set_d0_lplu_state_82571,
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.set_d3_lplu_state = e1000e_set_d3_lplu_state,
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.write_phy_reg = e1000e_write_phy_reg_m88,
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.cfg_on_link_up = NULL,
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};
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static struct e1000_phy_operations e82_phy_ops_bm = {
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@ -1426,6 +1428,7 @@ static struct e1000_phy_operations e82_phy_ops_bm = {
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.set_d0_lplu_state = e1000_set_d0_lplu_state_82571,
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.set_d3_lplu_state = e1000e_set_d3_lplu_state,
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.write_phy_reg = e1000e_write_phy_reg_bm2,
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.cfg_on_link_up = NULL,
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};
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static struct e1000_nvm_operations e82571_nvm_ops = {
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@ -112,6 +112,11 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
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static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
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static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
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static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
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static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);
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static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
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u16 *data);
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static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
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u16 data);
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/**
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* e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
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@ -275,8 +280,6 @@ static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
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u16 mask;
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mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
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mask |= E1000_SWFW_CSR_SM;
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return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
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}
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@ -292,7 +295,36 @@ static void e1000_release_phy_80003es2lan(struct e1000_hw *hw)
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u16 mask;
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mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
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mask |= E1000_SWFW_CSR_SM;
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e1000_release_swfw_sync_80003es2lan(hw, mask);
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}
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/**
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* e1000_acquire_mac_csr_80003es2lan - Acquire rights to access Kumeran register
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* @hw: pointer to the HW structure
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*
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* Acquire the semaphore to access the Kumeran interface.
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*
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**/
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static s32 e1000_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)
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{
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u16 mask;
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mask = E1000_SWFW_CSR_SM;
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return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
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}
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/**
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* e1000_release_mac_csr_80003es2lan - Release rights to access Kumeran Register
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* @hw: pointer to the HW structure
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*
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* Release the semaphore used to access the Kumeran interface
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**/
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static void e1000_release_mac_csr_80003es2lan(struct e1000_hw *hw)
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{
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u16 mask;
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mask = E1000_SWFW_CSR_SM;
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e1000_release_swfw_sync_80003es2lan(hw, mask);
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}
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@ -347,7 +379,7 @@ static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
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u32 swmask = mask;
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u32 fwmask = mask << 16;
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s32 i = 0;
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s32 timeout = 200;
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s32 timeout = 50;
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while (i < timeout) {
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if (e1000e_get_hw_semaphore(hw))
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@ -715,13 +747,7 @@ static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
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ret_val = e1000e_get_speed_and_duplex_copper(hw,
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speed,
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duplex);
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if (ret_val)
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return ret_val;
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if (*speed == SPEED_1000)
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ret_val = e1000_cfg_kmrn_1000_80003es2lan(hw);
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else
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ret_val = e1000_cfg_kmrn_10_100_80003es2lan(hw,
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*duplex);
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hw->phy.ops.cfg_on_link_up(hw);
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} else {
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ret_val = e1000e_get_speed_and_duplex_fiber_serdes(hw,
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speed,
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@ -763,8 +789,10 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
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ctrl = er32(CTRL);
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ret_val = e1000_acquire_phy_80003es2lan(hw);
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hw_dbg(hw, "Issuing a global reset to MAC\n");
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ew32(CTRL, ctrl | E1000_CTRL_RST);
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e1000_release_phy_80003es2lan(hw);
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ret_val = e1000e_get_auto_rd_done(hw);
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if (ret_val)
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@ -907,8 +935,7 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
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struct e1000_phy_info *phy = &hw->phy;
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s32 ret_val;
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u32 ctrl_ext;
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u32 i = 0;
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u16 data, data2;
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u16 data;
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ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);
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if (ret_val)
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@ -972,19 +999,20 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
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}
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/* Bypass Rx and Tx FIFO's */
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ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL,
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL,
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E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS |
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E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS);
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if (ret_val)
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return ret_val;
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ret_val = e1000e_read_kmrn_reg(hw,
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ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
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&data);
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if (ret_val)
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return ret_val;
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data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
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ret_val = e1000e_write_kmrn_reg(hw,
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
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data);
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if (ret_val)
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@ -1019,18 +1047,9 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
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if (ret_val)
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return ret_val;
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do {
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ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
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&data);
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if (ret_val)
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return ret_val;
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ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
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&data2);
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if (ret_val)
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return ret_val;
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i++;
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} while ((data != data2) && (i < GG82563_MAX_KMRN_RETRY));
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ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &data);
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if (ret_val)
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return ret_val;
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data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
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ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, data);
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@ -1077,23 +1096,27 @@ static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
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* iteration and increase the max iterations when
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* polling the phy; this fixes erroneous timeouts at 10Mbps.
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*/
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ret_val = e1000e_write_kmrn_reg(hw, GG82563_REG(0x34, 4), 0xFFFF);
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 4),
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0xFFFF);
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if (ret_val)
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return ret_val;
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ret_val = e1000e_read_kmrn_reg(hw, GG82563_REG(0x34, 9), ®_data);
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ret_val = e1000_read_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
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®_data);
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if (ret_val)
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return ret_val;
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reg_data |= 0x3F;
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ret_val = e1000e_write_kmrn_reg(hw, GG82563_REG(0x34, 9), reg_data);
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
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reg_data);
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if (ret_val)
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return ret_val;
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ret_val = e1000e_read_kmrn_reg(hw,
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ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
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®_data);
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if (ret_val)
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return ret_val;
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reg_data |= E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING;
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ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
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reg_data);
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if (ret_val)
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return ret_val;
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@ -1107,6 +1130,35 @@ static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
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return 0;
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}
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/**
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* e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
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* @hw: pointer to the HW structure
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* @duplex: current duplex setting
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*
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* Configure the KMRN interface by applying last minute quirks for
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* 10/100 operation.
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**/
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static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw)
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{
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s32 ret_val = 0;
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u16 speed;
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u16 duplex;
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if (hw->phy.media_type == e1000_media_type_copper) {
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ret_val = e1000e_get_speed_and_duplex_copper(hw, &speed,
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&duplex);
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if (ret_val)
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return ret_val;
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if (speed == SPEED_1000)
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ret_val = e1000_cfg_kmrn_1000_80003es2lan(hw);
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else
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ret_val = e1000_cfg_kmrn_10_100_80003es2lan(hw, duplex);
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}
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return ret_val;
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}
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/**
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* e1000_cfg_kmrn_10_100_80003es2lan - Apply "quirks" for 10/100 operation
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* @hw: pointer to the HW structure
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@ -1123,8 +1175,9 @@ static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
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u16 reg_data, reg_data2;
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reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT;
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ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
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reg_data);
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
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reg_data);
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if (ret_val)
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return ret_val;
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@ -1170,8 +1223,9 @@ static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
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u32 i = 0;
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reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT;
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ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
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reg_data);
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ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
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E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
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reg_data);
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if (ret_val)
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return ret_val;
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@ -1198,6 +1252,69 @@ static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
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return ret_val;
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}
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/**
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* e1000_read_kmrn_reg_80003es2lan - Read kumeran register
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* @hw: pointer to the HW structure
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* @offset: register offset to be read
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* @data: pointer to the read data
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*
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* Acquire semaphore, then read the PHY register at offset
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* using the kumeran interface. The information retrieved is stored in data.
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* Release the semaphore before exiting.
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**/
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s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 *data)
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{
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u32 kmrnctrlsta;
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s32 ret_val = 0;
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ret_val = e1000_acquire_mac_csr_80003es2lan(hw);
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if (ret_val)
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return ret_val;
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kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
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E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
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ew32(KMRNCTRLSTA, kmrnctrlsta);
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udelay(2);
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kmrnctrlsta = er32(KMRNCTRLSTA);
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*data = (u16)kmrnctrlsta;
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e1000_release_mac_csr_80003es2lan(hw);
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return ret_val;
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}
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/**
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* e1000_write_kmrn_reg_80003es2lan - Write kumeran register
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* @hw: pointer to the HW structure
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* @offset: register offset to write to
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* @data: data to write at register offset
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*
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* Acquire semaphore, then write the data to PHY register
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* at the offset using the kumeran interface. Release semaphore
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* before exiting.
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**/
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s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 data)
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{
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u32 kmrnctrlsta;
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s32 ret_val = 0;
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ret_val = e1000_acquire_mac_csr_80003es2lan(hw);
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if (ret_val)
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return ret_val;
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kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
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E1000_KMRNCTRLSTA_OFFSET) | data;
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ew32(KMRNCTRLSTA, kmrnctrlsta);
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udelay(2);
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e1000_release_mac_csr_80003es2lan(hw);
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return ret_val;
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}
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/**
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* e1000_clear_hw_cntrs_80003es2lan - Clear device specific hardware counters
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* @hw: pointer to the HW structure
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@ -1276,6 +1393,7 @@ static struct e1000_phy_operations es2_phy_ops = {
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.set_d0_lplu_state = NULL,
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.set_d3_lplu_state = e1000e_set_d3_lplu_state,
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.write_phy_reg = e1000_write_phy_reg_gg82563_80003es2lan,
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.cfg_on_link_up = e1000_cfg_on_link_up_80003es2lan,
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};
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static struct e1000_nvm_operations es2_nvm_ops = {
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@ -739,6 +739,7 @@ struct e1000_phy_operations {
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s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
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s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
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s32 (*write_phy_reg)(struct e1000_hw *, u32, u16);
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s32 (*cfg_on_link_up)(struct e1000_hw *);
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};
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/* Function pointers for the NVM. */
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@ -3493,6 +3493,7 @@ static void e1000_watchdog_task(struct work_struct *work)
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struct e1000_adapter, watchdog_task);
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struct net_device *netdev = adapter->netdev;
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struct e1000_mac_info *mac = &adapter->hw.mac;
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struct e1000_phy_info *phy = &adapter->hw.phy;
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struct e1000_ring *tx_ring = adapter->tx_ring;
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struct e1000_hw *hw = &adapter->hw;
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u32 link, tctl;
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@ -3599,6 +3600,13 @@ static void e1000_watchdog_task(struct work_struct *work)
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tctl |= E1000_TCTL_EN;
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ew32(TCTL, tctl);
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/*
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* Perform any post-link-up configuration before
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* reporting link up.
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*/
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if (phy->ops.cfg_on_link_up)
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phy->ops.cfg_on_link_up(hw);
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netif_carrier_on(netdev);
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netif_tx_wake_all_queues(netdev);
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Загрузка…
Ссылка в новой задаче